Patents by Inventor Jung-Huei Peng

Jung-Huei Peng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9617143
    Abstract: A method of forming a semiconductor device comprises bonding a capping wafer and a base wafer to form a wafer package. The base wafer comprises a plurality of chip package portions. The capping wafer comprises a plurality of isolation trenches. Each isolation trench of the plurality of isolation trenches is configured to substantially align with a corresponding chip package portion of the plurality of chip package portions. The method also comprises separating the wafer package into a plurality of chip packages. Each chip package of the plurality of chip packages comprises at least one chip package portion of the plurality of chip package portions.
    Type: Grant
    Filed: December 30, 2014
    Date of Patent: April 11, 2017
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chun-wen Cheng, Jung-Huei Peng, Shang-Ying Tsai, Hung-Chia Tsai, Yi-Chuan Teng
  • Patent number: 9611141
    Abstract: The present disclosure provides a device having a doped active region disposed in a substrate. The doped active region having an elongate shape and extends in a first direction. The device also includes a plurality of first metal gates disposed over the active region such that the first metal gates each extend in a second direction different from the first direction. The plurality of first metal gates includes an outer-most first metal gate having a greater dimension measured in the second direction than the rest of the first metal gates. The device further includes a plurality of second metal gates disposed over the substrate but not over the doped active region. The second metal gates contain different materials than the first metal gates. The second metal gates each extend in the second direction and form a plurality of respective N/P boundaries with the first metal gates.
    Type: Grant
    Filed: December 9, 2014
    Date of Patent: April 4, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ping-Yin Liu, Li-Cheng Chu, Hung-Hua Lin, Shang-Ying Tsai, Yuan-Chih Hsieh, Jung-Huei Peng, Lan-Lin Chao, Chia-Shiung Tsai, Chun-Wen Cheng
  • Publication number: 20170065958
    Abstract: The present disclosure relates to a method of depositing a fluid onto a substrate. In some embodiments, the method may be performed by mounting a substrate to a micro-fluidic probe card, so that the substrate abuts a cavity within the micro-fluidic probe card that is in communication with a fluid inlet and a fluid outlet. A first fluidic chemical is selectively introduced into the cavity via the fluid inlet of the micro-fluidic probe card.
    Type: Application
    Filed: November 18, 2016
    Publication date: March 9, 2017
    Inventors: Chun-Wen Cheng, Jung-Huei Peng, Yi-Shao Liu, Fei-Lung Lai, Shang-Ying Tsai
  • Publication number: 20170057814
    Abstract: The present disclosure relates an integrated chip having one or more MEMS devices. In some embodiments, the integrated chip has a carrier substrate with one or more cavities disposed within a first side of the carrier substrate. A dielectric layer is disposed between the first side of the carrier substrate and a first side of a micro-electromechanical system (MEMS) substrate. The dielectric layer has sidewalls that are laterally set back from sidewalls of openings extending through the MEMs substrate to the one or more cavities. A bonding structure, including an intermetallic compound having a plurality of metallic elements, abuts a second side of the MEMS substrate and is electrically connected to a metal interconnect layer within a dielectric structure disposed over a CMOS substrate.
    Type: Application
    Filed: June 1, 2016
    Publication date: March 2, 2017
    Inventors: Chun-Wen Cheng, Chia-Hua Chu, Jung-Huei Peng
  • Publication number: 20170044004
    Abstract: Some embodiments of the present disclosure provide a microelectromechanical systems (MEMS). The MEMS includes a semiconductive block. The semiconductive block includes a protruding structure. The protruding structure includes a bottom surface. The semiconductive block includes a sensing structure. A semiconductive substrate includes a conductive region. The conductive region includes a first surface under the sensing structure. The first surface is substantially coplanar with the bottom surface. A dielectric region includes a second surface not disposed over the first surface.
    Type: Application
    Filed: August 14, 2015
    Publication date: February 16, 2017
    Inventors: CHUN-WEN CHENG, JUNG-HUEI PENG, CHIA-HUA CHU, NIEN-TSUNG TSAI, YAO-TE HUANG, LI-MIN HUNG, YU-CHIA LIU
  • Patent number: 9545691
    Abstract: According to an exemplary embodiment of the disclosure, a method of removing a waste part of a substrate is provided. The method includes: using a laser to partially drill the substrate to define the waste part; and applying megasonic vibration to the substrate to remove the waste part from the substrate.
    Type: Grant
    Filed: December 23, 2013
    Date of Patent: January 17, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Chin-Yi Cho, Yi-Chuan Teng, Shang-Ying Tsai, Li-Min Hung, Yao-Te Huang, Jung-Huei Peng
  • Patent number: 9533876
    Abstract: A method includes forming a MEMS device, forming a bond layer adjacent the MEMS device, and forming a protection layer over the bond layer. The steps of forming the bond layer and the protection layer include in-situ deposition of the bond layer and the protection layer.
    Type: Grant
    Filed: June 5, 2015
    Date of Patent: January 3, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ping-Yin Liu, Xin-Hua Huang, Hsin-Ting Huang, Yuan-Chih Hsieh, Jung-Huei Peng, Lan-Lin Chao, Chia-Shiung Tsai, Chun-Wen Cheng
  • Publication number: 20160368762
    Abstract: An embodiment is MEMS device including a first MEMS die having a first cavity at a first pressure, a second MEMS die having a second cavity at a second pressure, the second pressure being different from the first pressure, and a molding material surrounding the first MEMS die and the second MEMS die, the molding material having a first surface over the first and the second MEMS dies. The device further includes a first set of electrical connectors in the molding material, each of the first set of electrical connectors coupling at least one of the first and the second MEMS dies to the first surface of the molding material, and a second set of electrical connectors over the first surface of the molding material, each of the second set of electrical connectors being coupled to at least one of the first set of electrical connectors.
    Type: Application
    Filed: May 20, 2016
    Publication date: December 22, 2016
    Inventors: Chun-Wen Cheng, Jung-Huei Peng, Shang-Ying Tsai, Hung-Chia Tsai, Yi-Chuan Teng
  • Patent number: 9469524
    Abstract: A method of forming a semiconductor device includes bonding a capping wafer and a base wafer to form a wafer package. The base wafer includes a first chip package portion, a second chip package portion, and a third chip package portion. The capping wafer includes a plurality of isolation trenches. Each isolation trench of the plurality of isolation trenches is substantially aligned with a corresponding trench region of one of the first chip package portion, the second chip package portion or the third chip package portion. The method also includes removing a portion of the capping wafer to expose a first chip package portion contact, a second chip package portion contact, and a third chip package portion contact. The method further includes separating the wafer package into a first chip package configured to perform a first operation, a second chip package configured to perform a second operation, and a third chip package configured to perform a third operation.
    Type: Grant
    Filed: September 11, 2015
    Date of Patent: October 18, 2016
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chun-wen Cheng, Jung-Huei Peng, Shang-Ying Tsai, Hung-Chia Tsai, Yi-Chuan Teng
  • Patent number: 9462402
    Abstract: Some embodiments relate to a manufacturing process that combines a MEMS capacitor of a microelectromechanical systems (MEMS) microphone and an integrated circuit (IC) onto a single substrate. A dielectric is formed over a device substrate. A conductive diaphragm and a conductive backplate are formed within the dielectric, with a sacrificial portion of the dielectric between them. A first recess is formed, which extends through the dielectric to an upper surface of the conductive diaphragm. A second recess is formed, which extends through the substrate and dielectric to a lower surface of the conductive backplate. The sacrificial layer is removed to create an air gap between the conductive diaphragm and the conductive backplate. The air gap joins the first and second recesses to form a cavity that extends continuously through the dielectric and the substrate. The present disclosure is also directed to the semiconductor structure of the MEMS microphone resulting from the manufacturing process.
    Type: Grant
    Filed: February 12, 2015
    Date of Patent: October 4, 2016
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chin-Yi Cho, Chia-Hua Chu, Chun-Wen Cheng, Jung-Huei Peng, Yao-Te Huang
  • Publication number: 20160271607
    Abstract: The present disclosure provides flow cells and methods of fabricating flow cells. The method includes combining three portions: a first substrate, a second substrate, and microfluidic channels between the first substrate and the second substrate having walls of a photoresist dry film. Through-holes for inlet and outlet are formed in the first substrate or the second substrate. Patterned capture sites are stamped on the first substrate and the second substrate by a nanoimprint lithography process. In other embodiments, parts of the patterned capture sites are selectively attached to a surface chemistry pattern formed of silicon oxide islands each disposed on an outcrop of a soft bottom layer.
    Type: Application
    Filed: May 27, 2016
    Publication date: September 22, 2016
    Inventors: Shang-Ying Tsai, Li-Min Hung, Jung-Huei Peng
  • Publication number: 20160241979
    Abstract: Some embodiments relate to a manufacturing process that combines a MEMS capacitor of a microelectromechanical systems (MEMS) microphone and an integrated circuit (IC) onto a single substrate. A dielectric is formed over a device substrate. A conductive diaphragm and a conductive backplate are formed within the dielectric, with a sacrificial portion of the dielectric between them. A first recess is formed, which extends through the dielectric to an upper surface of the conductive diaphragm. A second recess is formed, which extends through the substrate and dielectric to a lower surface of the conductive backplate. The sacrificial layer is removed to create an air gap between the conductive diaphragm and the conductive backplate. The air gap joins the first and second recesses to form a cavity that extends continuously through the dielectric and the substrate. The present disclosure is also directed to the semiconductor structure of the MEMS microphone resulting from the manufacturing process.
    Type: Application
    Filed: February 12, 2015
    Publication date: August 18, 2016
    Inventors: Chin-Yi Cho, Chia-Hua Chu, Chun-Wen Cheng, Jung-Huei Peng, Yao-Te Huang
  • Publication number: 20160229693
    Abstract: A bond free of an anti-stiction layer and bonding method is disclosed. An exemplary method includes forming a first bonding layer; forming an interlayer over the first bonding layer; forming an anti-stiction layer over the interlayer; and forming a liquid from the first bonding layer and interlayer, such that the anti-stiction layer floats over the first bonding layer. A second bonding layer can be bonded to the first bonding layer while the anti-stiction layer floats over the first bonding layer, such that a bond between the first and second bonding layers is free of the anti-stiction layer.
    Type: Application
    Filed: December 9, 2014
    Publication date: August 11, 2016
    Inventors: Ping-Yin Liu, Li-Cheng Chu, Hung-Hua Lin, Shang-Ying Tsai, Yuan-Chih Hsieh, Jung-Huei Peng, Lan-Lin Chao, Chia-Shiung Tsai, Chun-Wen Cheng
  • Patent number: 9394161
    Abstract: The present disclosure relates to method of forming a MEMS device that mitigates the above mentioned difficulties. In some embodiments, the present disclosure relates to a method of forming a MEMS device, which forms one or more cavities within a first side of a carrier substrate. The first side of the carrier substrate is then bonded to a dielectric layer disposed on a micro-electromechanical system (MEMS) substrate, and the MEMS substrate is subsequently patterned to define a soft mechanical structure over the one or more cavities. The dielectric layer is then selectively removed, using a dry etching process, to release the one or more soft mechanical structures. A CMOS substrate is bonded to a second side of the MEMS substrate, by way of a bonding structure disposed between the CMOS substrate and the MEMS substrate, using a low-temperature bonding process.
    Type: Grant
    Filed: March 5, 2015
    Date of Patent: July 19, 2016
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chun-Wen Cheng, Chia-Hua Chu, Jung-Huei Peng
  • Publication number: 20160157038
    Abstract: The present disclosure provides one embodiment of an integrated microphone structure. The integrated microphone structure includes a first silicon substrate patterned as a first plate. A silicon oxide layer formed on one side of the first silicon substrate. A second silicon substrate bonded to the first substrate through the silicon oxide layer such that the silicon oxide layer is sandwiched between the first and second silicon substrates. A diaphragm secured on the silicon oxide layer and disposed between the first and second silicon substrates such that the first plate and the diaphragm are configured to form a capacitive microphone.
    Type: Application
    Filed: February 8, 2016
    Publication date: June 2, 2016
    Inventors: Jung-Huei Peng, Chia-Hua Chu, Chun-wen Cheng, Chin-Yi Cho, Li-Min Hung, Yao-Te Huang
  • Patent number: 9352956
    Abstract: An embodiment is MEMS device including a first MEMS die having a first cavity at a first pressure, a second MEMS die having a second cavity at a second pressure, the second pressure being different from the first pressure, and a molding material surrounding the first MEMS die and the second MEMS die, the molding material having a first surface over the first and the second MEMS dies. The device further includes a first set of electrical connectors in the molding material, each of the first set of electrical connectors coupling at least one of the first and the second MEMS dies to the first surface of the molding material, and a second set of electrical connectors over the first surface of the molding material, each of the second set of electrical connectors being coupled to at least one of the first set of electrical connectors.
    Type: Grant
    Filed: January 16, 2014
    Date of Patent: May 31, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-Wen Cheng, Jung-Huei Peng, Shang-Ying Tsai, Hung-Chia Tsai, Yi-Chuan Teng
  • Patent number: 9355896
    Abstract: A package system includes a first substrate; and a second substrate electrically coupled with the first substrate. The package system further includes a semiconductor material between the first substrate and the second substrate. The semiconductor material includes a pad, and at least one guard ring surrounding the pad and spaced from the pad. The package system further includes a metallic material bonded to the semiconductor material, wherein the metallic material at least partially fills at least one opening in at least one of the first substrate or the second substrate.
    Type: Grant
    Filed: July 31, 2015
    Date of Patent: May 31, 2016
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chia-Pao Shu, Chun-wen Cheng, Kuei-Sung Chang, Hsin-Ting Huang, Shang-Ying Tsai, Jung-Huei Peng
  • Patent number: 9352315
    Abstract: The present disclosure provides flow cells and methods of fabricating flow cells. The method includes combining three portions: a first substrate, a second substrate, and microfluidic channels between the first substrate and the second substrate having walls of a photoresist dry film. Through-holes for inlet and outlet are formed in the first substrate or the second substrate. Patterned capture sites are stamped on the first substrate and the second substrate by a nanoimprint lithography process. In other embodiments, parts of the patterned capture sites are selectively attached to a surface chemistry pattern formed of silicon oxide islands each disposed on an outcrop of a soft bottom layer.
    Type: Grant
    Filed: September 27, 2013
    Date of Patent: May 31, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shang-Ying Tsai, Li-Min Hung, Jung-Huei Peng
  • Publication number: 20160137492
    Abstract: The present disclosure relates to method of forming a MEMS device that mitigates the above mentioned difficulties. In some embodiments, the present disclosure relates to a method of forming a MEMS device, which forms one or more cavities within a first side of a carrier substrate. The first side of the carrier substrate is then bonded to a dielectric layer disposed on a micro-electromechanical system (MEMS) substrate, and the MEMS substrate is subsequently patterned to define a soft mechanical structure over the one or more cavities. The dielectric layer is then selectively removed, using a dry etching process, to release the one or more soft mechanical structures. A CMOS substrate is bonded to a second side of the MEMS substrate, by way of a bonding structure disposed between the CMOS substrate and the MEMS substrate, using a low-temperature bonding process.
    Type: Application
    Filed: March 5, 2015
    Publication date: May 19, 2016
    Inventors: Chun-Wen Cheng, Chia-Hua Chu, Jung-Huei Peng
  • Publication number: 20160096722
    Abstract: A cap and substrate having an electrical connection at a wafer level includes providing a substrate and forming an electrically conductive ground structure in the substrate and electrically coupled to the substrate. An electrically conductive path to the ground structure is formed in the substrate. A top cap is then provided, wherein the top cap includes an electrically conductive surface. The top cap is bonded to the substrate so that the electrically conductive surface of the top cap is electrically coupled to the path to the ground structure.
    Type: Application
    Filed: December 14, 2015
    Publication date: April 7, 2016
    Inventor: Jung-Huei Peng