Abstract: Disclosed is an antibacterial flexible cover window formed using an antibacterial coating composition containing antibacterial nanoparticles dispersed in a resin coating solution. In the antibacterial coating composition, 0.001 to 0.5 parts by weight of the antibacterial nanoparticles are dispersed in 100 parts by weight of the resin coating solution. The antibacterial flexible cover window includes an antibacterial layer that is formed by applying the antibacterial coating composition to a glass substrate. Therefore, the antibacterial flexible cover window exhibits a good and long-lasting antibacterial activity.

Abstract: A writing method for a non-volatile memory device includes; performing a sensing operation, comparing write data with read data retrieved by the sensing operation, determining whether the write data is set state when the write data and the read data are the same, performing a set operation when the write data is set state, and not performing a write operation when the write data is not set data.

Abstract: A memory device includes a plurality of memory cells, each memory cell including a switching element and a data storage element having a phase change material, and each memory cell connected to one of a plurality of wordlines and to one of a plurality of bitlines, a decoder circuit configured to determine at least one of the plurality of memory cells as a selected memory cell, and a programming circuit configured to input a program current to the selected memory cell to perform a program operation, to detect a holding voltage of the selected memory cell, and to adjust a magnitude of the program current based on the detected holding voltage. The selected memory cell is turned off when a voltage across the selected memory cell is lower than the holding voltage.

Abstract: A writing method for a non-volatile memory device includes; performing a sensing operation, comparing write data with read data retrieved by the sensing operation, determining whether the write data is set state when the write data and the read data are the same, performing a set operation when the write data is set state, and not performing a write operation when the write data is not set data.

Abstract: A memory device includes a plurality of memory cells, each memory cell including a switching element and a data storage element having a phase change material, and each memory cell connected to one of a plurality of wordlines and to one of a plurality of bitlines, a decoder circuit configured to determine at least one of the plurality of memory cells as a selected memory cell, and a programming circuit configured to input a program current to the selected memory cell to perform a program operation, to detect a holding voltage of the selected memory cell, and to adjust a magnitude of the program current based on the detected holding voltage. The selected memory cell is turned off when a voltage across the selected memory cell is lower than the holding voltage.

Abstract: A memory device includes: a memory cell array including a plurality of memory cells, wherein each of the plurality of memory cells includes a switching element, and a data storage element connected to the switching element, wherein the data storage element includes a phase change material; and a memory controller configured to perform a control operation with respect to a first memory cell of the plurality of memory cells by inputting an operating current to the first memory cell, and inputting a compensation current flowing from the data storage element to the switching element in the first memory cell before or after inputting the operating current to the first memory cell.

Abstract: A memory device including: a memory cell array, including a memory cell having a switch element and a data storage element connected to the switch element, wherein the data storage element has a phase change material; and a memory controller for inputting a first read current to the memory cell to detect a first read voltage, inputting a second read current to the memory cell to detect a second read voltage, and inputting a compensation current to the memory cell, wherein the compensation current lowers a resistance value of the data storage element, the compensation current is input when a first state of the memory cell is different from a second state of the memory cell, the first state is determined using the first read voltage and the second state is determined using the second read voltage.

Abstract: A nonvolatile memory device includes a memory cell array including a plurality of first segments having a write data, and a plurality of second segments having a programmed information defining a programmed segment from the plurality of first segments. A randomizer is configured to randomize the write data. An error correction circuit is configured to perform an error correction operation on the write data. A control logic is configured to determine the programmed information from an address received from a memory controller, and to determine whether to operate the randomizer and the error correction circuit based on the determination of the programmed information during the program operation. A page buffer is configured to store the write data and the programmed information during the randomizing and the error correction operation.

Abstract: An operating method of a memory device is provided. Using a statistical model, a resistance Rdyn of a variable resistor of a memory cell and a variation ?Rdyn of the resistance Rdyn are determined. Based on the resistance Rdyn and the variation ?Rdyn of the resistance Rdyn, an average resistance Rdyn_avg and a beta value of the variable resistor are determined. Then, using the average resistance Rdyn_avg and the beta value, a resistance Ra of an insertion resistor, connected between the memory cell and a power supply generator for generating a power supply voltage VPGM, is determined.

Abstract: A memory device including: a memory cell array, including a memory cell having a switch element and a data storage element connected to the switch element, wherein the data storage element has a phase change material; and a memory controller for inputting a first read current to the memory cell to detect a first read voltage, inputting a second read current to the memory cell to detect a second read voltage, and inputting a compensation current to the memory cell, wherein the compensation current lowers a resistance value of the data storage element, the compensation current is input when a first state of the memory cell is different from a second state of the memory cell, the first state is determined using the first read voltage and the second state is determined using the second read voltage.

Abstract: A memory device includes: a memory cell array including a plurality of memory cells, wherein each of the plurality of memory cells includes a switching element, and a data storage element connected to the switching element, wherein the data storage element includes a phase change material; and a memory controller configured to perform a control operation with respect to a first memory cell of the plurality of memory cells by inputting an operating current to the first memory cell, and inputting a compensation current flowing from the data storage element to the switching element in the first memory cell before or after inputting the operating current to the first memory cell.

Abstract: An operating method of a memory device is provided. Using a statistical model, a resistance Rdyn of a variable resistor of a memory cell and a variation ?Rdyn of the resistance Rdyn are determined. Based on the resistance Rdyn and the variation ?Rdyn of the resistance Rdyn, an average resistance Rdyn_avg and a beta value of the variable resistor are determined. Then, using the average resistance Rdyn_avg and the beta value, a resistance Ra of an insertion resistor, connected between the memory cell and a power supply generator for generating a power supply voltage VPGM, is determined.

Abstract: A memory device having a resistance change material and an operating method of the memory device are provided. A memory device includes a memory cell array including first and second resistive memory cells, which store different data according to the change of their resistance; a buffer including first and second storage regions corresponding to the first and second resistive memory cells, respectively; and a control circuit receiving program data to be programmed to the memory cell array, comparing first data stored in the first storage region and second data stored in the first resistive memory cell, and as a result of the comparison determining one of the first and second storage regions as a storage region to which to write the program data.

Abstract: A memory device having a resistance change material and an operating method of the memory device are provided. A memory device includes a memory cell array including first and second resistive memory cells, which store different data according to the change of their resistance; a buffer including first and second storage regions corresponding to the first and second resistive memory cells, respectively; and a control circuit receiving program data to be programmed to the memory cell array, comparing first data stored in the first storage region and second data stored in the first resistive memory cell, and as a result of the comparison determining one of the first and second storage regions as a storage region to which to write the program data.

Abstract: A method of operating a non-volatile memory device, includes, storing sensed data in a page buffer circuit by sensing data stored in a source page of a memory cell array, outputting the sensed data from the page buffer circuit, performing error correction code (ECC) decoding of the sensed data output from the page buffer circuit, storing the decoded data in the page buffer circuit, and providing de-randomized data to an external device as read data by performing de-randomizing of the decoded data output from the page buffer circuit using seed values corresponding to the source page.

Abstract: A nonvolatile memory device includes a memory cell array including a plurality of first segments having a write data, and a plurality of second segments having a programmed information defining a programmed segment from the plurality of first segments. A randomizer is configured to randomize the write data. An error correction circuit is configured to perform an error correction operation on the write data. A control logic is configured to determine the programmed information from an address received from a memory controller, and to determine whether to operate the randomizer and the error correction circuit based on the determination of the programmed information during the program operation. A page buffer is configured to store the write data and the programmed information during the randomizing and the error correction operation.

Abstract: A method of operating a non-volatile memory device, includes, storing sensed data in a page buffer circuit by sensing data stored in a source page of a memory cell array, outputting the sensed data from the page buffer circuit, performing error correction code (ECC) decoding of the sensed data output from the page buffer circuit, storing the decoded data in the page buffer circuit, and providing de-randomized data to an external device as read data by performing de-randomizing of the decoded data output from the page buffer circuit using seed values corresponding to the source page.

Abstract: A method of operating a nonvolatile memory device comprises applying a read current with a first level to a nonvolatile memory cell comprising a variable resistance material, determining read data based on the applied read current, checking a syndrome corresponding to the read data to determine whether the read data is pass or fail, changing the read current from the first level to a second level, which is different from the first level, according to the determination of whether the read data is pass or fail, and performing a read-retry operation comprising applying the read current of the second level to the nonvolatile memory cell.

Abstract: A nonvolatile memory device utilizes a variable resistive element. The nonvolatile memory device includes a plurality of banks and first to third write global bit lines arranged to cross the plurality of banks. Each of the plurality of banks includes a plurality of nonvolatile memory cells using resistive material. The first, the second and the third write global bit lines are disposed directly adjacent to one another in order. When a write current is supplied to the first write global bit line during a write period, a fixed voltage is applied to the second write global bit line while the third global bit line floats.

Abstract: A method of operating a nonvolatile memory device comprises applying a read current with a first level to a nonvolatile memory cell comprising a variable resistance material, determining read data based on the applied read current, checking a syndrome corresponding to the read data to determine whether the read data is pass or fail, changing the read current from the first level to a second level, which is different from the first level, according to the determination of whether the read data is pass or fail, and performing a read-retry operation comprising applying the read current of the second level to the nonvolatile memory cell.