Patents by Inventor Kai Lu

Kai Lu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9748205
    Abstract: A molding type power module includes: a leadframe including a first step and a second step; a first planar power device including a first surface having electrodes and a second surface opposite to the first surface, the electrodes being correspondingly bond to the first step respectively; and a second planar power device including a first surface having electrodes and a second surface opposite to the first surface, the electrodes being correspondingly bond to the second step respectively, wherein, the first surface of the first planar power device and the first surface of the second planar power device face each other, the projected areas thereof on a vertical direction at least partially overlap, and the first planar power device at least has one electrode electronically connected with the electrodes of the second planar power device.
    Type: Grant
    Filed: March 25, 2016
    Date of Patent: August 29, 2017
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Kai Lu, Zhenqing Zhao, Tao Wang, Le Liang
  • Patent number: 9716117
    Abstract: The invention relates to the field of display technologies, and discloses a method for producing a via, a method for producing an array substrate, an array substrate and a display device to prevent a chamfer from being formed in producing the via, to promote the product quality and improve the display effect of the display device. The method for producing a via comprises: employing a first etching process to partially etch a top film layer in an area that needs to form a via above an electrode, wherein the vertical etching amount achieved by employing the first etching process is less than the thickness of the top film layer; and employing a second etching process for which the vertical etching rate is larger than the lateral etching rate to etch the remaining part in the area that needs to form a via, until the electrode is exposed.
    Type: Grant
    Filed: June 18, 2015
    Date of Patent: July 25, 2017
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., BEIJING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Changjiang Yan, Kai Lu, Jian Guo, Zhenyu Xie
  • Patent number: 9679786
    Abstract: The disclosure discloses a packaging module of a power converting circuit and a method for manufacturing the same. The packaging module of the power converting circuit includes a substrate, a molding layer and a plurality of pins. A power device is assembled at the substrate, a plurality of pins electrically are coupled to the power device, the molding layer covers the surface of the substrate with the power device, and at least a contact surface of the pins configured to electrically connect an external circuit is exposed. The molding layer includes a main hat-body part and a hat-brim part, the main hat-body part and the hat-brim part form a hat-shaped molding layer, and the hat-brim part is used to increase a creepage distance between the contact surfaces of the pins located at the top of the molding layer and the bottom of the substrate.
    Type: Grant
    Filed: February 24, 2016
    Date of Patent: June 13, 2017
    Assignee: Delta Electronics, Inc.
    Inventors: Shouyu Hong, Kai Lu, Zhenqing Zhao
  • Patent number: 9653424
    Abstract: This invention discloses a semiconductor package with adhesive material pre-printed on the lead frame and chip, and the manufacturing method. The adhesive material is applied onto the chip carrier and the pin of the lead frame and also on the front electrode of the semiconductor chip via pre-printing. The back of the semiconductor chip is adhered on the chip carrier, and the front electrode of the semiconductor chip and the pin are connected respectively with a metal connector. The size, shape and thickness of the adhesive material are applied according to different application requirements according to size and shapes of the contact zone of the semiconductor chip and the metal connector. Particularly, the adhesive zones are formed by pre-printing the adhesive material thus significantly enhance the quality and performance of semiconductor products, and improves the productivity.
    Type: Grant
    Filed: October 29, 2014
    Date of Patent: May 16, 2017
    Assignee: Alpha and Omega Semiconductor Incorporated
    Inventors: Xiaotian Zhang, Jun Lu, Kai Lu
  • Publication number: 20170133314
    Abstract: A package structure includes a first carrier plate, a second carrier plate, a pin group and an encapsulant member. A power component is disposed on a first top surface of the first carrier plate. The second carrier plate is disposed on the first top surface of the first carrier plate. A driving circuit is disposed on a second top surface of the second carrier plate for driving the power component. An opening runs through the second carrier plate, and the power component is accommodated within the opening. The pin group is assembled on the first carrier plate and/or the second carrier plate. The encapsulant member encapsulates the first carrier plate, the second carrier plate, a part of the first pin group and a part of the second pin group, so that the first pin group and the second pin group are partially exposed outside the encapsulant member.
    Type: Application
    Filed: May 11, 2016
    Publication date: May 11, 2017
    Inventors: Kai Lu, Zhenqing Zhao, Tao Wang
  • Publication number: 20170062386
    Abstract: The embodiments of the present disclosure relate to a power package module of multiple power chips and a method of manufacturing a power chip unit. The power package module of multiple power chips includes: a power chip unit including at least two power chips placed in parallel and a bonding part bonding the two power chips; a substrate supporting the power chip unit and including a metal layer electronically connecting with the power chip unit; and a sealing layer isolating the power chip unit on the substrate from surroundings to seal the power chip unit; the bonding part and the sealing layer are made from different insulated material, the distance of a gap between the two power chips placed in parallel is smaller than or equal to a preset width, and the bonding part is filled in the gap, insulatedly bonding the two power chips placed in parallel.
    Type: Application
    Filed: August 8, 2016
    Publication date: March 2, 2017
    Applicant: DELTA ELECTRONICS (SHANGHAI) CO., LTD
    Inventors: Tao WANG, Zhenqing ZHAO, Kai LU, Zeng LI, Jianhong ZENG
  • Publication number: 20170025379
    Abstract: A power module package includes a single-layered circuit board, a first electronic component, and a second electronic component. The single-layered circuit board includes an insulating substrate and a conductive layer thereon. A bottom surface of the conductive layer touches a top surface of the insulating substrate. The insulating substrate has plural first openings to allow the conductive layer to be exposed from the bottom surface of the insulating substrate. The first electronic component is disposed on a top surface of the conductive layer. The second electronic component is disposed on the bottom surface of the insulating substrate and received in the first openings. The second electronic component is connected to the conductive layer via the first openings. At least one of the first electronic component and the second electronic component is a bare die.
    Type: Application
    Filed: July 14, 2016
    Publication date: January 26, 2017
    Inventors: Le LIANG, Kai LU, Zhen-Qing ZHAO, Zeng LI
  • Publication number: 20170012030
    Abstract: The present disclosure provides a power module with the integration of a control circuit at least, including: a power substrate; a power device mounted on the power substrate; and at least one control substrate which supports the control circuit, is electrically connected with the power substrate and disposed at an angle of inclination on a surface of the power substrate on which the power device is mounted; wherein the angle of inclination is greater than or equal to 45 degrees and smaller than or equal to 135 degrees. In the power module provided by the present disclosure, only the power substrate as well as the connections between the control substrate and the power substrate occupies the footprint area of the power module, and thus the horizontal footprint area of the power module is effectively reduced and thereby the power density of the power module is increased.
    Type: Application
    Filed: May 11, 2016
    Publication date: January 12, 2017
    Applicant: DELTA ELECTRONICS,INC.
    Inventors: Tao WANG, Zhenqing ZHAO, Zeng LI, Kai LU
  • Publication number: 20160381785
    Abstract: A molding type power module includes: a leadframe including a first step and a second step; a first planar power device including a first surface having electrodes and a second surface opposite to the first surface, the electrodes being correspondingly bond to the first step respectively; and a second planar power device including a first surface having electrodes and a second surface opposite to the first surface, the electrodes being correspondingly bond to the second step respectively, wherein, the first surface of the first planar power device and the first surface of the second planar power device face each other, the projected areas thereof on a vertical direction at least partially overlap, and the first planar power device at least has one electrode electronically connected with the electrodes of the second planar power device.
    Type: Application
    Filed: March 25, 2016
    Publication date: December 29, 2016
    Applicant: DELTA ELECTRONICS, INC.
    Inventors: Kai LU, Zhenqing ZHAO, Tao WANG, Le LIANG
  • Publication number: 20160380005
    Abstract: The present invention provides an array substrate, a preparation method thereof and a display device. The array substrate includes at least one thin film transistor and a resin layer having at least one resin via hole, wherein a film-thickness-difference-adjusting layer used for reducing the film thickness difference at the resin via hole is arranged at the lower part of the resin layer in at least a part of the resin via hole. By providing the film-thickness-difference-adjusting layer, the film thickness difference at the resin via hole can be effectively reduced, and when a photolithographic process is performed, the difference of the thickness of the photoresist here and the thicknesses at other positions is reduced, so that the via hole fluctuation of a passivation layer caused by the larger film thickness difference at the resin via hole is improved, and the metal residue problem of the pixel electrodes is effectively avoided.
    Type: Application
    Filed: April 14, 2016
    Publication date: December 29, 2016
    Inventors: Xuecheng HOU, Kai LU, Jian GUO
  • Publication number: 20160365306
    Abstract: A method of fabricating a package module includes placing a pin frame having plural pins on a circuit substrate; bonding the pins to corresponding bonding areas on a circuit substrate, thereby connecting the pins to the bonding areas; cutting off a connecting portion of the pin frame; and bending the pins to be vertical to the circuit substrate. By placing the pins on the corresponding bonding areas on the circuit substrate through the pin frame, and then cutting off the connecting portion of the pin frame and bending the pins, the efficiency of assembling the package module can be greatly promoted.
    Type: Application
    Filed: March 14, 2016
    Publication date: December 15, 2016
    Inventors: Kai LU, Zhen-Qing ZHAO, Tao WANG
  • Publication number: 20160254217
    Abstract: The present disclosure discloses a package module of a power conversion circuit and a manufacturing method thereof. The package module of the power conversion circuit is surface-mountable on a system board. The package module of the power conversion circuit includes: a substrate, a power device die, a molding layer and a plurality of pins. The substrate has a metal layer, an insulating substrate layer and a thermal conductive layer. The insulating substrate layer is disposed between the metal layer and the thermal conductive layer. The power device die is coupled to the metal layer. Devices on the metal layer of the substrate are embedded in the molding layer. The plurality of pins is electrically coupled to the metal layer and embedded in the molding layer, at least a contact surface of each of the pins which is electrically coupled to the system board is exposed, and the contact surface is parallel and/or perpendicular to the thermal conductive layer.
    Type: Application
    Filed: October 21, 2015
    Publication date: September 1, 2016
    Inventors: Kai LU, Zhenqing ZHAO, Shouyu HONG, Tao WANG, Le LIANG
  • Publication number: 20160254218
    Abstract: The disclosure discloses a packaging module of a power converting circuit and a method for manufacturing the same. The packaging module of the power converting circuit includes a substrate, a molding layer and a plurality of pins. A power device is assembled at the substrate, a plurality of pins electrically are coupled to the power device, the molding layer covers the surface of the substrate with the power device, and at least a contact surface of the pins configured to electrically connect an external circuit is exposed. The molding layer includes a main hat-body part and a hat-brim part, the main hat-body part and the hat-brim part form a hat-shaped molding layer, and the hat-brim part is used to increase a creepage distance between the contact surfaces of the pins located at the top of the molding layer and the bottom of the substrate.
    Type: Application
    Filed: February 24, 2016
    Publication date: September 1, 2016
    Applicant: DELTA ELECTRONICS,INC.
    Inventors: Shouyu HONG, Kai LU, Zhenqing ZHAO
  • Publication number: 20160113107
    Abstract: The disclosure discloses a power module. The power module includes a substrate, a power chip, a bonding material, and at least one spacer. The substrate includes a circuit-patterned layer. The power chip bonded to the circuit-patterned layer by the bonding material. The spacer is located between the circuit-patterned layer and the power chip, so as to keep the power chip away from the circuit-patterned layer in a distance.
    Type: Application
    Filed: August 6, 2015
    Publication date: April 21, 2016
    Inventors: Tao WANG, Zhen-Qing ZHAO, Kai LU, Zheng-Fen WAN, Hai-Bin XU
  • Publication number: 20160079287
    Abstract: The invention relates to the field of display technologies, and discloses a method for producing a via, a method for producing an array substrate, an array substrate and a display device to prevent a chamfer from being formed in producing the via, to promote the product quality and improve the display effect of the display device. The method for producing a via comprises: employing a first etching process to partially etch a top film layer in an area that needs to form a via above an electrode, wherein the vertical etching amount achieved by employing the first etching process is less than the thickness of the top film layer; and employing a second etching process for which the vertical etching rate is larger than the lateral etching rate to etch the remaining part in the area that needs to form a via, until the electrode is exposed.
    Type: Application
    Filed: June 18, 2015
    Publication date: March 17, 2016
    Inventors: Changjiang Yan, Kai Lu, Jian Guo, Zhenyu Xie
  • Patent number: 9231294
    Abstract: The present invention provides a method and an apparatus for compensating frequency shifting of an antenna, applicable to a wireless communication device having at least one frequency shifted operating mode, in which a frequency shifting exists due to a variation of a device use mode or an environmental condition, wherein the method comprises setting in the antenna at least one compensation matching circuit corresponding to the at least one frequency shifted operating mode; detecting the use mode, in which the wireless communication device operates; when the wireless communication device is in the frequency shifted operating mode, switching to a compensation matching circuit corresponding to the frequency shifted operating mode as detected. In the present invention, the difficulty in the bandwidth design of the antenna is reduced, and the effect of the variation of the use mode or environmental condition on the performance of the antenna is compensated adaptively.
    Type: Grant
    Filed: March 18, 2013
    Date of Patent: January 5, 2016
    Assignee: LENOVO (BEIJING) CO., LTD.
    Inventors: Kai Lu, Zhaowei Hu, Dafei Mo, Chunmei Ye
  • Patent number: 9158158
    Abstract: A liquid crystal display device and a phase compensation method for the same are provided. The liquid crystal display device includes: a lower substrate, an upper substrate opposed to the lower substrate, a first polarizer assembly located on a surface of the lower substrate, a second polarizer assembly located on a surface of the upper substrate and a liquid crystal layer located between the upper substrate and the lower substrate; the first polarizer assembly including a first polarizing plate and a first optical retardation thin film; the second polarizer assembly including a second polarizing plate and a second optical retardation thin film; wherein, the first polarizer assembly further includes a first wave plate; the second polarizer assembly further includes a second wave plate.
    Type: Grant
    Filed: July 16, 2013
    Date of Patent: October 13, 2015
    Assignee: BEIJING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Xuecheng Hou, Ang Xiao, Kai Lu
  • Patent number: 8833759
    Abstract: A printer includes an enclosure, a paper output tray, and two positioning devices. The enclosure includes a receiving base and two side portions extending from the receiving base. The paper output tray is pivotally mounted between the two side portions. The two positioning devices are mounted to the two side portions. The paper output tray is placed in the receiving base in a first position. The paper output tray can rotate to resist each of the two positioning devices and move to a side portion, thereby enabling the paper output tray to rotate to a second position. Each of the two positioning devices restores to an original position to support the paper output tray stably in the second position, to enable the removal of a paper jam or other circumstance.
    Type: Grant
    Filed: April 15, 2013
    Date of Patent: September 16, 2014
    Assignee: Hon Hai Precision Industry Co., Ltd.
    Inventors: Kai Fan Chiang, Shu-Kai Lu, Chin-Ta Ma
  • Patent number: D731087
    Type: Grant
    Filed: July 29, 2013
    Date of Patent: June 2, 2015
    Assignee: Formosa Epitaxy Incorporation
    Inventors: Chi-Chih Pu, Chen-Hong Lee, Li-Kai Lu, Wei-Kang Cheng, Shyi-Ming Pan
  • Patent number: D731680
    Type: Grant
    Filed: July 30, 2013
    Date of Patent: June 9, 2015
    Assignee: Formosa Epitaxy Incorporation
    Inventors: Chi-Chih Pu, Chen-Hong Lee, Li-Kai Lu, Wei-Kang Cheng, Shyi-Ming Pan