Abstract: According to one embodiment, a semiconductor memory device includes: a word line; a first memory cell; a first circuit; and a second circuit. The first memory cell is connected to the word line. The first circuit generates a first voltage having a waveform including a first time period during which a voltage value increases with time and a second time period during which the voltage value decreases with time, and applies the generated first voltage to the word line. The second circuit measures first time from a first timing when a state of the first memory cell changes according to the first voltage to a second timing when the state of the first memory cell changes according to the first voltage after the first timing. The second circuit determines first data stored in the first memory cell on the basis of the measured first time.

Abstract: It is possible to reduce resistance variations of a member connecting a through-silicon via to a line and improve wiring reliability. A hole through which the through-silicon via is to be stretched is created and an over-etching process is carried out on a wiring layer including the line. Then, by embedding copper in the hole, the through-silicon via made of the copper can be created. After the through-silicon via has been connected to the line made of aluminum through the member which is a connection area, the connection area is alloyed in a thermal treatment in order to electrically connect the through-silicon via to the line. Thus, it is possible to reduce variations of a resistance between the through-silicon via and the line and also improve wiring reliability as well. The present technology can be applied to a semiconductor device and a method for manufacturing the semiconductor device.

Abstract: A light emitting element and display device are disclosed. In one example, a light emitting element includes a first electrode formed on a base body. A first insulation layer is formed on the base body and the first electrode and has an aperture portion in which a part of the first electrode is exposed. A second insulation layer is formed on the first insulation layer and has a protruding end portion protruding from the aperture portion. A third insulation layer is formed on the second insulation layer and has an end portion recessed from the protruding end portion. A charge injection/transport layer is formed over the second insulation layer and the third insulation layer. An organic layer includes a light emitting layer, and a second electrode formed on the organic layer. At least a part of the charge injection/transport layer is discontinuous at the protruding end portion.

Abstract: There is provided semiconductor devices and methods of forming the same, the semiconductor devices including: a first semiconductor element having a first electrode; a second semiconductor element having a second electrode; a Sn-based micro-solder bump formed on the second electrode; and a concave bump pad including the first electrode opposite to the micro-solder bump, where the first electrode is connected to the second electrode via the micro-solder bump and the concave bump pad.

Abstract: According to one embodiment, a semiconductor memory device includes: a word line; a first memory cell; a first circuit; and a second circuit. The first memory cell is connected to the word line. The first circuit generates a first voltage having a waveform including a first time period during which a voltage value increases with time and a second time period during which the voltage value decreases with time, and applies the generated first voltage to the word line. The second circuit measures first time from a first timing when a state of the first memory cell changes according to the first voltage to a second timing when the state of the first memory cell changes according to the first voltage after the first timing. The second circuit determines first data stored in the first memory cell on the basis of the measured first time.

Abstract: A light emitting element and display device are disclosed. In one example, a light emitting element includes a first electrode formed on a base body. A first insulation layer is formed on the base body and the first electrode and has an aperture portion in which a part of the first electrode is exposed. A second insulation layer is formed on the first insulation layer and has a protruding end portion protruding from the aperture portion. A third insulation layer is formed on the second insulation layer and has an end portion recessed from the protruding end portion. A charge injection/transport layer is formed over the second insulation layer and the third insulation layer. An organic layer includes a light emitting layer, and a second electrode formed on the organic layer. At least a part of the charge injection/transport layer is discontinuous at the protruding end portion.

Abstract: A light emitting element and display device are disclosed. In one example, a light emitting element includes a first electrode formed on a base body. A first insulation layer is formed on the base body and the first electrode and has an aperture portion in which a part of the first electrode is exposed. A second insulation layer is formed on the first insulation layer and has a protruding end portion protruding from the aperture portion. A third insulation layer is formed on the second insulation layer and has an end portion recessed from the protruding end portion. A charge injection/transport layer is formed over the second insulation layer and the third insulation layer. An organic layer includes a light emitting layer, and a second electrode formed on the organic layer. At least a part of the charge injection/transport layer is discontinuous at the protruding end portion.

Abstract: An imaging device includes a first semiconductor element including at least one bump pad that has a concave shape. The at least one bump pad includes a first metal layer and a second metal layer on the first metal layer. The imaging device includes a second semiconductor element including at least one electrode. The imaging device includes a microbump electrically connecting the at least one bump pad to the at least one electrode. The microbump includes a diffused portion of the second metal layer, and first semiconductor element or the second semiconductor element includes a pixel unit.

Abstract: A light emitting element and display device are disclosed. In one example, a light emitting element includes a first electrode formed on a base body. A first insulation layer is formed on the base body and the first electrode and has an aperture portion in which a part of the first electrode is exposed. A second insulation layer is formed on the first insulation layer and has a protruding end portion protruding from the aperture portion. A third insulation layer is formed on the second insulation layer and has an end portion recessed from the protruding end portion. A charge injection/transport layer is formed over the second insulation layer and the third insulation layer. An organic layer includes a light emitting layer, and a second electrode formed on the organic layer. At least a part of the charge injection/transport layer is discontinuous at the protruding end portion.

Abstract: It is possible to reduce resistance variations of a member connecting a through-silicon via to a line and improve wiring reliability. A hole through which the through-silicon via is to be stretched is created and an over-etching process is carried out on a wiring layer including the line. Then, by embedding copper in the hole, the through-silicon via made of the copper can be created. After the through-silicon via has been connected to the line made of aluminum through the member which is a connection area, the connection area is alloyed in a thermal treatment in order to electrically connect the through-silicon via to the line. Thus, it is possible to reduce variations of a resistance between the through-silicon via and the line and also improve wiring reliability as well. The present technology can be applied to a semiconductor device and a method for manufacturing the semiconductor device.

Abstract: It is possible to reduce resistance variations of a member connecting a through-silicon via to a line and improve wiring reliability. A hole through which the through-silicon via is to be stretched is created and an over-etching process is carried out on a wiring layer including the line. Then, by embedding copper in the hole, the through-silicon via made of the copper can be created. After the through-silicon via has been connected to the line made of aluminum through the member which is a connection area, the connection area is alloyed in a thermal treatment in order to electrically connect the through-silicon via to the line. Thus, it is possible to reduce variations of a resistance between the through-silicon via and the line and also improve wiring reliability as well. The present technology can be applied to a semiconductor device and a method for manufacturing the semiconductor device.

Abstract: There is provided semiconductor devices and methods of forming the same, the semiconductor devices including: a first semiconductor element having a first electrode; a second semiconductor element having a second electrode; a Sn-based micro-solder bump formed on the second electrode; and a concave bump pad including the first electrode opposite to the micro-solder bump, where the first electrode is connected to the second electrode via the micro-solder bump and the concave bump pad.

Abstract: It is possible to reduce resistance variations of a member connecting a through-silicon via to a line and improve wiring reliability. A hole through which the through-silicon via is to be stretched is created and an over-etching process is carried out on a wiring layer including the line. Then, by embedding copper in the hole, the through-silicon via made of the copper can be created. After the through-silicon via has been connected to the line made of aluminum through the member which is a connection area, the connection area is alloyed in a thermal treatment in order to electrically connect the through-silicon via to the line. Thus, it is possible to reduce variations of a resistance between the through-silicon via and the line and also improve wiring reliability as well. The present technology can be applied to a semiconductor device and a method for manufacturing the semiconductor device.

Abstract: It is possible to reduce resistance variations of a member connecting a through-silicon via to a line and improve wiring reliability. A hole through which the through-silicon via is to be stretched is created and an over-etching process is carried out on a wiring layer including the line. Then, by embedding copper in the hole, the through-silicon via made of the copper can be created. After the through-silicon via has been connected to the line made of aluminum through the member which is a connection area, the connection area is alloyed in a thermal treatment in order to electrically connect the through-silicon via to the line. Thus, it is possible to reduce variations of a resistance between the through-silicon via and the line and also improve wiring reliability as well. The present technology can be applied to a semiconductor device and a method for manufacturing the semiconductor device.

Abstract: A power circuit includes a bridge circuit connected to a first node by which an output voltage is supplied to a load circuit including an amplifier containing a CMOS inverter, and configured to generate a current flowing in a first current channel and a current flowing in a second current channel in accordance with a voltage difference between the output voltage and a predetermined set voltage to be supplied to the load circuit, and a current amplifier configured to generate a current flowing in a third current channel to the load circuit in accordance with an input source voltage and a difference between the current flowing in the first current channel and the current flowing in the second current channel. The predetermined set voltage that is supplied to the load circuit achieves the smallest transconductance during normal operation of the amplifier.

Abstract: It is possible to reduce resistance variations of a member connecting a through-silicon via to a line and improve wiring reliability. A hole through which the through-silicon via is to be stretched is created and an over-etching process is carried out on a wiring layer including the line. Then, by embedding copper in the hole, the through-silicon via made of the copper can be created. After the through-silicon via has been connected to the line made of aluminum through the member which is a connection area, the connection area is alloyed in a thermal treatment in order to electrically connect the through-silicon via to the line. Thus, it is possible to reduce variations of a resistance between the through-silicon via and the line and also improve wiring reliability as well. The present technology can be applied to a semiconductor device and a method for manufacturing the semiconductor device.

Abstract: A CMOS bias circuit includes a starter circuits and a started circuit part which supplies a current to the outside. The starter circuits has a connection node (first terminal) between it and the started circuit part. The starter circuits includes a first MOS transistor connected at its drain to the first terminal, a first current supply circuit which supplies a starter current to the started circuit via the first MOS transistor, and a circuit which supplies a second current in a direction that interrupts a current flowing through the first MOS transistor to a node between the first MOS transistor and the first current supply circuit in accordance with a potential at the first terminal. The starter circuits has a function of preventing a current flowing between the drain and source of the first MOS transistor in the opposite direction by increasing or decreasing a gate bias of the first MOS transistor in accordance with a value of the second current.

Abstract: A CMOS bias circuit includes a starter circuits and a started circuit part which supplies a current to the outside. The starter circuits has a connection node (first terminal) between it and the started circuit part. The starter circuits includes a first MOS transistor connected at its drain to the first terminal, a first current supply circuit which supplies a starter current to the started circuit via the first MOS transistor, and a circuit which supplies a second current in a direction that interrupts a current flowing through the first MOS transistor to a node between the first MOS transistor and the first current supply circuit in accordance with a potential at the first terminal. The starter circuits has a function of preventing a current flowing between the drain and source of the first MOS transistor in the opposite direction by increasing or decreasing a gate bias of the first MOS transistor in accordance with a value of the second current.

Abstract: A resistor element is inserted between an output terminal of an output transistor and an output terminal of a regulator circuit. A signal, which is taken out of a connection node between the output terminal of the output transistor and the resistor element, is used for phase compensation. Thereby, oscillation is prevented from being caused by a phase delay due to a capacitive load which is connected to the output of the regulator circuit.

Abstract: A resistor element is inserted between an output terminal of an output transistor and an output terminal of a regulator circuit. A signal, which is taken out of a connection node between the output terminal of the output transistor and the resistor element, is used for phase compensation. Thereby, oscillation is prevented from being caused by a phase delay due to a capacitive load which is connected to the output of the regulator circuit.