Patents by Inventor Kaname MITSUZUKA
Kaname MITSUZUKA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240162285Abstract: Provided is a semiconductor device including an active portion arranged below an upper surface electrode and an edge termination structure portion arranged between the upper surface electrode and an end side of a semiconductor substrate in a top view, in which the active portion includes an active collector region, the edge termination structure portion includes an edge collector region, and an integrated value of a carrier concentration of the active collector region in a depth direction is larger than an integrated value of a carrier concentration of the edge collector region in the depth direction. An upper end position of the active collector region in the depth direction and an upper end position of the edge collector region in the depth direction may differ.Type: ApplicationFiled: September 21, 2023Publication date: May 16, 2024Inventors: Tohru SHIRAKAWA, Yasunori AGATA, Kaname MITSUZUKA
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Publication number: 20240128349Abstract: Provided is a semiconductor device including: a drift region of a first conductivity type provided in a semiconductor substrate; a collector region of a second conductivity type provided on a back surface of the semiconductor substrate; a cathode region of the first conductivity type provided on the back surface of the semiconductor substrate and having a higher doping concentration than the drift region; a plurality of trench portions provided on a front surface of the semiconductor substrate; and a lifetime control portion provided in the semiconductor substrate and containing a lifetime killer, in which the lifetime control portion includes: a main region provided in a diode portion; and a decay region provided to extend from the main region in a direction parallel to the front surface of the semiconductor substrate and having a lifetime killer concentration that has decayed more than a lifetime killer concentration of the main region.Type: ApplicationFiled: August 22, 2023Publication date: April 18, 2024Inventors: Atsushi ONOGAWA, Kaname MITSUZUKA, Yuuki ODA, Tohru SHIRAKAWA
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Publication number: 20240096965Abstract: Provided is a semiconductor device comprising a gate trench portion and a first trench portion adjacent to the gate trench portion, the semiconductor device comprising: a drift region of a first conductivity type; a base region of a second conductivity type; an emitter region of the first conductivity type that is provided above the base region and has a higher doping concentration than that of the drift region; and a contact region of the second conductivity type that is provided above the base region and has a higher doping concentration than that of the base region. In a mesa portion between the gate trench portion and the first trench portion, the contact region may have a first contact portion and a second contact portion that are provided to extend from the first trench portion to below a lower end of the emitter region.Type: ApplicationFiled: November 23, 2023Publication date: March 21, 2024Inventors: Kaname MITSUZUKA, Yuki KARAMOTO
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Publication number: 20240088221Abstract: A semiconductor device includes: a gate trench portion provided in a semiconductor substrate; a first trench portion provided in the semiconductor substrate and adjacent to the gate trench portion; an emitter region of a first conductivity type provided to be in contact with the gate trench portion in a mesa portion between the gate trench portion and the first trench portion; a contact region of a second conductivity type provided to be in contact with the first trench portion in the mesa portion; a metal layer provided above the semiconductor substrate; and a resistance portion of the first conductivity type provided to be in contact with the metal layer and the emitter region and having a lower doping concentration than that of the emitter region.Type: ApplicationFiled: November 20, 2023Publication date: March 14, 2024Inventor: Kaname MITSUZUKA
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Publication number: 20240079406Abstract: Provided is a semiconductor device including a semiconductor substrate; a transistor portion provided in the semiconductor substrate; a current sensing portion for detecting current flowing through the transistor portion; an emitter electrode set to an emitter potential of the transistor portion; a sense electrode electrically connected to the current sensing portion; and a Zener diode electrically connected between the emitter electrode and the sense electrode. Provided is a semiconductor device fabricating method including providing a transistor portion in a semiconductor substrate; providing a current sensing portion for detecting current flowing through the transistor portion; providing an emitter electrode set to an emitter potential of the transistor portion; providing a sense electrode electrically connected to the current sensing portion; and providing a Zener diode electrically connected between the emitter electrode and the sense electrode.Type: ApplicationFiled: November 13, 2023Publication date: March 7, 2024Inventors: Kaname MITSUZUKA, Yuichi ONOZAWA
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Publication number: 20240055483Abstract: Provided is a semiconductor device including a buffer region of a first conductivity type, which is provided between a lower surface of a semiconductor substrate and a drift region, has three or more doping concentration peaks in a depth direction of the semiconductor substrate, and has a higher concentration than the drift region, in which the three or more doping concentration peaks include a deepest peak farthest from the lower surface of the semiconductor substrate and a second peak second closest to the lower surface of the semiconductor substrate, and a peak width of the second peak is 2 times or more of a peak width of the deepest peak in the depth direction.Type: ApplicationFiled: July 21, 2023Publication date: February 15, 2024Inventors: Yuki KARAMOTO, Kaname MITSUZUKA
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Patent number: 11830871Abstract: Provided is a semiconductor device including a semiconductor substrate; a transistor portion provided in the semiconductor substrate; a current sensing portion for detecting current flowing through the transistor portion; an emitter electrode set to an emitter potential of the transistor portion; a sense electrode electrically connected to the current sensing portion; and a Zener diode electrically connected between the emitter electrode and the sense electrode. Provided is a semiconductor device fabricating method including providing a transistor portion in a semiconductor substrate; providing a current sensing portion for detecting current flowing through the transistor portion; providing an emitter electrode set to an emitter potential of the transistor portion; providing a sense electrode electrically connected to the current sensing portion; and providing a Zener diode electrically connected between the emitter electrode and the sense electrode.Type: GrantFiled: December 24, 2020Date of Patent: November 28, 2023Assignee: FUJI ELECTRIC CO., LTD.Inventors: Kaname Mitsuzuka, Yuichi Onozawa
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Publication number: 20230378333Abstract: Provided is a semiconductor device including: a collector region of a second conductivity type, which is provided between a drift region and a lower surface of a semiconductor substrate, in which the collector region includes a first region and a second region having a lower implantation efficiency of carriers with respect to the drift region than the first region, and when an area of the first region and an area of the second region per unit area of the collector region in a top view are respectively represented by S1 and S2, the implantation efficiency of the first region is represented by ?1, and the implantation efficiency of the second region is represented by ?2, an average implantation efficiency ?C given by an expression below is 0.1 or more and 0.4 or less: ?C=(S1×?1+S2×?2)/(S1+S2).Type: ApplicationFiled: April 24, 2023Publication date: November 23, 2023Inventors: Tohru SHIRAKAWA, Kaname MITSUZUKA
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Publication number: 20230335599Abstract: A device includes a substrate with upper/lower surfaces, including hydrogen containing region having hydrogen chemical concentration peaks in a depth direction. A carrier concentration distribution of the hydrogen containing region includes a first carrier concentration peak, a second carrier concentration peak closest to the first carrier concentration peak, a third carrier concentration peak arranged closer to the upper surface than the second carrier concentration peak, a first inter peak region arranged between the first and second carrier concentration peaks, a second inter peak region arranged between the second and third carrier concentration peaks, and an inter-peaks concentration peak arranged in the second inter peak region such that the concentration peak does not overlap the hydrogen chemical concentration peaks in the second and third carrier concentration peaks. A local minimum value of a carrier concentration in the first inter peak region is smaller than that of the second inter peak region.Type: ApplicationFiled: June 13, 2023Publication date: October 19, 2023Inventors: Yoshiharu KATO, Toru AJIKI, Tohru SHIRAKAWA, Misaki TAKAHASHI, Kaname MITSUZUKA, Takashi YOSHIMURA, Yuichi ONOZAWA, Hiroshi TAKISHITA, Soichi YOSHIDA
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Publication number: 20230299145Abstract: Provided is a semiconductor device including: a semiconductor substrate having an upper surface and a lower surface and provided with a drift region of a first conductivity type; and a buffer region provided between the drift region and the lower surface and having a higher doping concentration than the drift region. The buffer region has M doping concentration peaks provided at different positions in a depth direction of the semiconductor substrate, and a charge carrier coefficient ? represented by Expression (1) is 2000 or more and 50000 or less in at least one integer i (i is an integer of 1 or more and M?1 or less).Type: ApplicationFiled: February 22, 2023Publication date: September 21, 2023Inventors: Yuki KARAMOTO, Kaname MITSUZUKA
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Publication number: 20230261096Abstract: Provided is a semiconductor device including a semiconductor substrate. The semiconductor substrate has: an active portion; and a plurality of gate trench portions provided in the active portion on an upper surface of the semiconductor substrate and extending along an extending direction. The semiconductor device further includes: a gate runner provided between the active portion and an end side of the semiconductor substrate; and a plurality of gate polysilicon disposed apart from each other along the end side and respectively connecting the plurality of gate trench portions to the gate runner.Type: ApplicationFiled: April 21, 2023Publication date: August 17, 2023Inventors: Yuki KARAMOTO, Kaname MITSUZUKA, Yoshihiro IKURA
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Publication number: 20230246097Abstract: Provided is a semiconductor device including a gate trench portion and a first trench portion adjacent to the gate trench portion. The device may include a first conductivity type drift region provided in a semiconductor substrate, a second conductivity type base region provided above the drift region, a first conductivity type emitter region provided above the base region and having a doping concentration higher than that of the drift region, and a second conductivity type contact region provided above the base region and having a doping concentration higher than that of the base region. The contact region includes a first contact portion provided on a front surface of the substrate, and a second contact portion having a doping concentration different from that of the first contact portion and provided alternately with the first contact portion in a trench extending direction on a side wall of the first trench portion.Type: ApplicationFiled: December 20, 2022Publication date: August 3, 2023Inventors: Kaname MITSUZUKA, Tohru SHIRAKAWA
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Patent number: 11715771Abstract: Provided is a semiconductor device comprising a semiconductor substrate, wherein the semiconductor substrate includes a hydrogen containing region including hydrogen, and the hydrogen containing region includes a high concentration region with a higher carrier concentration than a virtual carrier concentration determined based on a concentration of hydrogen included and an activation ratio of hydrogen. The semiconductor substrate includes an N type drift region, an N type emitter region that has a higher carrier concentration than that in the drift region, a P type base region, a P type collector region provided to be in contact with a lower surface of the semiconductor substrate, and an N type buffer region that is provided between the collector region and the drift region, and has a higher carrier concentration than that in the drift region, and the hydrogen containing region is included in the buffer region.Type: GrantFiled: October 22, 2020Date of Patent: August 1, 2023Assignee: FUJI ELECTRIC CO., LTD.Inventors: Yoshiharu Kato, Toru Ajiki, Tohru Shirakawa, Misaki Takahashi, Kaname Mitsuzuka, Takashi Yoshimura, Yuichi Onozawa, Hiroshi Takishita, Soichi Yoshida
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Patent number: 11574999Abstract: Provided is a semiconductor device comprising an active region and an edge region, the semiconductor device comprising: a drift region of a first conductivity type provided in the semiconductor substrate; a base region of a second conductivity type provided above the drift region; a first collector region of the second conductivity type provided below the drift region in the active region; and a second collector region of the second conductivity type provided below the drift region in the edge region, wherein a doping concentration of the first collector region is higher than a doping concentration of the second collector region, wherein an area of the first collector region is of the same size as an area of the second collector region or larger than the area of the second collector region, in a top plan view.Type: GrantFiled: May 25, 2021Date of Patent: February 7, 2023Assignee: FUJI ELECTRIC CO., LTD.Inventors: Tohru Shirakawa, Yasunori Agata, Kaname Mitsuzuka
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Patent number: 11532738Abstract: Provided is a semiconductor device that includes a semiconductor substrate that is provided with a first conductivity type drift region, a transistor portion that includes a second conductivity type collector region in contact with a lower surface of the semiconductor substrate, and a diode portion that includes a first conductivity type cathode region in contact with the lower surface of the semiconductor substrate, and is alternately disposed with the transistor portion along an arrangement direction in an upper surface of the semiconductor substrate. In the transistor portions, a width in the arrangement direction of two or more transistor portions sequentially selected from the transistor portions nearer to the center in the arrangement direction of the semiconductor substrate is larger than a width in the arrangement direction of one of the other transistor portions.Type: GrantFiled: June 24, 2020Date of Patent: December 20, 2022Assignee: FUJI ELECTRIC CO., LTD.Inventors: Kouta Yokoyama, Toru Ajiki, Kaname Mitsuzuka, Tohru Shirakawa
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Publication number: 20220392815Abstract: There is provided a semiconductor device including a semiconductor substrate, the semiconductor device including: a sensing portion that is provided on the semiconductor substrate and that is configured to detect predetermined physical information; a sensing pad portion that is provided above an upper surface of the semiconductor substrate and that is connected to the sensing portion; a gate runner which is provided above the upper surface of the semiconductor substrate and to which a gate potential is applied; and one or more separated conductive portions in which each separated conductive portion is provided between the sensing pad portion and the semiconductor substrate and that is separated from the gate runner.Type: ApplicationFiled: August 17, 2022Publication date: December 8, 2022Inventors: Tohru SHIRAKAWA, Yasunori AGATA, Naoki SAEGUSA, Kaname MITSUZUKA
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Publication number: 20220328669Abstract: Provided is a semiconductor device including a gate trench portion and a dummy trench portion adjacent to the gate trench portion. The semiconductor device may include: a drift region of a first conductivity type, provided in a semiconductor substrate; a base region of a second conductivity type, provided above the drift region; an emitter region of the first conductivity type, with a doping concentration higher than the drift region, provided above the base region; and a contact region of the second conductivity type, with a doping concentration higher than the base region, provided above the base region. The contact region may be provided below the lower end on the dummy trench portion side of the emitter region in the mesa portion between the gate trench portion and the dummy trench portion.Type: ApplicationFiled: June 23, 2022Publication date: October 13, 2022Inventors: Kaname MITSUZUKA, Yuki KARAMOTO
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Publication number: 20220271152Abstract: To provide a semiconductor device having excellent conduction characteristics of a transistor portion and a diode portion. The semiconductor device having a transistor portion and a diode portion, the semiconductor device includes: a drift region of a first conductivity type provided on a semiconductor substrate, a first well region of a second conductivity type provided on an upper surface side of the semiconductor substrate, an anode region of the second conductivity provided on the upper surface side of the semiconductor substrate, in the diode portion, and a first high concentration region of a second conductivity type which is provided in contact with a first well region between the anode region and the first well region, and has a higher doping concentration than the anode region.Type: ApplicationFiled: May 10, 2022Publication date: August 25, 2022Inventors: Kaname MITSUZUKA, Misaki TAKAHASHI, Tohru SHIRAKAWA
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Patent number: 11335795Abstract: To provide a semiconductor device having excellent conduction characteristics of a transistor portion and a diode portion. The semiconductor device having a transistor portion and a diode portion, the semiconductor device includes: a drift region of a first conductivity type provided on a semiconductor substrate, a first well region of a second conductivity type provided on an upper surface side of the semiconductor substrate, an anode region of the second conductivity provided on the upper surface side of the semiconductor substrate, in the diode portion, and a first high concentration region of a second conductivity type which is provided in contact with a first well region between the anode region and the first well region, and has a higher doping concentration than the anode region.Type: GrantFiled: November 24, 2019Date of Patent: May 17, 2022Assignee: FUJI ELECTRIC CO., LTD.Inventors: Kaname Mitsuzuka, Misaki Takahashi, Tohru Shirakawa
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Publication number: 20220013628Abstract: Provided is a semiconductor device comprising an active region and an edge region, the semiconductor device comprising: a drift region of a first conductivity type provided in the semiconductor substrate; a base region of a second conductivity type provided above the drift region; a first collector region of the second conductivity type provided below the drift region in the active region; and a second collector region of the second conductivity type provided below the drift region in the edge region, wherein a doping concentration of the first collector region is higher than a doping concentration of the second collector region, wherein an area of the first collector region is of the same size as an area of the second collector region or larger than the area of the second collector region, in a top plan view.Type: ApplicationFiled: May 25, 2021Publication date: January 13, 2022Inventors: Tohru SHIRAKAWA, Yasunori AGATA, Kaname MITSUZUKA