Patents by Inventor Katsuaki Natori

Katsuaki Natori has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080054341
    Abstract: A semiconductor memory device includes a plurality of memory transistors. Each of the memory transistors has: a floating gate electrode; an interelectrode insulating film; and a control gate electrode. The floating gate electrode includes, in a cross section taken along a bit line direction, a first conductive film, first sidewall insulating films opposed to each other across the first conductive film, and a second conductive film provided on the first sidewall insulating films and the first conductive film. The interelectrode insulating film is provided on the second conductive film. The control gate electrode includes a third conductive film provided on the interelectrode insulating film and a fourth conductive film provided on the third conductive film.
    Type: Application
    Filed: August 21, 2007
    Publication date: March 6, 2008
    Inventors: Katsuaki Natori, Masayuki Tanaka, Akihito Yamamoto
  • Publication number: 20080017914
    Abstract: There is disclosed a semiconductor device including a plurality of memory cell transistors, each memory cell transistor including a floating gate electrode isolated from each other via an isolation insulating film every memory cell transistor, an inter-electrode insulating film comprising a HfxAl1-xOy film (0.8?x?0.95) formed on the floating gate electrode, and a control gate electrode formed on the inter-electrode insulating film, wherein the memory cell transistors are arrayed to form a memory cell array.
    Type: Application
    Filed: July 5, 2007
    Publication date: January 24, 2008
    Inventors: Katsuaki Natori, Masayuki Tanaka, Katsuyuki Sekine, Hirokazu Ishida, Masumi Matsuzaki, Yoshio Ozawa
  • Publication number: 20080014745
    Abstract: A method of manufacturing a semiconductor device comprising a first insulating film formed on a semiconductor substrate, a charge storage layer formed on the first insulating film, a second insulating film formed on the charge storage layer, and a control electrode formed on the second insulating film, forming the second insulating film comprises forming a lower insulating film containing oxygen and a metal element, thermally treating the lower insulating film in an atmosphere containing oxidizing gas, and forming an upper insulating film on the thermally treated lower insulating film using film forming gas containing at least one of hydrogen and chlorine.
    Type: Application
    Filed: March 29, 2007
    Publication date: January 17, 2008
    Inventors: Ryota Fujitsuka, Katsuaki Natori, Daisuke Nishida, Masayuki Tanaka, Katsuyuki Sekine, Yoshio Ozawa, Akihito Yamamoto
  • Publication number: 20070298594
    Abstract: A semiconductor device fabrication method includes forming an insulating film having an opening on the major surface of single-crystal silicon, and forming an amorphous silicon film on the surface of the single-crystal silicon exposed in the opening and on the surface of the insulating film. The semiconductor device fabrication method further includes performing annealing to change the amorphous silicon film into a single crystal, and forming a single-crystal silicon film, SiGe film, or carbon-containing silicon film by vapor phase growth on a region where the amorphous silicon film is changed into a single crystal.
    Type: Application
    Filed: June 5, 2007
    Publication date: December 27, 2007
    Inventors: Ichiro Mizushima, Kiyotaka Miyano, Katsuaki Natori, Yoshio Ozawa
  • Publication number: 20070287254
    Abstract: A method of manufacturing a semiconductor device comprising a first insulating film formed on a semiconductor substrate, a charge storage layer formed on the first insulating film, a second insulating film formed on the charge storage layer, and a control electrode formed on the second insulating film, wherein forming the second insulating film comprises forming an insulating film containing silicon using source gas not containing chlorine, and forming an insulating film containing oxygen and a metal element on the insulating film containing silicon.
    Type: Application
    Filed: March 27, 2007
    Publication date: December 13, 2007
    Inventors: Katsuaki Natori, Masayuki Tanaka, Akihito Yamamoto, Katsuyuki Sekine, Ryota Fujitsuka, Daisuke Nishida, Yoshio Ozawa
  • Publication number: 20070272966
    Abstract: A method of fabricating a nonvolatile semiconductor memory device includes forming a first dielectric layer on a major surface of a semiconductor substrate, forming a floating gate electrode layer on the first dielectric layer, and forming a second dielectric layer, which includes a metal oxide film or a stacked film thereof, on the floating gate electrode layer. The method of fabricating the nonvolatile semiconductor memory device further includes forming a control gate electrode layer on the second dielectric layer by using a material including silicon having no silicon (Si)-hydrogen (H) bond.
    Type: Application
    Filed: May 22, 2007
    Publication date: November 29, 2007
    Inventors: Daisuke Nishida, Katsuaki Natori, Akihito Yamamoto, Masayuki Tanaka
  • Patent number: 7294878
    Abstract: A semiconductor memory device includes a semiconductor substrate, an isolation insulation film filled in a plurality of trenches formed in the semiconductor substrate to define a plurality of element formation regions, a floating gate provided on each of the element formation regions through a first gate insulation film, a control gate provided on the floating gate through a second gate insulation film, and source/drain regions provided in the semiconductor substrate, wherein a mutual diffusion layer is provided at least at an interface between the second gate insulation film and the control gate.
    Type: Grant
    Filed: March 25, 2005
    Date of Patent: November 13, 2007
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Masayuki Tanaka, Yoshio Ozawa, Hirokazu Ishida, Katsuaki Natori, Seiji Inumiya
  • Publication number: 20070241389
    Abstract: A semiconductor device includes a semiconductor substrate, a plurality of nonvolatile memory cells provided on the semiconductor substrate, each of the plurality of nonvolatile memory cells comprising a first insulating film provided on the semiconductor substrate, a charge storage layer provided on the first insulating film, a control gate electrode provided above the charge storage layer, a second insulating film provided between the control gate electrode and the charge storage layer, the second insulating film between adjacent charge storage layers including a first region having permittivity lower than that of the second insulating film on a top surface of the charge storage layer in a cross-section view of a channel width direction of the nonvolatile memory cell, and the first region having composition differing from that of the second insulating film on the top surface of the charge storage layer.
    Type: Application
    Filed: April 13, 2007
    Publication date: October 18, 2007
    Inventors: Yoshio Ozawa, Akihito Yamamoto, Masayuki Tanaka, Katsuaki Natori, Katsuyuki Sekine, Daisuke Nishida, Ryota Fujitsuka
  • Publication number: 20070241390
    Abstract: A semiconductor device includes a semiconductor substrate, a first insulating film formed on the semiconductor substrate, a charge storage layer formed on the first insulating film, a second insulating film formed on the charge storage layer, and a control electrode formed on the second insulating film, the second insulating film including a lower silicon nitride film, a lower silicon oxide film formed on the lower silicon nitride film, an intermediate insulating film formed on the lower silicon oxide film and containing a metal element, the intermediate insulating film having a relative dielectric constant of greater than 7, an upper silicon oxide film formed on the intermediate insulating film, and an upper silicon nitride film formed on the upper silicon oxide film.
    Type: Application
    Filed: April 13, 2007
    Publication date: October 18, 2007
    Inventors: Masayuki Tanaka, Daisuke Nishida, Ryota Fujitsuka, Katsuyuki Sekine, Akihito Yamamoto, Katsuaki Natori, Yoshio Ozawa
  • Publication number: 20070241388
    Abstract: A semiconductor device includes semiconductor substrate, isolation insulating film, nonvolatile memory cells, each of the cells including tunnel insulating film, FG electrode, CG electrode, interelectrode insulating film between the CG and FG electrodes and including a first insulating film and a second insulating film on the first insulating film and having higher permittivity than the first insulating film, the interelectrode insulating film being provided on a side wall of the floating gate electrode in a cross-section view of a channel width direction of the cell, thickness of the interelectrode insulating film increasing from an upper portion of the side wall toward a lower portion of the side wall, thickness of the second insulating film on an upper corner of the FG electrode being thicker than thickness of the second insulating film on the other portions of the side wall in the cross-section view of the channel width direction.
    Type: Application
    Filed: April 13, 2007
    Publication date: October 18, 2007
    Inventors: Akihito Yamamoto, Masayuki Tanaka, Katsuyuki Sekine, Daisuke Nishida, Ryota Fujitsuka, Katsuaki Natori, Hirokazu Ishida, Yoshio Ozawa
  • Publication number: 20070235799
    Abstract: A semiconductor memory device includes a semiconductor substrate, an isolation insulation film filled in a plurality of trenches formed in the semiconductor substrate to define a plurality of element formation regions, a floating gate of polysilicon provided on each of the element formation regions through a first insulation film, a second insulation film, provided on the floating gate, containing a metal element, a control gate of polysilicon, provided on the second insulation film, and source/drain regions provided in the semiconductor substrate, both a polysilicon conductive layer containing a metal element and a mutual diffusion layer composed of a silicate layer of a mixed oxide material composed of a silicon element contained in the floating gate and the control gate and a metal element contained in the second insulation film are provided on a surface of each of the floating gate and the control gate, respectively.
    Type: Application
    Filed: June 14, 2007
    Publication date: October 11, 2007
    Inventors: Masayuki Tanaka, Yoshio Ozawa, Hirokazu Ishida, Katsuaki Natori, Seiji Inumiya
  • Publication number: 20070231948
    Abstract: A method of manufacturing a semiconductor device, including forming a capacitor above a semiconductor substrate, the capacitor including a dielectric film containing Pb, Zr, Ti and O. Forming the capacitor includes forming a crystallized film which contains Pb, Sr, Zr, Ti, Ru and O.
    Type: Application
    Filed: May 25, 2007
    Publication date: October 4, 2007
    Applicant: KABUSHHIKI KAISHA TOSHIBA
    Inventors: Keisuke Nakazawa, Koji Yamakawa, Katsuaki Natori, Soichi Yamazaki, Hiroshi Itokawa, Hiroyuki Kanaya
  • Publication number: 20070196985
    Abstract: A semiconductor memory device manufacturing method includes forming a floating gate electrode above a semiconductor substrate, forming an interelectrode insulating film above the floating gate electrode, forming a first radical nitride film on a surface of the interelectrode insulating film by first radical nitriding, and forming a control gate electrode on the first radical nitride film.
    Type: Application
    Filed: January 30, 2007
    Publication date: August 23, 2007
    Inventors: Yoshio Ozawa, Isao Kamioka, Junichi Shiozawa, Akihito Yamamoto, Ryota Fujitsuka, Yoshihiro Ogawa, Katsuaki Natori, Katsuyuki Sekine, Masayuki Tanaka, Daisuke Nishida
  • Patent number: 7259094
    Abstract: An apparatus for manufacturing a semiconductor device is disclosed which comprises a chamber which holds a to-be-processed substrate having a film containing at least one kind of metal element which will become a component of a volatile metal compound, a heater which heats the substrate held in the chamber, and an adsorbent which is provided in the chamber and which adsorbs the volatile metal compound generated from the film by heating the substrate.
    Type: Grant
    Filed: April 21, 2005
    Date of Patent: August 21, 2007
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Katsuaki Natori, Keisuke Nakazawa, Koji Yamakawa, Hiroyuki Kanaya, Yoshinori Kumura, Hiroshi Itokawa, Osamu Arisumi
  • Patent number: 7233040
    Abstract: Disclosed is a semiconductor device comprising a semiconductor substrate, and a capacitor provided above the semiconductor substrate and including a film which contains Pb, Sr, Zr, Ti, Ru and O and a dielectric film which contains Pb, Zr, Ti and O and which is provided on the film containing Pb, Sr, Zr, Ti, Ru and O.
    Type: Grant
    Filed: April 28, 2004
    Date of Patent: June 19, 2007
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Keisuke Nakazawa, Koji Yamakawa, Katsuaki Natori, Soichi Yamazaki, Hiroshi Itokawa, Hiroyuki Kanaya
  • Publication number: 20070063266
    Abstract: A semiconductor device includes a semiconductor region; a first high dielectric constant insulating film provided on the semiconductor region, the first high dielectric constant insulating film being a film other than alumina; a second high dielectric constant insulating film provided on the first high dielectric constant insulating film, the second high dielectric constant insulating film being an alumina film; and a conductive layer provided on the second high dielectric constant insulating film.
    Type: Application
    Filed: September 14, 2006
    Publication date: March 22, 2007
    Inventors: Katsuaki Natori, Masayuki Tanaka, Hirokazu Ishida, Katsuyuki Sekine, Masumi Matsuzaki
  • Patent number: 7190015
    Abstract: A semiconductor device including a semiconductor substrate, a capacitor formed above the semiconductor substrate, a first interlayer insulating film formed above the capacitor and having a trench, a wiring formed above the capacitor and formed in the trench, the wiring have a top surface flush with a top surface of the first interlayer insulating film, a first hydrogen barrier film formed in contact with the top surface of the wiring and the top surface of the first interlayer insulating film and preventing hydrogen from diffusing into the capacitor and a second interlayer insulating film formed on the first hydrogen barrier film.
    Type: Grant
    Filed: June 29, 2004
    Date of Patent: March 13, 2007
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Katsuaki Natori, Koji Yamakawa, Hiroyuki Kanaya
  • Publication number: 20070020957
    Abstract: A method of forming an insulating film includes forming a base film comprising a material whose surface is oxidized by being exposed to an oxidant. A source gas containing a metal material and a first oxidant having a first oxidation force are alternately supplied to form a first insulating film on the base film. A source gas containing a metal material and a second oxidant having a second oxidation force stronger than the first oxidation force are alternately supplied to form a second insulating film on the first insulating film.
    Type: Application
    Filed: November 10, 2005
    Publication date: January 25, 2007
    Inventors: Ichiro Mizushima, Masayuki Tanaka, Katsuaki Natori, Yoshio Ozawa, Seiji Inumiya, Katsuyuki Sekine, Tetsuya Kai
  • Publication number: 20060273320
    Abstract: According to an aspect of the invention, there is provided a method of manufacturing a semiconductor device including simultaneously supplying a source gas of an oxide insulating film and H2 to a semiconductor substrate when the oxide insulating film is formed on the semiconductor substrate by a CVD method.
    Type: Application
    Filed: May 31, 2006
    Publication date: December 7, 2006
    Inventors: Katsuaki Natori, Masayuki Tanaka
  • Publication number: 20060244022
    Abstract: According to an aspect of the present invention, there is provided a semiconductor device comprising a semiconductor substrate, a capacitor which is disposed above the semiconductor substrate and in which a dielectric film is held between lower and upper electrodes, an oxide film formed in such a manner as to coat the capacitor and having a thickness of 5 nm or more and 50 nm or less, and a protective film formed on the oxide film by an ALD process.
    Type: Application
    Filed: June 30, 2005
    Publication date: November 2, 2006
    Inventors: Katsuaki Natori, Hiroyuki Kanaya, Koji Yamakawa