Patents by Inventor Katsuhiko Komori
Katsuhiko Komori has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10570508Abstract: There is provided a film forming apparatus for performing a film forming process on substrates by heating the substrates while the substrates are held in a shelf shape by a substrate holder in a vertical reaction container. The film forming apparatus includes: an exhaust part configured to evacuate the reaction container; a gas supply part configured to supply a film forming gas into the reaction container; a heat insulating member provided above or below an arrangement region of the substrates to overlap with the arrangement region and configured to thermally insulate the arrangement region from an upper region above the arrangement region or a lower region below the arrangement region; and a through-hole provided in the heat insulating member at a position overlapping with central portions of the substrates to adjust a temperature distribution in a plane of each substrate held near the heat insulating member.Type: GrantFiled: December 22, 2017Date of Patent: February 25, 2020Assignee: TOKYO ELECTRON LIMITEDInventors: Satoshi Takagi, Katsuhiko Komori, Mitsuhiro Okada, Masahisa Watanabe, Kazuya Takahashi, Kazuki Yano, Keisuke Fujita
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Publication number: 20180179625Abstract: There is provided a film forming apparatus for performing a film forming process on substrates by heating the substrates while the substrates are held in a shelf shape by a substrate holder in a vertical reaction container. The film forming apparatus includes: an exhaust part configured to evacuate the reaction container; a gas supply part configured to supply a film forming gas into the reaction container; a heat insulating member provided above or below an arrangement region of the substrates to overlap with the arrangement region and configured to thermally insulate the arrangement region from an upper region above the arrangement region or a lower region below the arrangement region; and a through-hole provided in the heat insulating member at a position overlapping with central portions of the substrates to adjust a temperature distribution in a plane of each substrate held near the heat insulating member.Type: ApplicationFiled: December 22, 2017Publication date: June 28, 2018Inventors: Satoshi TAKAGI, Katsuhiko KOMORI, Mitsuhiro OKADA, Masahisa WATANABE, Kazuya TAKAHASHI, Kazuki YANO, Keisuke FUJITA
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Patent number: 9984875Abstract: A method of forming a silicon film, a germanium film or a silicon germanium film on a target substrate having a fine recess formed on a surface of the target substrate by a chemical vapor deposition method includes placing the target substrate having the fine recess in a processing container, and supplying a film forming gas containing an element constituting a film to be formed and a chlorine-containing compound gas into the processing container. Adsorption of the film forming gas at an upper portion of the fine recess is selectively inhibited by the chlorine-containing compound gas.Type: GrantFiled: February 20, 2017Date of Patent: May 29, 2018Assignee: TOKYO ELECTRON LIMITEDInventors: Kazuya Takahashi, Mitsuhiro Okada, Katsuhiko Komori
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Patent number: 9799577Abstract: A heat treatment system includes a heat treatment condition storing unit that stores a heat treatment condition with respect to a doping processing and a diffusion processing; a model storing unit that stores a model representing a relationship between a change of the heat treatment condition and a change of an impurity concentration in an impurity-doped thin film; a heat treatment unit that forms the impurity-doped thin film under the heat treatment condition; a calculating unit that calculates a heat treatment condition of the doping processing and the diffusion processing that causes the impurity concentration in the impurity-doped film to be included within the predetermined range, based on the impurity concentration in the impurity-doped thin film and the model; and an adjusting unit that adjusts the impurity concentration in the impurity-doped thin film to be included within the predetermined range.Type: GrantFiled: November 3, 2016Date of Patent: October 24, 2017Assignee: Tokyo Electron LimitedInventors: Yuichi Takenaga, Daisuke Suzuki, Katsuhiko Komori
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Patent number: 9798317Abstract: Provided is a substrate processing method of filling a recess of a predetermined uneven pattern formed on a substrate with a film forming material by performing a first film forming processing, a first etching processing and a second film forming processing on the substrate, using a vertical substrate processing apparatus and a control apparatus controlling operations of the vertical substrate processing apparatus. The method includes calculating a first film forming condition, a first etching condition, and a second film forming condition by the control apparatus such that the film forming material is filled in the recess without any void after the second film forming processing; and performing the first film forming processing, the first etching processing and the second film forming processing on the substrate based on the calculated first film forming condition, first etching condition and second film forming condition.Type: GrantFiled: July 1, 2014Date of Patent: October 24, 2017Assignee: Tokyo Electron LimitedInventors: Yuichi Takenaga, Katsuhiko Komori
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Patent number: 9758865Abstract: The present disclosure provides a silicon film forming method for forming a silicon film on a workpiece having a processed surface, including: forming a seed layer by supplying a high-order aminosilane-based gas containing two or more silicon atoms in a molecular formula onto the processed surface and by having silicon adsorbed onto the processed surface; and forming a silicon film by supplying a silane-based gas not containing an amino group onto the seed layer and by depositing silicon onto the seed layer, wherein, when forming a seed layer, a process temperature is set within a range of 350 degrees C. or lower and a room temperature or higher.Type: GrantFiled: July 30, 2014Date of Patent: September 12, 2017Assignee: TOKYO ELECTRON LIMITEDInventors: Kazuhide Hasebe, Kazuya Takahashi, Katsuhiko Komori, Yoshikazu Furusawa, Mitsuhiro Okada, Hiroyuki Hayashi, Akinobu Kakimoto
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Publication number: 20170243742Abstract: A method of forming a silicon film, a germanium film or a silicon germanium film on a target substrate having a fine recess formed on a surface of the target substrate by a chemical vapor deposition method includes placing the target substrate having the fine recess in a processing container, and supplying a film forming gas containing an element constituting a film to be formed and a chlorine-containing compound gas into the processing container. Adsorption of the film forming gas at an upper portion of the fine recess is selectively inhibited by the chlorine-containing compound gas.Type: ApplicationFiled: February 20, 2017Publication date: August 24, 2017Inventors: Kazuya TAKAHASHI, Mitsuhiro OKADA, Katsuhiko KOMORI
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Publication number: 20170133285Abstract: A heat treatment system includes a heat treatment condition storing unit that stores a heat treatment condition with respect to a doping processing and a diffusion processing; a model storing unit that stores a model representing a relationship between a change of the heat treatment condition and a change of an impurity concentration in an impurity-doped thin film; a heat treatment unit that forms the impurity-doped thin film under the heat treatment condition; a calculating unit that calculates a heat treatment condition of the doping processing and the diffusion processing that causes the impurity concentration in the impurity-doped film to be included within the predetermined range, based on the impurity concentration in the impurity-doped thin film and the model; and an adjusting unit that adjusts the impurity concentration in the impurity-doped thin film to be included within the predetermined range.Type: ApplicationFiled: November 3, 2016Publication date: May 11, 2017Inventors: Yuichi Takenaga, Daisuke Suzuki, Katsuhiko Komori
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Patent number: 9558940Abstract: A method of forming a silicon film in grooves formed on a surface of an object to be processed, the method including forming a first silicon film containing impurities so as to embed the first silicon film in the grooves of the object to be processed; doping the impurities in the vicinity of the surface of the first silicon film; expanding opening portions of the grooves by etching the first silicon film thereby forming expanded openings having grooves; and forming a second silicon film so as to embed the second silicon film in the grooves of the expanded openings is provided.Type: GrantFiled: January 15, 2014Date of Patent: January 31, 2017Assignee: TOKYO ELECTRON LIMITEDInventor: Katsuhiko Komori
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Patent number: 9490139Abstract: Provided is a method of forming a silicon film in a groove formed on a surface of an object to be processed, which includes: forming a first silicon layer on the surface of the object to be processed to embed the groove; doping impurities near a surface of the first silicon layer; forming a seed layer on the doped first silicon layer; and forming a second silicon layer containing impurities on the seed layer.Type: GrantFiled: August 1, 2014Date of Patent: November 8, 2016Assignee: TOKYO ELECTRON LIMITEDInventors: Katsuhiko Komori, Mitsuhiro Okada
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Publication number: 20160289833Abstract: A vertical heat treatment apparatus includes a plurality of gas supply pipes installed in one of left-right-half regions of a reaction vessel and configured to supply a process gas to division regions obtained by dividing a processing region; an exhaust opening formed in a wall of the reaction vessel in the other of the left-right-half regions; and a vacuum exhaust path in communication with the exhaust opening. The plurality of gas supply pipes are installed to extend from an inner wall portion of the reaction vessel at a position lower than the processing region. At least one of the gas supply pipes includes a bent portion formed by bending downward a leading end portion that is extended upward, and a plurality of gas discharge holes are formed at a downstream side from the bent portion.Type: ApplicationFiled: March 28, 2016Publication date: October 6, 2016Inventors: Mitsuhiro OKADA, Katsuhiko KOMORI
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Publication number: 20160244892Abstract: A method for crystallizing a group IV semiconductor to form group IV semiconductor crystals on a process surface of a workpiece on which a process is performed, includes forming an additive-containing group IV semiconductor film on the process surface of the workpiece by supplying a group IV semiconductor precursor gas serving as a precursor of the group IV semiconductor and an additive gas which lowers a melting point of the group IV semiconductor and which includes an additive whose segregation coefficient is smaller than “1”, liquefying the additive-containing group IV semiconductor film, and solidifying the liquefied additive-containing group IV semiconductor film from the side of the process surface of the workpiece to form the group IV semiconductor crystals.Type: ApplicationFiled: February 12, 2016Publication date: August 25, 2016Inventors: Kazuya TAKAHASHI, Mitsuhiro OKADA, Katsuhiko KOMORI, Hiromasa YONEKURA
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Patent number: 9384974Abstract: The present disclosure provides a method for filling a trench formed on an insulating film of a workpiece. The method includes forming a first impurity-containing amorphous silicon film on a wall surface which defines the trench, forming a second amorphous silicon film on the first amorphous silicon film, and annealing the workpiece after the second amorphous silicon film is formed.Type: GrantFiled: May 23, 2014Date of Patent: July 5, 2016Assignee: TOKYO ELECTRON LIMITEDInventors: Daisuke Suzuki, Kazuya Takahashi, Mitsuhiro Okada, Katsuhiko Komori, Satoshi Onodera
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Patent number: 9318328Abstract: A method of forming a silicon film includes a first film forming process, an etching process, a doping process, and a second film forming process. In the first film forming process, a silicon film doped with impurities containing boron is formed so as to embed a groove provided on an object to be processed. In the etching process, the silicon film formed in the first film forming process is etched. In the doping process, the silicon film etched in the etching process is doped with impurities containing boron. In the second film forming process, a silicon film doped with impurities containing boron is formed so as to embed the silicon film that is doped in the doping process.Type: GrantFiled: May 24, 2013Date of Patent: April 19, 2016Assignee: TOKYO ELECTRON LIMITEDInventors: Katsuhiko Komori, Akinobu Kakimoto, Mitsuhiro Okada, Nobuhiro Takahashi
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Patent number: 9005459Abstract: A disclosed film deposition method includes steps of loading plural substrates each of which includes a pattern including a concave part in a reaction chamber in the form of shelves; depositing a silicon oxide film on the plural substrates by supplying a silicon-containing gas and an oxygen-containing gas to the reaction chamber; etching the silicon oxide film deposited on the plural substrates in the step of depositing by supplying a fluorine-containing gas and an ammonia gas to the reaction chamber; and alternately repeating the step of depositing and the step of etching.Type: GrantFiled: March 15, 2012Date of Patent: April 14, 2015Assignee: Tokyo Electron LimitedInventors: Akinobu Kakimoto, Satoshi Takagi, Toshiyuki Ikeuchi, Katsuhiko Komori, Kazuhide Hasebe
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Publication number: 20150037970Abstract: The present disclosure provides a silicon film forming method for forming a silicon film on a workpiece having a processed surface, including: forming a seed layer by supplying a high-order aminosilane-based gas containing two or more silicon atoms in a molecular formula onto the processed surface and by having silicon adsorbed onto the processed surface; and forming a silicon film by supplying a silane-based gas not containing an amino group onto the seed layer and by depositing silicon onto the seed layer, wherein, when forming a seed layer, a process temperature is set within a range of 350 degrees C. or lower and a room temperature or higher.Type: ApplicationFiled: July 30, 2014Publication date: February 5, 2015Inventors: Kazuhide HASEBE, Kazuya TAKAHASHI, Katsuhiko KOMORI, Yoshikazu FURUSAWA, Mitsuhiro OKADA, Hiroyuki HAYASHI, Akinobu KAKIMOTO
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Publication number: 20150037975Abstract: Provided is a method of forming a silicon film in a groove formed on a surface of an object to be processed, which includes: forming a first silicon layer on the surface of the object to be processed to embed the groove; doping impurities near a surface of the first silicon layer; forming a seed layer on the doped first silicon layer; and forming a second silicon layer containing impurities on the seed layer.Type: ApplicationFiled: August 1, 2014Publication date: February 5, 2015Inventors: Katsuhiko KOMORI, Mitsuhiro OKADA
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Patent number: 8945339Abstract: A film formation apparatus includes a gas supply mechanism for supplying an aminosilane-based gas, and a silane-based gas that does not include an amino group. Processes of forming a seed layer on a surface of the insulation film having the opening reaching the conductive substance and on a bottom surface of the opening by supplying the aminosilane-based gas into the process chamber, and forming a silicon film on the seed layer by supplying the silane-based gas that does not include the amino group into the process chamber, are sequentially performed in the process chamber.Type: GrantFiled: October 28, 2011Date of Patent: February 3, 2015Assignee: Tokyo Electron LimitedInventors: Akinobu Kakimoto, Katsuhiko Komori, Kazuhide Hasebe
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Publication number: 20150011091Abstract: Provided is a substrate processing method of filling a recess of a predetermined uneven pattern formed on a substrate with a film forming material by performing a first film forming processing, a first etching processing and a second film forming processing on the substrate, using a vertical substrate processing apparatus and a control apparatus controlling operations of the vertical substrate processing apparatus. The method includes calculating a first film forming condition, a first etching condition, and a second film forming condition by the control apparatus such that the film forming material is filled in the recess without any void after the second film forming processing; and performing the first film forming processing, the first etching processing and the second film forming processing on the substrate based on the calculated first film forming condition, first etching condition and second film forming condition.Type: ApplicationFiled: July 1, 2014Publication date: January 8, 2015Inventors: Yuichi Takenaga, Katsuhiko Komori
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Publication number: 20140349468Abstract: The present disclosure provides a method for filling a trench formed on an insulating film of a workpiece. The method includes forming a first impurity-containing amorphous silicon film on a wall surface which defines the trench, forming a second amorphous silicon film on the first amorphous silicon film, and annealing the workpiece after the second amorphous silicon film is formed.Type: ApplicationFiled: May 23, 2014Publication date: November 27, 2014Applicant: TOKYO ELECTRON LIMITEDInventors: Daisuke SUZUKI, Kazuya TAKAHASHI, Mitsuhiro OKADA, Katsuhiko KOMORI, Satoshi ONODERA