Patents by Inventor Katsuki Furukawa

Katsuki Furukawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6888867
    Abstract: A semiconductor laser device includes a substrate and an n-GaN layer composed of a nitride semiconductor formed on the substrate. The substrate includes a trench having as a slope a plane inclined 62 degrees from the main plane of the substrate, or a plane inclined within 3 degrees in an arbitrary direction from the inclined plane. The n-GaN layer is formed on the slope. On the n-GaN layer are formed a lower clad layer, an active layer, and an upper clad layer, each composed of a nitride semiconductor. The active layer has a plane orientation substantially matching the plane orientation of the main plane.
    Type: Grant
    Filed: March 26, 2002
    Date of Patent: May 3, 2005
    Assignees: Sharp Kabushiki Kaisha
    Inventors: Nobuhiko Sawaki, Yoshio Honda, Norifumi Kameshiro, Masahito Yamaguchi, Norikatsu Koide, Shigetoshi Ito, Tomoki Ono, Katsuki Furukawa
  • Patent number: 6635901
    Abstract: A semiconductor device includes a silicon substrate and a compound semiconductor layer formed on a main plane of the silicon substrate. The compound semiconductor layer is represented by the general formula of InxGayAlzN (where x+y+z=1, 0≦x≦1, 0≦y≦1, 0≦z≦1). The silicon substrate includes a trench having as a slope a plane inclined 62 degrees from the main plane of the silicon substrate, or a plane inclined in a range within 3 degrees in an arbitrary direction from the inclined plane. The compound semiconductor layer is formed on the slope. The semiconductor device includes compound semiconductor layers represented by AlxGayInzN (where x+y+z=1, 0≦x≦1, 0≦y≦1, 0≦z≦1) on a silicon substrate. The silicon substrate has a main plane constituted by a plane in a range of ±5 degrees in an arbitrary direction from a (112) plane. The compound semiconductor layers are formed on the main plane.
    Type: Grant
    Filed: December 12, 2001
    Date of Patent: October 21, 2003
    Assignees: Sharp Kabushiki Kaisha
    Inventors: Nobuhiko Sawaki, Yoshio Honda, Norikatsu Koide, Katsuki Furukawa
  • Publication number: 20030031219
    Abstract: A semiconductor laser device includes a substrate and an n-GaN layer composed of a nitride semiconductor formed on the substrate. The substrate includes a trench having as a slope a plane inclined 62 degrees from the main plane of the substrate, or a plane inclined within 3 degrees in an arbitrary direction from the inclined plane. The n-GaN layer is formed on the slope. On the n-GaN layer are formed a lower clad layer, an active layer, and an upper clad layer, each composed of a nitride semiconductor. The active layer has a plane orientation substantially matching the plane orientation of the main plane.
    Type: Application
    Filed: March 26, 2002
    Publication date: February 13, 2003
    Inventors: Nobuhiko Sawaki, Yoshio Honda, Norifumi Kameshiro, Masahito Yamaguchi, Norikatsu Koide, Shigetoshi Ito, Tomoki Ono, Katsuki Furukawa
  • Publication number: 20020074561
    Abstract: A semiconductor device includes a silicon substrate and a compound semiconductor layer formed on a main plane of the silicon substrate. The compound semiconductor layer is represented by the general formula of InxGayAlzN (where x+y+z=1, 0≦x≦1, 0≧y≧1, 0≦z≦1). The silicon substrate includes a trench having as a slope a plane inclined 62 degrees from the main plane of the silicon substrate, or a plane inclined in a range within 3 degrees in an arbitrary direction from the inclined plane. The compound semiconductor layer is formed on the slope. The semiconductor device includes compound semiconductor layers represented by AlxGayInzN (where x+y+z=1, 0≦x≦1, 0≦y≦1, 0≦z≦1) on a silicon substrate. The silicon substrate has a main plane constituted by a plane in a range of ±5 degrees in an arbitrary direction from a (112) plane. The compound semiconductor layers are formed on the main plane.
    Type: Application
    Filed: December 12, 2001
    Publication date: June 20, 2002
    Inventors: Nobuhiko Sawaki, Yoshio Honda, Norikatsu Koide, Katsuki Furukawa
  • Patent number: 5804839
    Abstract: A Ill-V nitride compound semiconductor device of the present invention includes: at least one III-V nitride compound semiconductor layer; and an electrode layer made of non-single crystalline GaN in contact with the III-V nitride compound semiconductor layer.
    Type: Grant
    Filed: December 23, 1996
    Date of Patent: September 8, 1998
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Daisuke Hanaoka, Katsuki Furukawa
  • Patent number: 5693180
    Abstract: A dry etching method for etching a gallium nitride type compound semiconductor is disclosed. The method uses a mixed gas including silicon tetrachloride (SiCl.sub.4) gas and chlorine (Cl.sub.2) gas as an etching gas in a reactive ion etching.
    Type: Grant
    Filed: April 26, 1996
    Date of Patent: December 2, 1997
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Katsuki Furukawa, Satoshi Sugahara
  • Patent number: 5433167
    Abstract: There is provided a method of producing a high-quality n-type, 6H silicon carbide single crystal with good reproducibility. A silicon carbide single crystal substrate having a growth orientation of <0001>, as a seed crystal, is mounted to an inner surface of a cover of a graphite crucible. A source material includes a high-purity silicon carbide powder having an impurity proportion of not more than 1 ppm and an aluminum powder of 50 ppm relative to the silicon carbide powder. The source material is loaded into the graphite crucible. The graphite crucible is closed with a seed crystal-mounted cover placed in a double quartz tube. Ar gas and N.sub.2 gas are caused to flow in the double quartz tube. Temperature of the silicon carbide powder and aluminum powder is controlled to 2300.degree. C., and temperature of the silicon carbide single crystal substrate to 2200.degree. C.; and interior of the double quartz tube is controlled to 30 torr.
    Type: Grant
    Filed: November 23, 1993
    Date of Patent: July 18, 1995
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Katsuki Furukawa, Yoshimitsu Tajima, Akira Suzuki
  • Patent number: 5387804
    Abstract: A light emitting diode is disclosed which comprises at least one heterojunction composed of silicon carbide (SIC) and semiconductor materials selected from the group consisting of gallium nitride (GAN), aluminum nitride (AlN), and aluminum gallium nitride (Ga.sub.x Al.sub.1-x N, 0<x<1).
    Type: Grant
    Filed: September 14, 1992
    Date of Patent: February 7, 1995
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Akira Suzuki, Katsuki Furukawa, Mitsuhiro Shigeta, Yoshihisa Fujii
  • Patent number: 5329141
    Abstract: A light emitting diode of silicon carbide having a p-n junction comprising an n-type layer doped with donor impurities, a first p-type layer doped with acceptor impurities, and a second p-type layer doped with acceptor impurities and donor impurities. The first p-type layer has a thickness less than the diffusion length of electrons having flowed from the n-type layer. In this way, the first p-type layer effects light emission related to the acceptor impurities which recombine with the electrons having flowed from the n-type layer, and the second p-type layer effects light emission by donor-acceptor pairs which recombine with the electrons having flowed from the n-type layer.
    Type: Grant
    Filed: October 30, 1992
    Date of Patent: July 12, 1994
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Akira Suzuki, Yoshihisa Fujii, Hajime Saito, Katsuki Furukawa, Yoshimitsu Tajima
  • Patent number: 5319220
    Abstract: A silicon carbide semiconductor device is provided which includes at least one heterojunction composed of two different polytypes of silicon carbide. The two polytypes of silicon carbide in the heterojunction include a .beta.-type silicon carbide layer having an .alpha.-type silicon carbide layer disposed thereon.
    Type: Grant
    Filed: June 8, 1992
    Date of Patent: June 7, 1994
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Akira Suzuki, Katsuki Furukawa, Mitsuhiro Shigeta, Yoshihisa Fujii, Atsuko Ogura
  • Patent number: 5288365
    Abstract: A method for growing a silicon carbide single crystal on a seed crystal using a molecular beam source in vacuo by means of a molecular beam epitaxy, wherein a material in the molecular beam source is silicon carbide. A silicon molecular beam source and/or an impurity molecular beam source for doping may be further used. Temperatures of the silicon carbide molecular beam source, the silicon molecular beam source, the impurity molecular beam source and the seed crystal are independently controlled. Vapor compositions are controlled by the silicon carbide molecular beam source, the silicon molecular beam source and the impurity molecular beam source.
    Type: Grant
    Filed: March 20, 1992
    Date of Patent: February 22, 1994
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Katsuki Furukawa, Yoshimitsu Tajima, Akira Suzuki
  • Patent number: 5279701
    Abstract: A method for the growth of silicon carbide single crystals is disclosed which includes the step of growing silicon carbide single crystals on a silicon single-crystal substrate. The silicon single-crystal substrate has growth areas with a crystal orientation inclined by an angle .theta. from the [100] direction toward at least one of the [011] and [011] directions and with a lateral dimension d taken along the direction of such inclination toward the [011] or [011] direction. The angle .theta. is set to be in the range of zero to tan.sup.-1 (.sqroot.2/8) degrees (with the proviso that the angle .theta. is not equal to tan.sup.-1 (.sqroot.2/2) degrees). The lateral dimension d is set to be in the range of 0.1 to 100 .mu.m. In this method, the silicon carbide single crystals are grown to a thickness t approximately equal to or greater than (.sqroot.2+tan.theta.)d/.vertline.1-.sqroot.2tan.theta..vertline., so that these silicon carbide single crystals are substantially free of defects such as stacking faults.
    Type: Grant
    Filed: August 24, 1992
    Date of Patent: January 18, 1994
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Mitsuhiro Shigeta, Akira Suzuki, Katsuki Furukawa, Yoshihisa Fujii
  • Patent number: 5272107
    Abstract: A silicon thin-film is formed on a silicon carbide (SiC) semiconductor body through the use of the thermal decomposition of monosilane (SiH.sub.4) gas. The thus formed silicon thin-film is oxidized by a thermal oxidation method which employs an oxygen gas so as to form a silicon oxide film of about 600 to 1200 .ANG. on the silicon carbide (SiC) semiconductor. The silicon oxide film shows a sharp boundary between the silicon carbide (SiC) semiconductor.An aluminum electrode is formed on the silicon oxide film, thereby providing a MOS structure on the silicon carbide (SiC) semiconductor.
    Type: Grant
    Filed: September 9, 1991
    Date of Patent: December 21, 1993
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Akira Suzuki, Katsuki Furukawa
  • Patent number: 5243204
    Abstract: There are provided silicon carbide light emitting diodes having a p-n junction which is constituted by a p-type silicon carbide single-crystal layer and an n-type silicon carbide single-crystal layer formed thereon. In cases where light emission caused by recombination of free excitons is substantially utilized, at least a part of the n-type silicon carbide layer adjacent to the interface of the p-n junction is doped with a donor impurity at a concentration of 5.times.10.sup.16 cm.sup.-3 or lower. In cases where light emission caused by acceptor-associated recombination is substantially utilized, the p-type silicon carbide layer is doped with an acceptor impurity and at least a part of the n-type silicon carbide layer adjacent to the interface of the p-n junction is doped with a donor impurity at a concentration of 1.times.10.sup.18 cm.sup.-3 or higher. Also provided are a method for producing such silicon carbide light emitting diodes and a method for producting another silicon carbide light emitting diode.
    Type: Grant
    Filed: May 17, 1991
    Date of Patent: September 7, 1993
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Akira Suzuki, Katsuki Furukawa, Yoshihisa Fujii
  • Patent number: 5230768
    Abstract: There is provided a method for the production of a silicon carbide single crystal, which includes the steps of: providing a silicon single-crystal substrate having a growth plane with a crystal orientation inclined from the [100] direction toward an off-direction, wherein the crystal orientation is defined by a deviation angle .theta. of 5 to 40 degrees, as measured from the [011] direction toward the [011] direction, and a tilt angle .phi. of 1 to 7 degrees, as measured from the [100] direction toward the off-direction; and growing a silicon carbide single crystal on the substrate.
    Type: Grant
    Filed: February 28, 1992
    Date of Patent: July 27, 1993
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Katsuki Furukawa, Akira Suzuki, Yoshihisa Fujii
  • Patent number: 5229625
    Abstract: The semiconductor device somprises a silicon substrate, a boron-doped high resistant silicon carbide layer formed on said silicon substrate and a silicon carbide layer formed on said high resistant silicon carbide layer.
    Type: Grant
    Filed: September 25, 1991
    Date of Patent: July 20, 1993
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Akira Suzuki, Katsuki Furukawa, Akitsugu Hatano, Atsuko Uemoto
  • Patent number: 5216264
    Abstract: A silicon carbide field-effect transistor is disclosed which includes an MOS structure composed successively of a silicon carbide layer, a gate insulator film, and a gate electrode. The field-effect transistor has source and drain regions formed in the silicon carbide layer, between which the MOS structure is disposed, wherein at least one of the source and drain regions is formed by the use of a Schottky contact on the silicon carbide layer.
    Type: Grant
    Filed: September 16, 1991
    Date of Patent: June 1, 1993
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Yoshihisa Fujii, Akira Suzuki, Katsuki Furukawa, Mitsuhiro Shigeta
  • Patent number: 5184199
    Abstract: A silicon carbide semiconductor device is disclosed which includes a semiconductor substrate and a silicon carbide single-crystal layer formed above the substrate, the silicon carbide single-crystal layer having a device active region. The silicon carbide semiconductor device further includes an aluminum nitride single-crystal layer which is disposed between the silicon carbide single-crystal layer and the substrate. The aluminum nitride single-crystal layer functions as an electrically insulating layer by which the silicon carbide signale-crystal layer is isolated electrically from the substrate.
    Type: Grant
    Filed: June 5, 1990
    Date of Patent: February 2, 1993
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Yoshihisa Fujii, Akira Suzuki, Katsuki Furukawa, Mitsuhiro Shigeta
  • Patent number: 5170231
    Abstract: A silicon carbide field-effect transistor is provided which includes a semiconductor substrate, a channel formation layer of silicon carbide formed above the substrate, source and drain regions provided in contact with the channel formation layer, a gate insulator disposed between the source and drain regions, and a gate electrode formed on the gate insulator, wherein a first contact between the channel formation layer and the drain region exhibits different electric characteristics from those of a second contact between the channel formation layer and the source region. Also provided is a method for producing such a silicon carbide field-effect transistor.
    Type: Grant
    Filed: May 24, 1991
    Date of Patent: December 8, 1992
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Yoshihisa Fujii, Akira Suzuki, Katsuki Furukawa
  • Patent number: 5135885
    Abstract: A method of manufacturing a semiconductor device comprises the steps of (i) forming a SiC monocrystal layer over the entire surface of a semiconductor substrate; (ii) forming a boron ion implanted layer, which is substantially a thin film, by implanting a specified amount of boron ions in the surface region of the SiC monocrystal layer; and (iii) forming a high resistance SiC monocrystal layer of a thin film by subjecting the boron ion implanted layer to heat treatment; whereby the high resistance SiC monocrystal layer can be function at least as an electric insulating layer.
    Type: Grant
    Filed: March 27, 1990
    Date of Patent: August 4, 1992
    Assignee: Sharp Corporation
    Inventors: Katsuki Furukawa, Yoshihisa Fujii, Mitsuhiro Shigeta, Akira Suzuki