Abstract: The present invention relates to a vertical semiconductor device such as an IGBT or a diode which includes an N buffer layer formed in the undersurface of and adjacent to an N? drift layer. A concentration slope ?, which is derived from displacements in a depth TB (?m) and an impurity concentration CB (cm?3), from the upper surface to the lower surface in a main portion of the N buffer layer satisfies a concentration slope condition defined by {0.03???0.7}.

Abstract: An object of the present invention is to provide a semiconductor device capable of preventing an occurrence of oscillation of voltage and current and a method of manufacturing the same. A semiconductor device according to the present invention includes an n type silicon substrate and a first n type buffer layer formed in a back surface of the n type silicon substrate and having a plurality of peaks of concentration of protons whose depths from the back surface are different from each other. In the first n type buffer layer, a concentration gradient of the protons from the peak located in a position closer to the back surface toward the surface of the n type silicon substrate is smaller than a concentration gradient of the protons from the peak located in a position farther away from the back surface toward the surface.

Abstract: A p-type base layer (2) is formed on a surface of an n-type silicon substrate (1). First and second n+-type buffer layers (8,9) 9 are formed on a back surface of the n-type silicon substrate (1). The first n+-type buffer layer (8) is formed by a plurality of implantations of protons at different accelerating voltages and has a plurality of peak concentrations with different depths from the back surface of the n-type silicon substrate (1). The second n+-type buffer layer (9) is formed by an implantation of a phosphorus. A position of a peak concentration of the phosphorus is shallower from the back surface of the n-type silicon substrate (1) than positions of peak concentrations of the protons. The peak concentration of the phosphorus is higher than the peak concentrations of the protons. A concentration of the protons is higher than a concentration of the phosphorus at the positions of the peak concentrations of the protons.

Abstract: An object of the present invention is to provide a semiconductor device capable of preventing an occurrence of oscillation of voltage and current and a method of manufacturing the same. A semiconductor device according to the present invention includes an n type silicon substrate and a first n type buffer layer formed in a back surface of the n type silicon substrate and having a plurality of peaks of concentration of protons whose depths from the back surface are different from each other. In the first n type buffer layer, a concentration gradient of the protons from the peak located in a position closer to the back surface toward the surface of the n type silicon substrate is smaller than a concentration gradient of the protons from the peak located in a position farther away from the back surface toward the surface.

Abstract: In order to hold a long member without using a fixing jig and without deforming the long member in holding the long member, a long member assembling device is provided with: multiple hand parts for gripping a long member; and arm parts and trunk parts for moving the hand parts to adjust the positions of the hand parts gripping the long member. The hand parts have a configuration such that, when the positions thereof are adjusted by the arm parts and the trunk parts, the hand parts are capable of moving in the longitudinal direction of the long member while gripping the long member.

Abstract: An active cell region, an edge termination region surrounding the active cell region and an intermediate region located at an intermediate position between these regions are provided, the active cell region has a trench gate type MOS structure on a top side, and a vertical structure on a bottom side includes a p-collector layer, an n-buffer layer on the p-collector layer, and an n-drift layer on the n-buffer layer, the n-buffer layer has a first buffer portion provided on the p-collector layer side, and a second buffer portion provided on the n-drift layer side, the peak impurity concentration of the first buffer portion is higher than the peak impurity concentration of the second buffer portion, and the impurity concentration gradient on the n-drift layer side of the second buffer portion is gentler than the impurity concentration gradient on the n-drift layer side of the first buffer portion.

Abstract: A semiconductor substrate includes a drift region and a collector region. The drift region is provided across an active area, an interface area, and an edge termination area. The collector region is provided only in the active area and forms part of a second surface. An emitter electrode is provided in the active area and contacts a first surface of the semiconductor substrate. A collector electrode is provided on the second surface of the semiconductor substrate and contacts the collector region.

Abstract: The present invention has an object of, in a semiconductor device having a vertical structure, providing stable withstand voltage characteristics, reducing a turn-off loss with reduction in leakage current at a time of turn-off, and improving a controllability of a turn-off operation and a blocking capability at a time of turn-off. A buffer layer includes a first buffer layer being joined to an active layer and having one peak point of an impurity concentration and a second buffer layer being joined to the first buffer layer and a drift layer, having at least one peak point of an impurity concentration, and having a maximum impurity concentration lower than that of the first buffer layer, and the maximum impurity concentration of the second buffer layer is higher than the impurity concentration of the drift layer and equal to or lower than 1.0×1015 cm?3.

Abstract: The present invention has an object of, in a semiconductor device having a vertical structure, providing stable withstand voltage characteristics, reducing a turn-off loss with reduction in leakage current at a time of turn-off, and improving a controllability of a turn-off operation and a blocking capability at a time of turn-off. A buffer layer includes a first buffer layer being joined to an active layer and having one peak point of an impurity concentration and a second buffer layer being joined to the first buffer layer and a drift layer, having at least one peak point of an impurity concentration, and having a maximum impurity concentration lower than that of the first buffer layer, and the maximum impurity concentration of the second buffer layer is higher than the impurity concentration of the drift layer and equal to or lower than 1.0×1015 cm?3.

Abstract: To hold a long member in the original shape of the long member at a precise position, a long member assembling device has: a plurality of hand parts configured to grip a long member; arm parts and trunk parts configured to move the hand parts to adjust the positions of the plurality of hand parts gripping the long member; a storage unit in which the original shape of the long member is stored; and a control unit configured to, on the basis of the original shape of the long member stored in the storage unit, drive the arm parts and the trunk parts to adjust the positions of the plurality of hand parts gripping the long member such that the shape of the long member gripped by the plurality of hand parts matches the original shape of the long member stored in the storage unit.

Abstract: A production facility is provided with: an AGV for transporting a plurality of fuselage panels of multiple types having different shapes in a mixed state on a previously determined transport path; a plurality of A/Rs for riveting the fuselage panels; work areas set so as to correspond to the respective A/Rs in which the A/Rs move to rivet the fuselage panels; and a buffer area, set beforehand in the transport path adjacent to the work area, to which the A/R corresponding to the adjacent work area moves so as to rivet the fuselage panel. When there is no fuselage panel to be riveted in the work area adjacent to the buffer area and the fuselage panel to be riveted is present in the buffer area, a control device moves the A/R corresponding to the work area adjacent to the buffer area to the buffer area to rivet the fuselage panel.

Abstract: A drift region has a first conductivity type. A well region is at least partially included in an interface area, has an end portion between the interface area and an edge termination area, and has a second conductivity type. An extension region extends outward from the well region, is shallower than the well region, and has the second conductivity type. A plurality of field-limiting rings are provided outside the extension region in the edge termination area. Each of the field-limiting rings together with the drift region located on the inner side forms a unit structure. The field-limiting ring located closer to the outside has a lower proportion of a width to a width of the unit structure. The unit structure located closer to the outside has a lower average dose.

Abstract: A p-type base layer (2) is formed on a surface of an n-type silicon substrate (1). First and second n+-type buffer layers (8,9) 9 are formed on a back surface of the n-type silicon substrate (1). The first n+-type buffer layer (8) is formed by a plurality of implantations of protons at different accelerating voltages and has a plurality of peak concentrations with different depths from the back surface of the n-type silicon substrate (1). The second n+-type buffer layer (9) is formed by an implantation of a phosphorus. A position of a peak concentration of the phosphorus is shallower from the back surface of the n-type silicon substrate (1) than positions of peak concentrations of the protons. The peak concentration of the phosphorus is higher than the peak concentrations of the protons. A concentration of the protons is higher than a concentration of the phosphorus at the positions of the peak concentrations of the protons.

Abstract: The first layer is located on the first electrode and has the first conductivity type. The second layer is located on the first layer and has the second conductivity type. The third layer is located on the second layer. The second electrode is located on the third layer. The fourth layer is located between the second layer and the third layer, and has the second conductivity type. The third layer includes the first portion and the second portion. The first portion has the second conductivity type and has a peak value of an impurity concentration higher than the peak value of the impurity concentration in the second layer. The second portion has the first conductivity type. The area of the second portion accounts for not less than 20% and not more than 95% of the total area of the first portion and the second portion.

Abstract: The object is to provide an aircraft component positioning device, an aircraft assembly system, and an aircraft assembly method with which it is possible to precisely dispose components on a planar member of an aircraft without using a positioning jig. A positioning device (2) includes a detection unit (5) that detects positions of a plurality of first components installed on a planar member of an aircraft, a virtual position creation unit (6) that creates a virtual position between the plurality of first components on the basis of the positions of the plurality of first components that are detected, and a position determination unit (7) that, on the basis of the virtual position that is created, determines an installation position of a second component, different from the plurality of first components, that is installed on the planar member.

Abstract: The present invention relates to a vertical semiconductor device such as an IGBT or a diode which includes an N buffer layer formed in the undersurface of and adjacent to an N? drift layer. A concentration slope ?, which is derived from displacements in a depth TB (?m) and an impurity concentration CB (cm?3), from the upper surface to the lower surface in a main portion of the N buffer layer satisfies a concentration slope condition defined by {0.03???0.7}.

Abstract: A semiconductor device includes a semiconductor substrate in which an active region and an edge termination region are defined, a semiconductor element formed in the active region, and first to fourth P layers formed in a region spanning from an edge portion of the active region to the edge termination region in the surface of the semiconductor substrate. The first to fourth P layers respectively have surface concentrations P(1) to P(4) that decrease in this order, bottom-end distances D(1) to D(4) that increase in this order, and distances B(1) to B(4) to the edge of the semiconductor substrate that increase in this order. The surface concentration P(4) is 10 to 1000 times the impurity concentration of the semiconductor substrate, and the bottom-end distance D(4) is in the range of 15 to 30 ?m.

Abstract: A semiconductor device having first through third layers. The first layer has a conductivity type that is different from a conductivity type of the second layer. A peak value of an impurity concentration of a portion of the third layer is greater than a peak value of an impurity concentration of the second layer. The semiconductor device allows a decrease in the forward voltage drop and also allows an improvement of the safe operating area tolerance. Thus, it is possible to decrease the forward voltage drop, improve the maximum reverse voltage, and suppress oscillations at the time of recovery.

Abstract: Provided is a heat storage including a container including a first container made of ceramics and a second container made of ceramics, the first container and the second container being combined, and a heat storage material housed inside the container. The first container and the second container are bonded via a bonding member. A volume occupied by pores in the first container, in a first contact region including a surface section in contact with the bonding member, is greater than a volume occupied by pores in regions other than the first contact region. A volume occupied by pores in the second container, in a second contact region including a surface section in contact with the bonding member, is greater than a volume occupied by pores in regions other than the second contact region.

Abstract: A semiconductor device includes a semiconductor substrate in which an active region and an edge termination region are defined, a semiconductor element formed in the active region, and first to fourth P layers formed in a region spanning from an edge portion of the active region to the edge termination region in the surface of the semiconductor substrate. The first to fourth P layers respectively have surface concentrations P(1) to P(4) that decrease in this order, bottom-end distances D(1) to D(4) that increase in this order, and distances B(1) to B(4) to the edge of the semiconductor substrate that increase in this order. The surface concentration P(4) is 10 to 1000 times the impurity concentration of the semiconductor substrate, and the bottom-end distance D(4) is in the range of 15 to 30 ?m.