Patents by Inventor Katsunori Yanashima

Katsunori Yanashima has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20100317136
    Abstract: A method for producing a semiconductor light emitting device is disclosed. The method comprises the step of growing a nitride type III-V group compound semiconductor layer that forms a light emitting device structure on a principal plane of a nitride type III-V group compound semiconductor substrate on which a plurality of second regions made of a crystal having a second average dislocation density are regularly arranged in a first region made of a crystal having a first average dislocation density so as to produce a semiconductor light emitting device, the second average dislocation density being greater than the first average dislocation density. The nitride type III-V group compound semiconductor layer does not directly contact the second regions on the principal plane of the nitride type III-V group compound semiconductor substrate.
    Type: Application
    Filed: June 28, 2010
    Publication date: December 16, 2010
    Applicants: SUMITOMO ELECTRIC INDUSTRIES, LTD, SONY CORPORATION
    Inventors: Katsunori Yanashima, Kensaku Motoki
  • Publication number: 20100308349
    Abstract: A light-emitting diode with (a) a substrate having at least one recessed portion on one main surface; (b) a sixth nitride-based III-V group compound semiconductor layer grown on the substrate without forming a space in the recessed portion; and (c) a third nitride-based III-V group compound semiconductor layer of a first conduction type, an active layer and a fourth nitride-based III-V group compound semiconductor layer of a second conduction type formed over the sixth nitride-based III-V group compound semiconductor layer, wherein, a dislocation occurring, in the sixth nitride-based III-V group compound semiconductor layer, from an interface with a bottom surface of the recessed portion in a direction vertical to the one main surface arrives at an inclined face or its vicinity of a triangle having the bottom surface of the recessed portion as a base and bends in a direction parallel to the one main surface.
    Type: Application
    Filed: June 9, 2010
    Publication date: December 9, 2010
    Applicant: Sony Corporation
    Inventors: Akira Ohmae, Shigetaka Tomiya, Yuki Maeda, Michinori Shiomi, Takaaki Ami, Takao Miyajima, Katsunori Yanashima, Takashi Tange, Atsushi Yasuda
  • Patent number: 7754504
    Abstract: A method for making a light-emitting diode, which including the steps of: providing a substrate having at least one recessed portion on one main surface and growing a first nitride-based III-V group compound semiconductor layer through a state of making a triangle in section having a bottom surface of the recessed portion as a base thereby burying the recessed portion; laterally growing a second nitride-based III-V group compound semiconductor layer from the first nitride-based III-V group compound semiconductor layer over the substrate; and successively growing a third nitride-based III-V group compound semiconductor layer of a first conduction type, an active layer and a fourth nitride-based III-V group compound semiconductor layer of a second conduction type on the second nitride-based III-V group compound semiconductor layer.
    Type: Grant
    Filed: May 16, 2006
    Date of Patent: July 13, 2010
    Assignee: Sony Corporation
    Inventors: Akira Ohmae, Shigetaka Tomiya, Yuki Maeda, Michinori Shiomi, Takaaki Ami, Takao Miyajima, Katsunori Yanashima, Takashi Tange, Atsushi Yasuda
  • Patent number: 7282379
    Abstract: Provided is a nitride semiconductor having a larger low-defective region on a surface thereof, a semiconductor device using the nitride semiconductor, a method of manufacturing a nitride semiconductor capable of easily reducing surface defects in a step of forming a layer through lateral growth, and a method of manufacturing a semiconductor device manufactured by the use of the nitride semiconductor. A seed crystal portion is formed into stripes on a substrate with a buffer layer sandwiched therebetween. Then, a crystal is grown from the seed crystal portion in two steps of growth conditions to form a nitride semiconductor layer. In a first step, a low temperature growth portion having a trapezoidal-shaped cross section in a layer thickness direction is formed at a growth temperature of 1030° C., and in a second step, lateral growth predominantly takes place at a growth temperature of 1070° C. Then, a high temperature growth potion is formed between the low temperature growth portions.
    Type: Grant
    Filed: March 22, 2005
    Date of Patent: October 16, 2007
    Assignee: Sony Corporation
    Inventors: Osamu Goto, Takeharu Asano, Motonobu Takeya, Katsunori Yanashima
  • Publication number: 20070085093
    Abstract: A method for manufacturing a light-emitting diode, which includes the steps of: providing a substrate having a plurality of protruded portions on one main surface thereof wherein the protruded portion is made of a material different in type from that of the substrate and growing a first nitride-based III-V Group compound semiconductor layer on each recess portion of the substrate through a state of making a triangle in section wherein a bottom surface of the recess portion becomes a base of the triangle; laterally growing a second nitride-based III-V Group compound semiconductor layer on the substrate from the first nitride-based III-V Group compound semiconductor layer; and successively growing, on the second nitride-based III-V Group compound semiconductor layer, a third nitride-based III-V Group compound semiconductor layer of a first conduction type, an active layer, and a fourth nitride-based III-V compound semiconductor layer of a second conduction type.
    Type: Application
    Filed: September 21, 2006
    Publication date: April 19, 2007
    Inventors: Akira Ohmae, Michinori Shiomi, Noriyuki Futagawa, Takaaki Ami, Takao Miyajima, Yuuji Hiramatsu, Izuho Hatada, Nobukata Okano, Shigetaka Tomiya, Katsunori Yanashima, Tomonori Hino, Hironobu Narui
  • Publication number: 20060286695
    Abstract: A method for producing a semiconductor light emitting device is disclosed. The method comprises the step of growing a nitride type III-V group compound semiconductor layer that forms a light emitting device structure on a principal plane of a nitride type III-V group compound semiconductor substrate on which a plurality of second regions made of a crystal having a second average dislocation density are regularly arranged in a first region made of a crystal having a first average dislocation density so as to produce a semiconductor light emitting device, the second average dislocation density being greater than the first average dislocation density. The nitride type III-V group compound semiconductor layer does not directly contact the second regions on the principal plane of the nitride type III-V group compound semiconductor substrate.
    Type: Application
    Filed: August 28, 2006
    Publication date: December 21, 2006
    Inventors: Katsunori Yanashima, Kensaku Motoki
  • Publication number: 20060258027
    Abstract: A method for making a light-emitting diode, which including the steps of: providing a substrate having at least one recessed portion on one main surface and growing a first nitride-based III-V group compound semiconductor layer through a state of making a triangle in section having a bottom surface of the recessed portion as a base thereby burying the recessed portion; laterally growing a second nitride-based III-V group compound semiconductor layer from the first nitride-based III-V group compound semiconductor layer over the substrate; and successively growing a third nitride-based III-V group compound semiconductor layer of a first conduction type, an active layer and a fourth nitride-based III-V group compound semiconductor layer of a second conduction type on the second nitride-based III-V group compound semiconductor layer.
    Type: Application
    Filed: May 16, 2006
    Publication date: November 16, 2006
    Inventors: Akira Ohmae, Shigetaka Tomiya, Yuki Maeda, Michinori Shiomi, Takaaki Ami, Takao Miyajima, Katsunori Yanashima, Takashi Tange, Atsushi Yasuda
  • Publication number: 20060172513
    Abstract: A method for producing a semiconductor light emitting device is disclosed. The method comprises the step of growing a nitride type III-V group compound semiconductor layer that forms a light emitting device structure on a principal plane of a nitride type III-V group compound semiconductor substrate on which a plurality of second regions made of a crystal having a second average dislocation density are regularly arranged in a first region made of a crystal having a first average dislocation density so as to produce a semiconductor light emitting device, the second average dislocation density being greater than the first average dislocation density. The nitride type III-V group compound semiconductor layer does not directly contact the second regions on the principal plane of the nitride type III-V group compound semiconductor substrate.
    Type: Application
    Filed: April 13, 2006
    Publication date: August 3, 2006
    Inventors: Katsunori Yanashima, Kensaku Motoki
  • Patent number: 6972206
    Abstract: Provided is a nitride semiconductor having a larger low-defective region on a surface thereof, a semiconductor device using the nitride semiconductor, a method of manufacturing a nitride semiconductor capable of easily reducing surface defects in a step of forming a layer through lateral growth, and a method of manufacturing a semiconductor device manufactured by the use of the nitride semiconductor. A seed crystal portion is formed into stripes on a substrate with a buffer layer sandwiched therebetween. Then, a crystal is grown from the seed crystal portion in two steps of growth conditions to form a nitride semiconductor layer. In a first step, a low temperature growth portion having a trapezoidal-shaped cross section in a layer thickness direction is formed at a growth temperature of 1030° C., and in a second step, lateral growth predominantly takes place at a growth temperature of 1070° C. Then, a high temperature growth potion is formed between the low temperature growth portions.
    Type: Grant
    Filed: April 18, 2005
    Date of Patent: December 6, 2005
    Assignee: Sony Corporation
    Inventors: Osamu Goto, Takeharu Asano, Motonobu Takeya, Katsunori Yanashima
  • Patent number: 6960262
    Abstract: A thin film formation apparatus by which source gas is supplied uniformly to the surface of a substrate so that an organic thin film of a uniform film thickness can be formed on the surface of the substrate. The thin film formation apparatus includes a vacuum chamber (11), a substrate holder (12) provided in the vacuum chamber (11), and a gas supplying end element (22) for supplying gas toward a substrate mounting face (12a) of the substrate holder (12). The gas supplying end element (22) is formed so as to supply the source gas in an elongated rectangular shape to the substrate mounting face (12a).
    Type: Grant
    Filed: June 17, 2003
    Date of Patent: November 1, 2005
    Assignee: Sony Corporation
    Inventors: Koji Sasaki, Hironobu Narui, Katsunori Yanashima, Akihiko Memezawa
  • Publication number: 20050238806
    Abstract: A method for forming, without heat evolution, an organic thin film with homogeneous quality on the surface of the substrate. The method consists of vaporizing a single film-forming component of organic material, thereby evolving a film-forming gas (g2), transporting and feeding the film-forming gas (g2) into a reaction chamber (11) in which a substrate (W) is placed, and depositing the organic material, while keeping the film-forming component, on the surface of the substrate (W) in the reaction chamber (11). The substrate (W) is kept cooled while the organic material is being deposited. The film-forming gas (g2) is transported and fed into the reaction chamber (11) by using a carrier gas, such as an inert gas (g1). The deposition of the organic material is repeated so that films differing in composition are formed one over another.
    Type: Application
    Filed: June 5, 2003
    Publication date: October 27, 2005
    Inventors: Katsunori Yanashima, Hironobu Narui, Akihiko Memezawa, Koji Sasaki
  • Publication number: 20050221515
    Abstract: A method for producing a semiconductor light emitting device is disclosed. The method comprises the step of growing a nitride type III-V group compound semiconductor layer that forms a light emitting device structure on a principal plane of a nitride type III-V group compound semiconductor substrate on which a plurality of second regions made of a crystal having a second average dislocation density are regularly arranged in a first region made of a crystal having a first average dislocation density so as to produce a semiconductor light emitting device, the second average dislocation density being greater than the first average dislocation density. The nitride type III-V group compound semiconductor layer does not directly contact the second regions on the principal plane of the nitride type III-V group compound semiconductor substrate.
    Type: Application
    Filed: March 30, 2004
    Publication date: October 6, 2005
    Inventors: Katsunori Yanashima, Kensaku Motoki
  • Patent number: 6939730
    Abstract: Provided is a nitride semiconductor having a larger low-defective region on a surface thereof, a semiconductor device using the nitride semiconductor, a method of manufacturing a nitride semiconductor capable of easily reducing surface defects in a step of forming a layer through lateral growth, and a method of manufacturing a semiconductor device manufactured by the use of the nitride semiconductor. A seed crystal portion is formed into stripes on a substrate with a buffer layer sandwiched therebetween. Then, a crystal is grown from the seed crystal portion in two steps of growth conditions to form a nitride semiconductor layer. In a first step, a low temperature growth portion having a trapezoidal-shaped cross section in a layer thickness direction is formed at a growth temperature of 1030° C., and in a second step, lateral growth predominantly takes place at a growth temperature of 1070° C. Then, a high temperature growth potion is formed between the low temperature growth portions.
    Type: Grant
    Filed: April 24, 2002
    Date of Patent: September 6, 2005
    Assignee: Sony Corporation
    Inventors: Osamu Goto, Takeharu Asano, Motonobu Takeya, Katsunori Yanashima
  • Publication number: 20050184302
    Abstract: Provided is a nitride semiconductor device with high reliability and high flexibility in design and manufacture of the device. The nitride semiconductor device comprises a seed crystal portion (11) formed on a sapphire substrate (10) and having a mask (12) on one side surface thereof, and a GaN layer (15) grown on the sapphire substrate (10) and the seed crystal portion (11) through epitaxial lateral overgrowth. The GaN layer (15) is grown only from an exposed side surface of the seed crystal portion (11) which is not covered with the mask (12), so the lateral growth of the GaN layer (15) is asymmetrically carried out. Thereby, a meeting portion (32) is formed in the vicinity of a boundary between the seed crystal portion (11) and the mask (12) in a thickness direction of the GaN layer (15).
    Type: Application
    Filed: April 22, 2005
    Publication date: August 25, 2005
    Inventors: Toshimasa Kobayashi, Katsunori Yanashima, Takashi Yamaguchi, Hiroshi Nakajima
  • Publication number: 20050178471
    Abstract: Provided is a nitride semiconductor having a larger low-defective region on a surface thereof, a semiconductor device using the nitride semiconductor, a method of manufacturing a nitride semiconductor capable of easily reducing surface defects in a step of forming a layer through lateral growth, and a method of manufacturing a semiconductor device manufactured by the use of the nitride semiconductor. A seed crystal portion is formed into stripes on a substrate with a buffer layer sandwiched therebetween. Then, a crystal is grown from the seed crystal portion in two steps of growth conditions to form a nitride semiconductor layer. In a first step, a low temperature growth portion having a trapezoidal-shaped cross section in a layer thickness direction is formed at a growth temperature of 1030° C., and in a second step, lateral growth predominantly takes place at a growth temperature of 1070° C. Then, a high temperature growth potion is formed between the low temperature growth portions.
    Type: Application
    Filed: April 18, 2005
    Publication date: August 18, 2005
    Inventors: Osamu Goto, Takeharu Asano, Motonobu Takeya, Katsunori Yanashima
  • Publication number: 20050164418
    Abstract: Provided is a nitride semiconductor having a larger low-defective region on a surface thereof, a semiconductor device using the nitride semiconductor, a method of manufacturing a nitride semiconductor capable of easily reducing surface defects in a step of forming a layer through lateral growth, and a method of manufacturing a semiconductor device manufactured by the use of the nitride semiconductor. A seed crystal portion is formed into stripes on a substrate with a buffer layer sandwiched therebetween. Then, a crystal is grown from the seed crystal portion in two steps of growth conditions to form a nitride semiconductor layer. In a first step, a low temperature growth portion having a trapezoidal-shaped cross section in a layer thickness direction is formed at a growth temperature of 1030° C., and in a second step, lateral growth predominantly takes place at a growth temperature of 1070° C. Then, a high temperature growth potion is formed between the low temperature growth portions.
    Type: Application
    Filed: March 22, 2005
    Publication date: July 28, 2005
    Inventors: Osamu Goto, Takeharu Asano, Motonobu Takeya, Katsunori Yanashima
  • Patent number: 6921673
    Abstract: Provided is a nitride semiconductor device with high reliability and high flexibility in design and manufacture of the device. The nitride semiconductor device comprises a seed crystal portion (11) formed on a sapphire substrate (10) and having a mask (12) on one side surface thereof, and a GaN layer (15) grown on the sapphire substrate (10) and the seed crystal portion (11) through epitaxial lateral overgrowth. The GaN layer (15) is grown only from an exposed side surface of the seed crystal portion (11) which is not covered with the mask (12), so the lateral growth of the GaN layer (15) is asymmetrically carried out. Thereby, a meeting portion (32) is formed in the vicinity of a boundary between the seed crystal portion (11) and the mask (12) in a thickness direction of the GaN layer (15).
    Type: Grant
    Filed: March 27, 2002
    Date of Patent: July 26, 2005
    Assignee: Sony Corporation
    Inventors: Toshimasa Kobayashi, Katsunori Yanashima, Takashi Yamaguchi, Hiroshi Nakajima
  • Publication number: 20050098791
    Abstract: A nitride semiconductor having a large low-defect region in a surface thereof, and a semiconductor device using the same are provided. Also, a manufacturing method for a nitride semiconductor comprising a layer formation step using a transverse growth technique where surface defects can easily be reduced, and a manufacturing method for a semiconductor device using the same are provided. On a substrate, a seed crystal part is formed in a stripe pattern with a buffer layer in between. Next, crystals are grown from the seed crystal part in two stages of growth conditions to form a nitride semiconductor layer. Low temperature growing parts with a trapezoid shaped cross section are formed at a growth temperature of 1030° C. in the first stage and a transverse growth is dominantly advanced at a growth temperature of 1070° C. to form a high temperature growing part between the low temperature growing parts in the second stage.
    Type: Application
    Filed: December 2, 2004
    Publication date: May 12, 2005
    Inventors: Osamu Goto, Takeharu Asano, Motonobu Takeya, Katsunori Yanashima, Shinro Ikeda, Katsuyoshi Shibuya, Yasuhiko Suzuki
  • Patent number: 6890785
    Abstract: A nitride semiconductor having a large low-defect region in a surface thereof, and a semiconductor device using the same are provided. Also, a manufacturing method for a nitride semiconductor comprising a layer formation step using a transverse growth technique where surface defects can easily be reduced, and a manufacturing method for a semiconductor device using the same are provided. On a substrate, a seed crystal part is formed in a stripe pattern with a buffer layer in between. Next, crystals are grown from the seed crystal part in two stages of growth conditions to form a nitride semiconductor layer. Low temperature growing parts with a trapezoid shaped cross section are formed at a growth temperature of 1030° C. in the first stage and a transverse growth is dominantly advanced at a growth temperature of 1070° C. to form a high temperature growing part between the low temperature growing parts in the second stage.
    Type: Grant
    Filed: February 24, 2003
    Date of Patent: May 10, 2005
    Assignee: Sony Corporation
    Inventors: Osamu Goto, Takeharu Asano, Motonobu Takeya, Katsunori Yanashima, Shinro Ikeda, Katsuyoshi Shibuya, Yasuhiko Suzuki
  • Publication number: 20050000407
    Abstract: A semiconductor laser, a semiconductor device and a nitride series III-V group compound substrate capable of obtaining a crystal growth layer with less fluctuation of the crystallographic axes and capable of improving the device characteristics, as well as a manufacturing method therefor are provided. The semiconductor laser comprises, on one surface of a substrate used for growing, a plurality of spaced apart seed crystal layers and an n-side contact layer having a lateral growing region which is grown on the basis of the plurality of seed crystal layers. The seed crystal layer is formed in that a product of width w1 (unit: ?m) at the boundary thereof relative to the n-side contact layer along the arranging direction A and a thickness t1 (unit: ?m) along the direction of laminating the n-side contact layer is 15 or less. This can decrease the fluctuation of the crystallographic axes in the n-side contact layer.
    Type: Application
    Filed: August 2, 2004
    Publication date: January 6, 2005
    Inventors: Motonobu Takeya, Katsunori Yanashima, Takeharu Asano, Osamu Goto, Shinro Ikeda, Katsuyoshi Shibuya, Tomonori Hino, Satoru Kijima, Masao Ikeda