Patents by Inventor Kazuhiro Hoshino

Kazuhiro Hoshino has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5972786
    Abstract: A process for forming wiring over a migration preventing layer on a semiconductor substrate including forming a contact hole in a an insulation layer of the substrate and then filling the contact hole with an aluminum based alloy. A migration preventing layer is then formed, of a material which resists migration of atoms of the aluminum based alloy, over the surface of the aluminum based alloy. A wiring layer of aluminum is then formed over the migration preventing layer. In another embodiment, the contact hole may be provided with a first layer to prevent electron migration and a second layer which is a nitride of the first layer material.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: October 26, 1999
    Assignee: Sony Corporation
    Inventors: Kazuhiro Hoshino, Yukiyasu Sugano
  • Patent number: 5792333
    Abstract: A method of surface-roughening a copper foil by subjecting at least one side of the copper foil to electro-plating using an alternating current, wherein a sulfuric acid bath or a sulfuric acid-copper sulfate bath is used as an electrolyte.
    Type: Grant
    Filed: June 13, 1997
    Date of Patent: August 11, 1998
    Assignee: Circuit Foil Japan Co., Ltd.
    Inventors: Ryoichi Oguro, Tadao Nakaoka, Kazuyuki Inoue, Kazuhiro Hoshino
  • Patent number: 5776830
    Abstract: The present invention provides a process for fabricating a connection structure comprising a anti-reaction layer having excellent barrier properties and having improved ohmic characteristics with respect to the semiconductor substrate. Accordingly, the present invention comprises forming a first anti-reaction layer by temporarily ceasing the film deposition, and then initiating the film deposition again to form a second anti-reaction layer on the surface of the previously deposited first anti-reaction layer. A heat treatment can be applied to the structure after depositing a anti-reaction layer.
    Type: Grant
    Filed: October 9, 1997
    Date of Patent: July 7, 1998
    Assignee: Sony Corporation
    Inventors: Hirofumi Sumi, Keiichi Maeda, Yukiyasu Sugano, Kazuhide Koyama, Mitsuru Taguchi, Kazuhiro Hoshino
  • Patent number: 5532600
    Abstract: Disclosed is a method of and an apparatus for evaluating the reliability of metal interconnects. It is capable of performing the evaluation under such a testing condition as to reproduce an actual operating environment, that is, under the testing condition of simultaneously accelerating electromigration and stress-induced migration, thereby evaluating failures conventionally missed to be evaluated. In particular, this method is applicable for evaluating the reliability of metal interconnects of semiconductor devices, and which includes the steps of performing a constant-temperature storage test I for interconnect reliability evaluation at a temperature over a specified temperature for a specified time; and applying a current to the interconnect and simultaneously performing a test II of measuring a voltage of the interconnect.
    Type: Grant
    Filed: October 27, 1994
    Date of Patent: July 2, 1996
    Assignee: Sony Corporation
    Inventor: Kazuhiro Hoshino
  • Patent number: 5444182
    Abstract: A connector cover for a wire harness includes a main cover composed of a hinged pair of half case bodies and a secondary cover composed of a hinged pair of semicylindrical bodies. The main cover is formed with an opening for affixing to the back of the connector and a circular opening with a circular ridge elongating inside surface for passing the wire extending from the connector when the half case bodies are closed. The secondary cover having both ends opened for taking in the wire harness and is formed with a cylindrical opening with a channel grove extending therearound for passing the wire when the semicylindrical bodies are closed, and is connected to the main cover such that the circular ridge of the main cover fits in the channel groove around the cylindrical opening, in a manner easy to rotate with respect to the main cover.
    Type: Grant
    Filed: December 13, 1993
    Date of Patent: August 22, 1995
    Assignee: Sumitomo Wiring Systems
    Inventor: Kazuhiro Hoshino
  • Patent number: 5430258
    Abstract: A method of preparing a Cu interconnection structure includes the following steps in the sequence: (a) depositing a Cu layer on a substrate layer; (b) depositing an Al layer on said Cu layer; (c) heating said Al layer and said Cu layer at a temperature ranging from 300.degree. C. to 550.degree. C. so as to transform said Al layer into a layer of alloy consisting of Al and Cu; and (d) depositing an insulating layer containing SiO.sub.2 on the alloy layer. Oxidation of Cu is suppressed by the formation of Al.sub.2 O.sub.3 on the outer surface of the alloy layer. Therefore, increase of electrical resistance of the Cu interconnection structure is substantially suppressed.
    Type: Grant
    Filed: March 11, 1994
    Date of Patent: July 4, 1995
    Assignee: Sony Corporation
    Inventor: Kazuhiro Hoshino
  • Patent number: 5315062
    Abstract: A connector cover for a wire harness includes a main cover composed of a hinged pair of half case bodies and a secondary cover composed of a hinged pair of semicylindrical bodies. The main cover is formed with an opening for affixing to the back of the connector and a circular opening with a circular ridge elongating inside surface for passing the wire extending from the connector when the half case bodies are closed. The secondary cover has both ends opened for receiving the wire harness and is formed with a cylindrical opening with a channel grove extending therearound for passing the wire when the semicylindrical bodies are closed, and is connected to the main cover such that the circular ridge of the main cover fits in the channel groove around the cylindrical opening. Accordingly, the secondary cover can rotate with respect to the main cover.
    Type: Grant
    Filed: November 21, 1991
    Date of Patent: May 24, 1994
    Assignee: Sumitomo Wiring Systems, Ltd.
    Inventor: Kazuhiro Hoshino
  • Patent number: 4985750
    Abstract: A semiconductor device comprises a silicon substrate, an insulating film in which a contact hole is formed, a metallic layer deposited on said silicon substrate through the contact hole, for forming an ohmic contact to the silicon substrate, a barrier layer deposited on the metallic layer, for preventing reaction and interdiffusion between copper and silicon, and a metallization film including at least copper deposited on the barrier layer.
    Type: Grant
    Filed: September 17, 1987
    Date of Patent: January 15, 1991
    Assignee: Fujitsu Limited
    Inventor: Kazuhiro Hoshino
  • Patent number: 4910169
    Abstract: A method of producing a semiconductor device includes the steps of forming a metallization film including copper on a surface of a substrate, and depositing an insulating film on a surface of the metallization film at a temperature which is below the oxidation temperature of copper.
    Type: Grant
    Filed: September 17, 1987
    Date of Patent: March 20, 1990
    Assignee: Fujitsu Limited
    Inventor: Kazuhiro Hoshino