Patents by Inventor Kazuhito Kimura

Kazuhito Kimura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11025956
    Abstract: An encoding method includes determining video format information, (i) setting each of all frames or all fields which are included in the video, as a picture, regardless of whether the video format is the interlace format or the progressive format, (ii) setting a POC indicating display order to each of all of the set pictures one by one, the POC being different each other, and encoding a picture to be encoded which is the frame or the field with reference to a picture previously encoded before encoding the picture to be encoded. In the encoding, the video is encoded with a syntax structure which is not dependent on the video format, the video format information is encoded in a header of a sequence which is a unit of the video, and the encoded bit stream is generated.
    Type: Grant
    Filed: June 16, 2017
    Date of Patent: June 1, 2021
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Kiyofumi Abe, Kazuhito Kimura, Hideyuki Ohgose, Hiroshi Arakawa, Koji Arimura
  • Patent number: 10757422
    Abstract: A video image encoding device, in a first mode, variable-length-encodes a residual coefficient to generate a coefficient code string, outputs the coefficient code string and the header information in a state in which the header information is associated with the coefficient code string, in a second mode, directly uses a differential image as a coefficient code string without variable-length-encoding the differential image, and outputs the coefficient code string and the header information in a state in which the header information is associated with the coefficient code string.
    Type: Grant
    Filed: September 9, 2013
    Date of Patent: August 25, 2020
    Assignee: Panasonic Intellectual Property Corporation of America
    Inventors: Hideyuki Ohgose, Kiyofumi Abe, Hiroshi Arakawa, Tatsuro Juri, Kazuhito Kimura
  • Publication number: 20200244952
    Abstract: A video decoding device, in the case where a video of the progressive format is inputted, processes a frame as a picture, in the case where a video of the interlace format is inputted, processes a field as a picture. A video decoding device performs display control corresponding to a format of the both video by analyzing display control information in display control information analyzer. The display control information includes sequence unit display control information which is commonly used in a display process of all pictures that belong to a sequence to be decoded and picture unit display control information which is individually used in a display process of a picture to be decoded. A second code string analyzer acquires each of the sequence unit display control information and the picture unit display control information from an extended information area in units of pictures.
    Type: Application
    Filed: April 10, 2020
    Publication date: July 30, 2020
    Inventors: Kiyofumi ABE, Kazuhito KIMURA, Hideyuki OHGOSE, Hiroshi ARAKAWA, Koji ARIMURA
  • Publication number: 20200162747
    Abstract: A video image decoding device receives, as the code string to be decoded, a first code string to be decoded including in formation based on an encoded residual coefficient and header information or a second code string to be decoded including a residual image obtained in encoding the code string to be decoded and header information. The video image decoding device, when the code string to be decoded that is received by the receiver is the first code string to be decoded, adds the residual decoded image and the predictive image to each other to generate and output a reconstructed image and, when the code string to be decoded received by the receiver is the second code string to be decoded, adds a residual image included in the second code string to be decoded and the predictive image to each other to generate and output a reconstructed image.
    Type: Application
    Filed: January 24, 2020
    Publication date: May 21, 2020
    Inventors: Hideyuki OHGOSE, Kiyofumi ABE, Hiroshi ARAKAWA, Tatsuro JURI, Kazuhito KIMURA
  • Publication number: 20200162748
    Abstract: A video image encoding device, in a first mode, variable-length-encodes a residual coefficient to generate a coefficient code string, outputs the coefficient code string and the header information in a state in which the header information is associated with the coefficient code string, in a second mode, directly uses a differential image as a coefficient code string without variable-length-encoding the differential image, and outputs the coefficient code string and the header information in a state in which the header information is associated with the coefficient code string.
    Type: Application
    Filed: January 24, 2020
    Publication date: May 21, 2020
    Inventors: Hideyuki OHGOSE, Kiyofumi ABE, Hiroshi ARAKAWA, Tatsuro JURI, Kazuhito KIMURA
  • Patent number: 10659775
    Abstract: A video decoding device, in the case where a video of the progressive format is inputted, processes a frame as a picture, in the case where a video of the interlace format is inputted, processes a field as a picture. A video decoding device performs display control corresponding to a format of the both video by analyzing display control information in display control information analyzer. The display control information includes sequence unit display control information which is commonly used in a display process of all pictures that belong to a sequence to be decoded and picture unit display control information which is individually used in a display process of a picture to be decoded. A second code string analyzer acquires each of the sequence unit display control information and the picture unit display control information from an extended information area in units of pictures.
    Type: Grant
    Filed: October 2, 2017
    Date of Patent: May 19, 2020
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Kiyofumi Abe, Kazuhito Kimura, Hideyuki Ohgose, Hiroshi Arakawa, Koji Arimura
  • Patent number: 10587882
    Abstract: A video image decoding device receives, as the code string to be decoded, a first code string to be decoded including information based on an encoded residual coefficient and header information or a second code string to be decoded including a residual image obtained in encoding of the code string to be decoded and header information. The video image decoding device, when the code string to be decoded that is received by the receiver is the first code string to be decoded, adds the residual decoded image and the predictive image to each other to generate and output a reconstructed image and, when the code string to be decoded received by the receiver is the second code string to be decoded, adds a residual image included in the second code string to be decoded and the predictive image to each other to generate and output a reconstructed image.
    Type: Grant
    Filed: September 9, 2013
    Date of Patent: March 10, 2020
    Assignee: Panasonic Intellectual Property Corporation of America
    Inventors: Hideyuki Ohgose, Kiyofumi Abe, Hiroshi Arakawa, Tatsuro Juri, Kazuhito Kimura
  • Publication number: 20190156392
    Abstract: A video coding apparatus including a dividing part that outputs the coding target picture divided for each coding unit (basic CU); a prediction processor that generates a prediction image by performing one of intra prediction and inter-screen prediction; a difference calculator that generates a difference image by calculating a difference between the generated prediction image and an image corresponding to the prediction image in the coding target picture; a residual coder that generates a residual coefficient by performing transform processing and quantization processing on the generated difference image; an integration unit that integrates a plurality of basic CUs included in an N×N-pixel region into one new CU, and a code string generator that generates a code string corresponding to the post-integration new CU by performing variable-length coding and arithmetic coding on coding information and the residual coefficient.
    Type: Application
    Filed: January 22, 2019
    Publication date: May 23, 2019
    Inventors: Kiyofumi ABE, Kazuhito KIMURA, Hideyuki OHGOSE, Hiroshi ARAKAWA, Koji ARIMURA, Kazuma SAKAKIBARA
  • Patent number: 10237561
    Abstract: A video coding apparatus is a video coding apparatus which codes a coding target video based on a coding standard, and includes: a dividing unit which divides an image included in the coding target video into a plurality of control blocks; and a prediction image generating unit which divides each of the control blocks into a plurality of prediction blocks, and generates, for each of the prediction blocks, a prediction image using one of inter prediction and intra prediction, wherein the coding standard allows each of the control blocks to be divided into the prediction blocks such that the prediction blocks have different sizes, and the prediction image generating unit divides each of the control blocks into the prediction blocks such that the prediction blocks all have an identical size, rather than dividing each of the control blocks into the prediction blocks such that the prediction blocks have different sizes.
    Type: Grant
    Filed: August 30, 2017
    Date of Patent: March 19, 2019
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Hiroshi Arakawa, Kiyofumi Abe, Kazuhito Kimura, Hideyuki Ohgose, Koji Arimura, Kazuma Sakakibara
  • Patent number: 10225576
    Abstract: A video coding apparatus including a dividing part that outputs the coding target picture divided for each coding unit (basic CU); a prediction processor that generates a prediction image by performing one of intra prediction and inter-screen prediction; a difference calculator that generates a difference image by calculating a difference between the generated prediction image and an image corresponding to the prediction image in the coding target picture; a residual coder that generates a residual coefficient by performing transform processing and quantization processing on the generated difference image; an integration unit that integrates a plurality of basic CUs included in an N×N-pixel region into one new CU, and a code string generator that generates a code string corresponding to the post-integration new CU by performing variable-length coding and arithmetic coding on coding information and the residual coefficient.
    Type: Grant
    Filed: March 6, 2015
    Date of Patent: March 5, 2019
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Kiyofumi Abe, Kazuhito Kimura, Hideyuki Ohgose, Hiroshi Arakawa, Koji Arimura, Kazuma Sakakibara
  • Patent number: 10038901
    Abstract: An image encoding method includes: selecting, for each processing block, one of intra prediction modes specified by a coding standard, and performing intra prediction according to the intra prediction mode, wherein the intra prediction modes include a lower-left reference mode in which a processing block located at lower left of a current processing block is referred to, the processing blocks include a first processing block and a second processing block located at upper right of the first processing block, the second processing block being equal in size to the first processing block, the coding standard defines that information on the second processing block is written into a bitstream after information on the first processing block.
    Type: Grant
    Filed: June 23, 2017
    Date of Patent: July 31, 2018
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Kazuma Sakakibara, Kiyofumi Abe, Naoki Yoshimatsu, Hideyuki Ohgose, Koji Arimura, Hiroshi Arakawa, Kazuhito Kimura
  • Publication number: 20180041756
    Abstract: A video decoding device, in the case where a video of the progressive format is inputted, processes a frame as a picture, in the case where a video of the interlace format is inputted, processes a field as a picture. A video decoding device performs display control corresponding to a format of the both video by analyzing display control information in display control information analyzer. The display control information includes sequence unit display control information which is commonly used in a display process of all pictures that belong to a sequence to be decoded and picture unit display control information which is individually used in a display process of a picture to be decoded. A second code string analyzer acquires each of the sequence unit display control information and the picture unit display control information from an extended information area in units of pictures.
    Type: Application
    Filed: October 2, 2017
    Publication date: February 8, 2018
    Inventors: Kiyofumi ABE, Kazuhito KIMURA, Hideyuki OHGOSE, Hiroshi ARAKAWA, Koji ARIMURA
  • Patent number: 9866841
    Abstract: Provided is an image coding method which obtains a picture, and codes the obtained picture. The image coding method generates a processing block, performs a first intra prediction that selects one intra prediction mode from a first set of candidates based on a component of a first signal contained in the processing block, performs a second intra prediction that selects one intra prediction mode from a second set of candidates based on a component of a second signal contained in the processing block. The first set of candidates includes a plurality of intra prediction modes, and the second set of candidates includes an intra prediction mode, having no dependency between the second intra prediction and the first intra prediction, of the plurality of intra prediction modes. The first intra prediction and the second intra prediction are performed in parallel.
    Type: Grant
    Filed: July 15, 2015
    Date of Patent: January 9, 2018
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Yuki Maruyama, Kiyofumi Abe, Hideyuki Ohgose, Koji Arimura, Hiroshi Arakawa, Kazuma Sakakibara, Kazuhito Kimura
  • Publication number: 20170366815
    Abstract: A video coding apparatus is a video coding apparatus which codes a coding target video based on a coding standard, and includes: a dividing unit which divides an image included in the coding target video into a plurality of control blocks; and a prediction image generating unit which divides each of the control blocks into a plurality of prediction blocks, and generates, for each of the prediction blocks, a prediction image using one of inter prediction and intra prediction, wherein the coding standard allows each of the control blocks to be divided into the prediction blocks such that the prediction blocks have different sizes, and the prediction image generating unit divides each of the control blocks into the prediction blocks such that the prediction blocks all have an identical size, rather than dividing each of the control blocks into the prediction blocks such that the prediction blocks have different sizes.
    Type: Application
    Filed: August 30, 2017
    Publication date: December 21, 2017
    Inventors: Hiroshi ARAKAWA, Kiyofumi ABE, Kazuhito KIMURA, Hideyuki OHGOSE, Koji ARIMURA, Kazuma SAKAKIBARA
  • Publication number: 20170302919
    Abstract: An image encoding method includes: selecting, for each processing block, one of intra prediction modes specified by a coding standard, and performing intra prediction according to the intra prediction mode, wherein the intra prediction modes include a lower-left reference mode in which a processing block located at lower left of a current processing block is referred to, the processing blocks include a first processing block and a second processing block located at upper right of the first processing block, the second processing block being equal in size to the first processing block, the coding standard defines that information on the second processing block is written into a bitstream after information on the first processing block, and in the intra prediction, (i) selection of the lower-left reference mode is prohibited and intra prediction is performed on the second processing block, and, (ii) intra prediction is performed on the first processing block.
    Type: Application
    Filed: June 23, 2017
    Publication date: October 19, 2017
    Inventors: Kazuma SAKAKIBARA, Kiyofumi ABE, Naoki YOSHIMATSU, Hideyuki OHGOSE, Koji ARIMURA, Hiroshi ARAKAWA, Kazuhito KIMURA
  • Publication number: 20170289553
    Abstract: An encoding method includes determining video format information, (i) setting each of all frames or all fields which are included in the video, as a picture, regardless of whether the video format is the interlace format or the progressive format, (ii) setting a POC indicating display order to each of all of the set pictures one by one, the POC being different each other, and encoding a picture to be encoded which is the frame or the field with reference to a picture previously encoded before encoding the picture to be encoded. In the encoding, the video is encoded with a syntax structure which is not dependent on the video format, the video format information is encoded in a header of a sequence which is a unit of the video, and the encoded bit stream is generated.
    Type: Application
    Filed: June 16, 2017
    Publication date: October 5, 2017
    Inventors: Kiyofumi ABE, Kazuhito KIMURA, Hideyuki OHGOSE, Hiroshi ARAKAWA, Koji ARIMURA
  • Patent number: 9781434
    Abstract: A video coding apparatus is a video coding apparatus which codes a coding target video based on a coding standard, and includes: a dividing unit which divides an image included in the coding target video into a plurality of control blocks; and a prediction image generating unit which divides each of the control blocks into a plurality of prediction blocks, and generates, for each of the prediction blocks, a prediction image using one of inter prediction and intra prediction, wherein the coding standard allows each of the control blocks to be divided into the prediction blocks such that the prediction blocks have different sizes, and the prediction image generating unit divides each of the control blocks into the prediction blocks such that the prediction blocks all have an identical size, rather than dividing each of the control blocks into the prediction blocks such that the prediction blocks have different sizes.
    Type: Grant
    Filed: February 2, 2015
    Date of Patent: October 3, 2017
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Hiroshi Arakawa, Kiyofumi Abe, Kazuhito Kimura, Hideyuki Ohgose, Koji Arimura, Kazuma Sakakibara
  • Patent number: 9723326
    Abstract: An image encoding method includes: selecting, for each processing block, one of intra prediction modes specified by a coding standard, and performing intra prediction according to the intra prediction mode, wherein the intra prediction modes include a lower-left reference mode in which a processing block located at lower left of a current processing block is referred to, the processing blocks include a first processing block and a second processing block located at upper right of the first processing block, the second processing block being equal in size to the first processing block, the coding standard defines that information on the second processing block is written into a bitstream after information on the first processing block, and in the intra prediction, (i) selection of the lower-left reference mode is prohibited and intra prediction is performed on the second processing block, and, (ii) intra prediction is performed on the first processing block.
    Type: Grant
    Filed: February 11, 2015
    Date of Patent: August 1, 2017
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Kazuma Sakakibara, Kiyofumi Abe, Naoki Yoshimatsu, Hideyuki Ohgose, Koji Arimura, Hiroshi Arakawa, Kazuhito Kimura
  • Patent number: 9473787
    Abstract: In an exemplary embodiment, in order to avoid enlargement of a circuit scale to perform coding processing in real time, a block size of a PU (evaluation PU (Prediction Unit)) used to evaluate a merge mode is restricted and the number of evaluation target merge candidates is restricted. In the case where the evaluation PU has the block size in which a CU (Cording Unit) is divided, at least one merge candidate common to a merge candidate list of a PU (inclusion PU) having the block size including the evaluation PU and a merge candidate list of each of a plurality of evaluation PUs is selected as the evaluation target merge candidate from the merge candidate lists of the evaluation PUs. In performing cost evaluation processing for the evaluation PU, cost evaluation processing is simultaneously performed on the inclusion PU using a calculated prediction residual.
    Type: Grant
    Filed: March 17, 2015
    Date of Patent: October 18, 2016
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Koji Arimura, Kazuhito Kimura, Hideyuki Ohgose, Hiroshi Arakawa, Kiyofumi Abe, Kazuma Sakakibara
  • Patent number: 9438892
    Abstract: A video display device is provided to achieve local control for a high-quality 3D image while reducing extraneous radiation. A video display device that receives video signals from two video signal lines with an identical frame period and is capable of displaying a stereoscopic image based on left-eye and right-eye images, the video display device including: a liquid crystal drive unit; a liquid crystal panel; an LED backlight that has a plurality of light emission areas; a combination unit that generates a composite video signal by combining the video signals with the identical frame period; a local control unit that detects a video feature quantity such as the intensity value of the composite video signal and determines the light-emission intensity value of the light emission area; and an LED driver.
    Type: Grant
    Filed: April 2, 2013
    Date of Patent: September 6, 2016
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Toshiki Onishi, Kazuhito Kimura