Patents by Inventor Kazuhito Kimura

Kazuhito Kimura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9402072
    Abstract: Local control for high-quality 3D images is achieved while reducing circuit cost and extraneous radiation. A control signal is outputted to an LED backlight 105 having a plurality of light emission areas for emitting light to a liquid crystal panel 103 from the back for the respective light emission areas corresponding to a plurality of display areas included in the liquid crystal panel 103 capable of displaying a three-dimensional image by receiving a left-eye video signal 101b and a right-eye video signal 101a, the control signal controlling the intensity of each of the light emission areas according to the intensity of an image. Light emission intensity is determined based on the left-eye video signal 101b and the parallax information or depth information of the image, and then information on the light emission intensity is outputted to the LED backlight 105.
    Type: Grant
    Filed: March 4, 2013
    Date of Patent: July 26, 2016
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Toshiki Onishi, Kazuhito Kimura
  • Publication number: 20160021374
    Abstract: Provided is an image coding method which obtains a picture, and codes the obtained picture. The image coding method generates a processing block, performs a first intra prediction that selects one intra prediction mode from a first set of candidates based on a component of a first signal contained in the processing block, performs a second intra prediction that selects one intra prediction mode from a second set of candidates based on a component of a second signal contained in the processing block. The first set of candidates includes a plurality of intra prediction modes, and the second set of candidates includes an intra prediction mode, having no dependency between the second intra prediction and the first intra prediction, of the plurality of intra prediction modes. The first intra prediction and the second intra prediction are performed in parallel.
    Type: Application
    Filed: July 15, 2015
    Publication date: January 21, 2016
    Inventors: Yuki MARUYAMA, Kiyofumi ABE, Hideyuki OHGOSE, Koji ARIMURA, Hiroshi ARAKAWA, Kazuma SAKAKIBARA, Kazuhito KIMURA
  • Publication number: 20150271516
    Abstract: In an exemplary embodiment, in order to avoid enlargement of a circuit scale to perform coding processing in real time, a block size of a PU (evaluation PU (Prediction Unit)) used to evaluate a merge mode is restricted and the number of evaluation target merge candidates is restricted. In the case where the evaluation PU has the block size in which a CU (Cording Unit) is divided, at least one merge candidate common to a merge candidate list of a PU (inclusion PU) having the block size including the evaluation PU and a merge candidate list of each of a plurality of evaluation PUs is selected as the evaluation target merge candidate from the merge candidate lists of the evaluation PUs. In performing cost evaluation processing for the evaluation PU, cost evaluation processing is simultaneously performed on the inclusion PU using a calculated prediction residual.
    Type: Application
    Filed: March 17, 2015
    Publication date: September 24, 2015
    Inventors: Koji ARIMURA, Kazuhito KIMURA, Hideyuki OHGOSE, Hiroshi ARAKAWA, Kiyofumi ABE, Kazuma SAKAKIBARA
  • Publication number: 20150271485
    Abstract: An image encoding method includes: selecting, for each processing block, one of intra prediction modes specified by a coding standard, and performing intra prediction according to the intra prediction mode, wherein the intra prediction modes include a lower-left reference mode in which a processing block located at lower left of a current processing block is referred to, the processing blocks include a first processing block and a second processing block located at upper right of the first processing block, the second processing block being equal in size to the first processing block, the coding standard defines that information on the second processing block is written into a bitstream after information on the first processing block, and in the intra prediction, (i) selection of the lower-left reference mode is prohibited and intra prediction is performed on the second processing block, and, (ii) intra prediction is performed on the first processing block.
    Type: Application
    Filed: February 11, 2015
    Publication date: September 24, 2015
    Inventors: Kazuma SAKAKIBARA, Kiyofumi ABE, Naoki YOSHIMATSU, Hideyuki OHGOSE, Koji ARIMURA, Hiroshi ARAKAWA, Kazuhito KIMURA
  • Publication number: 20150256851
    Abstract: A video coding apparatus including a dividing part that outputs the coding target picture divided for each coding unit (basic CU); a prediction processor that generates a prediction image by performing one of intra prediction and inter-screen prediction; a difference calculator that generates a difference image by calculating a difference between the generated prediction image and an image corresponding to the prediction image in the coding target picture; a residual coder that generates a residual coefficient by performing transform processing and quantization processing on the generated difference image; an integration unit that integrates a plurality of basic CUs included in an N×N-pixel region into one new CU, and a code string generator that generates a code string corresponding to the post-integration new CU by performing variable-length coding and arithmetic coding on coding information and the residual coefficient.
    Type: Application
    Filed: March 6, 2015
    Publication date: September 10, 2015
    Inventors: Kiyofumi ABE, Kazuhito KIMURA, Hideyuki OHGOSE, Hiroshi ARAKAWA, Koji ARIMURA, Kazuma SAKAKIBARA
  • Publication number: 20150222906
    Abstract: A video coding apparatus is a video coding apparatus which codes a coding target video based on a coding standard, and includes: a dividing unit which divides an image included in the coding target video into a plurality of control blocks; and a prediction image generating unit which divides each of the control blocks into a plurality of prediction blocks, and generates, for each of the prediction blocks, a prediction image using one of inter prediction and intra prediction, wherein the coding standard allows each of the control blocks to be divided into the prediction blocks such that the prediction blocks have different sizes, and the prediction image generating unit divides each of the control blocks into the prediction blocks such that the prediction blocks all have an identical size, rather than dividing each of the control blocks into the prediction blocks such that the prediction blocks have different sizes.
    Type: Application
    Filed: February 2, 2015
    Publication date: August 6, 2015
    Inventors: Hiroshi ARAKAWA, Kiyofumi ABE, Kazuhito KIMURA, Hideyuki OHGOSE, Koji ARIMURA, Kazuma SAKAKIBARA
  • Publication number: 20150208090
    Abstract: An image encoding apparatus which encodes an input image includes: an intra prediction unit which performs intra prediction on a per-sub-block basis. The intra prediction unit includes: a size determining unit which determines whether the size of a current sub-block is less than or equal to a predetermined size; a candidate determining unit which determines m intra prediction modes (where m is a natural number) as candidate prediction modes when the size of the current sub-block is determined to be less than or equal to the predetermined size, the m intra prediction modes being less than M intra prediction modes predefined independently of the block size (where M is a natural number greater than or equal to 2); and a prediction unit which selects one of the candidate prediction modes and performs intra prediction on the current sub-block using the selected intra prediction mode.
    Type: Application
    Filed: March 30, 2015
    Publication date: July 23, 2015
    Inventors: Kazuma SAKAKIBARA, Kiyofumi ABE, Hideyuki OHGOSE, Koji ARIMURA, Hiroshi ARAKAWA, Kazuhito KIMURA
  • Patent number: 8942547
    Abstract: The recorder apparatus includes the controller that sets conversion mode used when input stream is processed and converted into recording stream to any of two-dimensional mode that converts the input stream into two-dimensional recording stream and three-dimensional mode that converts the input stream into three-dimensional recording stream, the controller that sets one recording mode that can be used when the video signal is converted and processed in the two-dimensional mode and the three-dimensional mode and specifies recording rate, and the signal processor that processes the video signal based on the set conversion mode and the set recording mode to convert the video signal into recording video signal. The controller sets the recording modes such that combination of the recording modes that can be set when the two-dimensional mode is set is different from combination of recording modes that can be set when the three-dimensional mode is set.
    Type: Grant
    Filed: January 2, 2013
    Date of Patent: January 27, 2015
    Assignee: Panasonic Corporation
    Inventors: Yuki Maruyama, Kazuhito Kimura
  • Publication number: 20140098891
    Abstract: A video encoding device, in the case where a video of the progressive format is inputted, processes a frame as a picture, in the case where a video of the interlace format is inputted, processes a field as a picture. A video encoding device generates code string by generating display control information corresponding to a format of the video and describing the display control information in the code string. The display control information includes sequence unit display control information which is commonly used in a display process of all pictures that belong to a sequence to be decoded and picture unit display control information which is individually used in a display process of a picture to be decoded. A second code string generator stores each of the sequence unit display control information and the picture unit display control information in an extended information area generated in units of pictures.
    Type: Application
    Filed: December 13, 2013
    Publication date: April 10, 2014
    Applicant: Panasonic Corporation
    Inventors: Kiyofumi ABE, Kazuhito KIMURA, Hideyuki OHGOSE, Hiroshi ARAKAWA, Koji ARIMURA
  • Publication number: 20140098892
    Abstract: A video decoding device, in the case where a video of the progressive format is inputted, processes a frame as a picture, in the case where a video of the interlace format is inputted, processes a field as a picture. A video decoding device performs display control corresponding to a format of the both video by analyzing display control information in display control information analyzer. The display control information includes sequence unit display control information which is commonly used in a display process of all pictures that belong to a sequence to be decoded and picture unit display control information which is individually used in a display process of a picture to be decoded. A second code string analyzer acquires each of the sequence unit display control information and the picture unit display control information from an extended information area in units of pictures.
    Type: Application
    Filed: December 16, 2013
    Publication date: April 10, 2014
    Applicant: Panasonic Corporation
    Inventors: Kiyofumi ABE, Kazuhito KIMURA, Hideyuki OHGOSE, Hiroshi ARAKAWA, Koji ARIMURA
  • Publication number: 20140010297
    Abstract: A video image encoding device, in a first mode, variable-length-encodes a residual coefficient to generate a coefficient code string, outputs the coefficient code string and the header information in a state in which the header information is associated with the coefficient code string, in a second mode, directly uses a differential image as a coefficient code string without variable-length-encoding the differential image, and outputs the coefficient code string and the header information in a state in which the header information is associated with the coefficient code string.
    Type: Application
    Filed: September 9, 2013
    Publication date: January 9, 2014
    Applicant: Panasonic Corporation
    Inventors: Hideyuki OHGOSE, Kiyofumi ABE, Hiroshi ARAKAWA, Tatsuro JURI, Kazuhito KIMURA
  • Publication number: 20140003515
    Abstract: A video image decoding device receives, as the code string to be decoded, a first code string to be decoded including information based on an encoded residual coefficient and header information or a second code string to be decoded including a residual image obtained in encoding the code string to be decoded and header information. The video image decoding device, when the code string to be decoded that is received by the receiver is the first code string to be decoded, adds the residual decoded image and the predictive image to each other to generate and output a reconstructed image and, when the code string to be decoded received by the receiver is the second code string to be decoded, adds a residual image included in the second code string to be decoded and the predictive image to each other to generate and output a reconstructed image.
    Type: Application
    Filed: September 9, 2013
    Publication date: January 2, 2014
    Applicant: Panasonic Corporation
    Inventors: Hideyuki OHGOSE, Kiyofumi ABE, Hiroshi ARAKAWA, Tatsuro JURI, Kazuhito KIMURA
  • Patent number: 8587372
    Abstract: A multi-input differential amplifying device of the present invention includes: a differential amplifier having an inverting input terminal and a non-inverting input terminal; and an input portion configured to apply a first input voltage to a first input terminal that is one of the inverting input terminal and the non-inverting input terminal and apply a second input voltage to a second input terminal that is the other input terminal, the first input voltage corresponding to first input signals that are a plurality of input signals for the first input terminal, the second input voltage corresponding to a second input signal that is one input signal for the second input terminal. The input portion is configured to correct an offset voltage between the first input voltage and the second input voltage.
    Type: Grant
    Filed: May 31, 2011
    Date of Patent: November 19, 2013
    Assignee: Panasonic Corporation
    Inventors: Kazuhito Kimura, Yasunori Yamamoto
  • Publication number: 20130301723
    Abstract: A video encoding apparatus includes: an obtaining unit which sequentially obtains pictures included in video signals; and an encoding unit which (i) encodes an anchor picture in a first video signal using only an intra prediction, and outputs the anchor picture in an I-picture format, (ii) encodes an anchor picture in a second video signal using only the intra prediction, and outputs the anchor picture in a P-picture format, and (iii) encodes pictures other than the anchor pictures and included in the first and second video signals using the intra prediction or an inter prediction in a temporal direction.
    Type: Application
    Filed: July 18, 2013
    Publication date: November 14, 2013
    Inventors: Kiyofumi ABE, Hideyuki OHGOSE, Hiroshi ARAKAWA, Kazuhito KIMURA
  • Publication number: 20120200668
    Abstract: A video reproducing apparatus includes: a decoding unit configured to decode the coded images for stereoscopic viewing, and output the decoded images for stereoscopic viewing and coding-related information which is used in the coding of the images for stereoscopic viewing and is related to compression distortion which occurs due to the coding; a quality determining unit configured to determine whether the decoded images for stereoscopic viewing should be output as a two-dimensional video or as a three-dimensional video, based on the coding-related information related to the compression distortion; and a screen generating unit configured to output the decoded images for stereoscopic viewing as the two-dimensional video or the three-dimensional video, according to the determination by the quality determining unit.
    Type: Application
    Filed: February 3, 2012
    Publication date: August 9, 2012
    Inventors: Yuki MARUYAMA, Kazuhito Kimura
  • Publication number: 20120015180
    Abstract: A decorative member includes a base material, a metal vapor-deposited film that is provided on the base material; and a light scattering transparent film that is provided on the metal vapor-deposited film, in which two or more types of fillers having light transmissive properties and light scattering properties are dispersed within the light scattering transparent film, and the dispersion amount of the fillers in the light scattering transparent film is 0.2 to 4.0% by mass.
    Type: Application
    Filed: September 28, 2011
    Publication date: January 19, 2012
    Applicant: FUJIKURA LTD.
    Inventors: Akira SANO, Kazuhito KIMURA
  • Publication number: 20120007967
    Abstract: A video system includes a video player for playing data of contents and an eyeglass device used to view a video. The eyeglass device includes an optical filter portion for adjusting a light amount reaching eyes of a viewer, a battery used as a power supply of the eyeglass device, and a first transceiver for transmitting remaining charge information on battery charge remaining in the battery and receiving a synchronization signal for controlling the optical filter portion. The video player includes a second transceiver for receiving the remaining battery charge information and transmitting the synchronization signal, and a controller for calculating a time period represented by operational time information of the eyeglass device based on the remaining battery charge information and causing the second transceiver to transmit the synchronization signal so as to make the optical filter portion less frequently operated.
    Type: Application
    Filed: September 23, 2011
    Publication date: January 12, 2012
    Inventors: Mitsufusa KONDO, Kazuhito Kimura
  • Publication number: 20110291589
    Abstract: A multi-input differential amplifying device of the present invention includes: a differential amplifier having an inverting input terminal and a non-inverting input terminal; and an input portion configured to apply a first input voltage to a first input terminal that is one of the inverting input terminal and the non-inverting input terminal and apply a second input voltage to a second input terminal that is the other input terminal, the first input voltage corresponding to first input signals that are a plurality of input signals for the first input terminal, the second input voltage corresponding to a second input signal that is one input signal for the second input terminal. The input portion is configured to correct an offset voltage between the first input voltage and the second input voltage.
    Type: Application
    Filed: May 31, 2011
    Publication date: December 1, 2011
    Inventors: Kazuhito KIMURA, Yasunori Yamamoto
  • Publication number: 20110273627
    Abstract: To provide a display device capable of reliably displaying emergency signal information without disturbing a viewer. In order to solve the problem, a display device (100) which receives, as at least one of a broadcast signal and communication data, a target signal including a video signal and an additional information signal, and displays the target signal information includes: display units (108, 109); detecting units (111, 113) which detect whether an external display device is connected to the display device (100); and a display control unit (112) which, when the detecting units detect that the external display device is connected to the display device (100), causes the display unit to display the information of a first signal that is at least a part of the target signal, and causes the external display device to display the information of a second signal that is the remaining part of the target signal.
    Type: Application
    Filed: September 16, 2010
    Publication date: November 10, 2011
    Inventors: Atsuhiro Tsuji, Kazuhito Kimura
  • Patent number: 7940031
    Abstract: An output voltage VC obtained by boosting an input voltage VIN by means of a charge pump control circuit 3 of a charge pump 102 is supplied as a power supply voltage to a control circuit 4 of a step-up converter. It is thus possible to eliminate the need for a conventional self-bias method, eliminate switching from startup oscillation to main oscillation of the conventional self-bias method upon startup, and overcome problems caused by the switching of oscillation states, thereby achieving switching power supply circuitry starting in a reliable and stable manner.
    Type: Grant
    Filed: May 5, 2010
    Date of Patent: May 10, 2011
    Assignee: Panasonic Corporation
    Inventors: Kazuhito Kimura, Takuya Ishii