Patents by Inventor Kazuo Hattori

Kazuo Hattori has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190228913
    Abstract: A composite electronic component includes a capacitor and a resistor stacked in a height direction. The capacitor includes a capacitor body, and first and second external electrodes. The resistor includes a base portion, a resistor, first and second upper surface conductors, first and second lower surface conductors, first connecting conductors, and second connecting conductors. An upper surface of the base portion of the resistor faces a lower surface of the capacitor body of the capacitor, and the first upper surface conductor and the first external electrode are electrically connected, and the second upper surface conductor and the second external electrode are electrically connected.
    Type: Application
    Filed: April 2, 2019
    Publication date: July 25, 2019
    Inventors: Kazuo HATTORI, Isamu FUJIMOTO, Shinichiro KUROIWA
  • Publication number: 20190228914
    Abstract: A composite electronic component includes a capacitor and a resistor stacked in a height direction. The capacitor includes a capacitor body, and first and second external electrodes. The resistor includes a base portion, a resistor, first and second upper surface conductors, first and second lower surface conductors, first connecting conductors, and second connecting conductors. An upper surface of the base portion of the resistor faces a lower surface of the capacitor body of the capacitor, and the first upper surface conductor and the first external electrode are electrically connected, and the second upper surface conductor and the second external electrode are electrically connected.
    Type: Application
    Filed: April 2, 2019
    Publication date: July 25, 2019
    Inventors: Kazuo HATTORI, Isamu FUJIMOTO, Shinichiro KUROIWA
  • Patent number: 10356908
    Abstract: An electronic component containing substrate includes a substrate, a first electronic component mounted on a main surface of the substrate, and an embedment layer provided on the main surface of the substrate and embedding the first electronic component. The first electronic component is a multilayer ceramic capacitor including a ceramic multilayer body including a layered portion and a first side portion and a second side portion between which the layered portion lies and having two end surfaces opposed to each other and side surfaces connecting the two end surfaces to each other. The first side portion is located between the layered portion and the main surface of the substrate in a direction of thickness which is a direction perpendicular to the main surface of the substrate. The embedment layer is smaller in elastic modulus than the substrate.
    Type: Grant
    Filed: February 28, 2017
    Date of Patent: July 16, 2019
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Kazuo Hattori, Isamu Fujimoto, Masaru Takahashi, Choichiro Fujii, Hirobumi Adachi
  • Patent number: 10319531
    Abstract: A composite electronic component includes a capacitor device and a resistor device stacked together in a height direction. The capacitor device includes a capacitor body and first and second external electrodes. The resistor device includes a base, a resistive element, first and second upper surface conductors, first and second lower surface conductors, a first connection conductor, and a second connection conductor. The upper surface of the base of the resistor device faces the lower surface of the capacitor body of the capacitor device, the first upper surface conductor is electrically connected to the first external electrode, and the second upper surface conductor is electrically connected to the second external electrode.
    Type: Grant
    Filed: September 7, 2017
    Date of Patent: June 11, 2019
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Kazuo Hattori, Isamu Fujimoto, Shinichiro Kuroiwa
  • Patent number: 10299383
    Abstract: A composite electronic component includes an electronic element and a resistance element in a height direction. The electronic element includes an electronic element body, and a first and second external electrodes separated from each other in a length direction. The resistance element includes a base portion, a resistor disposed on the upper surface of the base portion, a protective film, and first to third upper surface conductors. The first and second upper surface conductors are separated from each other in the length direction, and the resistor and the third upper surface conductor connected thereto are located between the first and the second upper surface conductors.
    Type: Grant
    Filed: July 8, 2016
    Date of Patent: May 21, 2019
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Kazuo Hattori, Isamu Fujimoto, Shinichiro Kuroiwa
  • Publication number: 20190142959
    Abstract: The present invention provides hyaluronic acid derivatives into which a certain cationic group and a certain hydrophobic group are introduced, the hyaluronic acid derivatives including one or more repeating units represented by the formula (Ia) and one or more repeating units represented by the formula (Ib).
    Type: Application
    Filed: May 11, 2017
    Publication date: May 16, 2019
    Inventors: Takashi NAKAI, Teruo NAKAMURA, Sayan CHUANOI, Hideyuki TOGAWA, Tsuyoshi SHIMOBOJI, Kazuo HATTORI, Takashi EMURA
  • Patent number: 10290427
    Abstract: A composite electronic component includes a capacitor and a resistor stacked in a height direction. The capacitor includes a capacitor body, and first and second external electrodes. The resistor includes a base portion, a resistor, first and second upper surface conductors, first and second lower surface conductors, first connecting conductors, and second connecting conductors. An upper surface of the base portion of the resistor faces a lower surface of the capacitor body of the capacitor, and the first upper surface conductor and the first external electrode are electrically connected, and the second upper surface conductor and the second external electrode are electrically connected.
    Type: Grant
    Filed: February 12, 2016
    Date of Patent: May 14, 2019
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Kazuo Hattori, Isamu Fujimoto, Shinichiro Kuroiwa
  • Publication number: 20190051463
    Abstract: A composite electronic component includes an electronic element mounted on a resistance element in a height direction. The electronic element includes an electronic element body, and first and second external electrodes separated from each other in a length direction. The resistance element includes a base portion, a resistor disposed on an upper surface of the base portion, and first and second upper surface conductors on the upper surface of the base portion. The first and second upper surface conductors are separated from each other in the length direction, and the resistor is located between the first and second upper surface conductors. A dimension in the height direction of the resistor is smaller than both a dimension in the height direction of the first external electrode of a portion located on a lower surface of the electronic element body, and a dimension in the height direction of the second external electrode of a portion located on a lower surface of the electronic element body.
    Type: Application
    Filed: October 12, 2018
    Publication date: February 14, 2019
    Inventors: Kazuo HATTORI, Isamu FUJIMOTO, Shinichiro KUROIWA
  • Publication number: 20190035557
    Abstract: A mounting structure includes a circuit board including one principal surface on which a multilayer capacitor is mounted. The circuit board includes a first insulating layer, and a second insulating layer having a Young's modulus smaller than that of the first insulating layer. The second insulating layer is closer to the one principal surface than the first insulating layer. A multilayer capacitor built-in substrate includes a circuit board, a multilayer capacitor on one principal surface of the circuit board, and a resin layer on the one principal surface of the circuit board and embedding the multilayer capacitor. The circuit board includes a first insulating layer, and a second insulating layer having a Young's modulus smaller than that of the first insulating layer. The second insulating layer is closer to the one principal surface than the first insulating layer.
    Type: Application
    Filed: September 18, 2018
    Publication date: January 31, 2019
    Inventors: Tadateru YAMADA, Isamu FUJIMOTO, Kazuo HATTORI, Masaru TAKAHASHI
  • Publication number: 20190037696
    Abstract: A multilayer capacitor built-in substrate includes a circuit board, a multilayer capacitor mounted on one principal surface of the circuit board, a first resin layer provided on the one principal surface of the circuit board, and a second resin layer provided on the first resin layer and embedding the multilayer capacitor. The Young's modulus of the first resin layer is smaller than that of the second resin layer.
    Type: Application
    Filed: September 18, 2018
    Publication date: January 31, 2019
    Inventors: Tadateru YAMADA, Masaru TAKAHASHI, Isamu FUJIMOTO, Kazuo HATTORI
  • Patent number: 10186383
    Abstract: A capacitor that includes a porous metal base material, a dielectric layer formed on the porous metal base material, an upper electrode formed on the dielectric layer, a first terminal electrode electrically connected to the porous metal base material, and a second terminal electrode electrically connected to the upper electrode. The porous metal base material includes a high-porosity part and low-porosity parts, and the low-porosity parts are present at a pair of opposed side surfaces of the porous metal base material.
    Type: Grant
    Filed: July 19, 2016
    Date of Patent: January 22, 2019
    Assignee: MURATA MANUFACTURING CO., LTD
    Inventors: Kazuo Hattori, Noriyuki Inoue, Takeo Arakawa, Hiromasa Saeki
  • Patent number: 10186381
    Abstract: A composite electronic component includes an electronic element and a resistance element in a height direction. The electronic element includes an electronic element body, and first and second external electrodes separated from each other in a length direction. The resistance element includes a base portion, a resistor disposed on an upper surface of the base portion, a protective film and first and second upper surface conductors. The first and second upper surface conductors are separated from each other in the length direction and the resistor is between the first and second upper surface conductors. The protective film covers the resistor. Dimensions in the height direction from the upper surface of the base portion to exposed surfaces of a pair of end portions in the length direction of the protective film are smaller than a dimension in the height direction from the upper surface of the base portion to an exposed surface of the protective film in the center portion.
    Type: Grant
    Filed: July 8, 2016
    Date of Patent: January 22, 2019
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Kazuo Hattori, Isamu Fujimoto, Shinichiro Kuroiwa
  • Patent number: 10141116
    Abstract: A composite electronic component includes a capacitor device and a resistor device disposed on one another in a heightwise direction. The capacitor device includes a capacitor body, a first external electrode, and a second external electrode. The resistor device includes a base portion, a resistor body, a first upper surface conductor, a second upper surface conductor, a first lower surface conductor, a second lower surface conductor, a first end surface connection conductor, and a second end surface connection conductor. An upper surface of the base portion of the resistor device faces a lower surface of the capacitor body of the capacitor device, the first upper surface conductor and the first external electrode are electrically connected, and the second upper surface conductor and the second external electrode are electrically connected.
    Type: Grant
    Filed: March 16, 2017
    Date of Patent: November 27, 2018
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Kazuo Hattori, Isamu Fujimoto, Shinichiro Kuroiwa
  • Patent number: 10143087
    Abstract: A circuit module includes a first and second monolithic ceramic capacitors encapsulated by a mold resin layer on a wiring board. The first and second monolithic ceramic capacitors are lined up along a direction parallel or substantially parallel to the main surface of the wiring board and are electrically connected in series or in parallel through a conductive pattern provided on the wiring board. One of a pair of end surfaces of the first monolithic ceramic capacitor is opposed to one of the width-direction side surfaces as a pair of side surfaces of the second monolithic ceramic capacitor with the mold resin layer interposed.
    Type: Grant
    Filed: May 4, 2017
    Date of Patent: November 27, 2018
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Kazuo Hattori, Isamu Fujimoto
  • Patent number: 10134529
    Abstract: A composite electronic component includes an electronic element mounted on a resistance element in a height direction. The electronic element includes an electronic element body, and first and second external electrodes separated from each other in a length direction. The resistance element includes a base portion, a resistor disposed on an upper surface of the base portion, and first and second upper surface conductors on the upper surface of the base portion. The first and second upper surface conductors are separated from each other in the length direction, and the resistor is located between the first and second upper surface conductors. A dimension in the height direction of the resistor is smaller than both a dimension in the height direction of the first external electrode of a portion located on a lower surface of the electronic element body, and a dimension in the height direction of the second external electrode of a portion located on a lower surface of the electronic element body.
    Type: Grant
    Filed: July 8, 2016
    Date of Patent: November 20, 2018
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Kazuo Hattori, Isamu Fujimoto, Shinichiro Kuroiwa
  • Patent number: 10121593
    Abstract: A composite electronic component includes a first and second electronic elements, and a joint material. The first electronic element includes a base member, and an upper surface conductor on an upper surface of the base member. The second electronic element includes an element body with a lower surface facing the upper surface of the base member, and a terminal conductor disposed on the lower surface of the element body. The joint material joins the upper surface conductor and the terminal conductor. The upper surface conductor includes a conductive layer in which a metal that is maximum in weight ratio is Ag. The lateral surface of the conductive layer is covered with conductive layers defining a protective metal film, and the metal that is maximum in weight ratio contained in the conductive layers defining a protective metal film is a metal other than Ag and Cu.
    Type: Grant
    Filed: June 8, 2016
    Date of Patent: November 6, 2018
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Kazuo Hattori, Isamu Fujimoto, Shinichiro Kuroiwa
  • Publication number: 20180197682
    Abstract: A multilayer ceramic capacitor includes a stacked body and first and second external electrodes. When a dimension of the stacked body in a length direction is L0, a dimension of the stacked body in a width direction is W0, a dimension of the stacked body in a stacking direction is T0, a dimension of the first outer layer portion in the stacking direction is T1, a dimension of the second outer layer portion in the stacking direction is T2, a dimension of the first side margin in the width direction is W1, a dimension of the second side margin in the width direction is W2, a dimension of the first end margin in the length direction is L1, and a dimension of the second end margin in the length direction is L2, conditions of (L1+L2)/L0>(W1+W2)/W0 and (L1+L2)/L0>(T1+T2)/T0 are satisfied, and a condition of 0.244?(L1+L2)/L0?0.348 is satisfied.
    Type: Application
    Filed: December 6, 2017
    Publication date: July 12, 2018
    Inventors: Tadateru YAMADA, Kazuo HATTORI, Isamu FUJIMOTO
  • Patent number: 10014111
    Abstract: An electronic component includes an electronic element including external electrodes on a surface and a substrate terminal on which the electronic element is mounted. The substrate terminal includes a first main surface, a second main surface opposite the first main surface, and a peripheral surface joining the first main surface and the second main surface. The substrate terminal includes mounting electrodes provided on the second main surface and electrically connected to the external electrodes of the electronic element, and connection electrodes provided on the first main surface and electrically connected to lands of a circuit substrate. A maximum width of the connection electrodes is greater than a maximum width of the mounting electrodes.
    Type: Grant
    Filed: March 18, 2015
    Date of Patent: July 3, 2018
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Kazuo Hattori, Isamu Fujimoto
  • Publication number: 20180174760
    Abstract: A capacitor includes a first electrode formed from a conductive porous base material, a dielectric layer located on the first electrode and a second electrode located on the dielectric layer. The first electrode is electrically connected to first and second terminal electrodes located on respective opposite ends of the first electrode. The second electrode is located between the first and second terminal electrodes and is electrically connected to a third terminal electrode located on the second electrode.
    Type: Application
    Filed: December 19, 2017
    Publication date: June 21, 2018
    Inventors: KAZUO HATTORI, Noriyuki Inoue
  • Publication number: 20180151297
    Abstract: A capacitor having a conductive porous substrate with at least two electrostatic capacitance forming sections, each of the at least two electrostatic capacitance forming sections including a porous portion of the conductive porous substrate, a dielectric layer on the porous portion, and an upper electrode on the dielectric layer. The at least two electrostatic capacitance forming sections are electrically connected in series by the conductive porous substrate.
    Type: Application
    Filed: January 8, 2018
    Publication date: May 31, 2018
    Inventors: KAZUO HATTORI, Noriyuki Inoue, Hiromasa Saeki, Kensuke Aoki, Ken Ito