Patents by Inventor Kazushige Takechi
Kazushige Takechi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9401382Abstract: Provided are an image sensor and a method of manufacturing method of manufacturing the image sensor. The image sensor includes a substrate, photoelectric transducers and switching elements formed in layers on the substrate in this order. Each of the photoelectric transducers includes a hydrogenated amorphous silicon layer. Each of the switching elements includes an amorphous oxide semiconductor layer. The image sensor further includes a blocking layer arranged between the hydrogenated amorphous silicon layers of the photoelectric transducers and the amorphous oxide semiconductor layers of the switching elements, where the blocking layer suppresses penetration of hydrogen separated from the hydrogenated amorphous silicon layers.Type: GrantFiled: October 31, 2014Date of Patent: July 26, 2016Assignee: NLT TECHNOLOGIES, LTD.Inventors: Hiroyuki Sekine, Takayuki Ishino, Toru Ukita, Fuminori Tamura, Kazushige Takechi
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Patent number: 9378981Abstract: With a TFT using an oxide semiconductor film, there is such an issue that oxygen deficit is generated in a surface region of the oxide semiconductor film after performing plasma etching of a source/drain electrode, thereby increasing the off-current. Provided is a TFT which includes: a gate electrode on an insulating substrate; a gate insulating film on the gate electrode; an oxide semiconductor film containing indium on the gate insulating film; and a source/drain electrode on the oxide semiconductor film. Further, the peak position derived from an indium 3d orbital in the XPS spectrum of a surface layer in a part of the oxide semiconductor film where the source/drain electrode is not superimposed is shifted towards a high energy side than the peak position derived from the indium 3d orbital in the XPS spectrum of an oxide semiconductor region existing in a lower part of the surface layer.Type: GrantFiled: April 15, 2015Date of Patent: June 28, 2016Assignee: NLT TECHNOLOGIES, LTD.Inventors: Kazushige Takechi, Shinnosuke Iwamatsu, Seiya Kobayashi, Yoshiyuki Watanabe, Toru Yahagi
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Patent number: 9209026Abstract: A method of forming a thin-film device includes forming an oxide-semiconductor film formed on the first electrical insulator, and forming a second electrical insulator formed on the oxide-semiconductor film, the oxide-semiconductor film defining an active layer. The oxide-semiconductor film is comprised of a first interface layer located at an interface with the first electrical insulator, a second interface layer located at an interface with the second electrical insulator, and a bulk layer other than the first and second interface layers. The method further includes oxidizing the oxide-semiconductor film to render a density of oxygen holes in at least one of the first and second interlayer layers is smaller than a density of oxygen holes in the bulk layer.Type: GrantFiled: September 30, 2014Date of Patent: December 8, 2015Assignee: NLT TECHNOLOGIES, LTD.Inventors: Kazushige Takechi, Mitsuru Nakata
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Publication number: 20150279698Abstract: With a TFT using an oxide semiconductor film, there is such an issue that oxygen deficit is generated in a surface region of the oxide semiconductor film after performing plasma etching of a source/drain electrode, thereby increasing the off-current. Provided is a TFT which includes: a gate electrode on an insulating substrate; a gate insulating film on the gate electrode; an oxide semiconductor film containing indium on the gate insulating film; and a source/drain electrode on the oxide semiconductor film. Further, the peak position derived from an indium 3d orbital in the XPS spectrum of a surface layer in a part of the oxide semiconductor film where the source/drain electrode is not superimposed is shifted towards a high energy side than the peak position derived from the indium 3d orbital in the XPS spectrum of an oxide semiconductor region existing in a lower part of the surface layer.Type: ApplicationFiled: April 15, 2015Publication date: October 1, 2015Applicant: NLT TECHNOLOGIES, LTD.Inventors: Kazushige TAKECHI, Shinnosuke IWAMATSU, Seiya KOBAYASHI, Yoshiyuki WATANABE, Toru YAHAGI
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Publication number: 20150276663Abstract: The ion sensors using TFT or MOSFET are low in the measurement sensitivity so that it is difficult to detect an extremely small amount of sensing-target substance. A TFT ion sensor includes both a gate electrode (a silicon substrate) and a reference electrode, in which the electrostatic capacitance of a gate insulating film (a thermal oxide film) is set to be larger than the electrostatic capacitance of an ion sensitive insulating film. Therefore, it is possible to detect the concentration of ions, hormones, and the like in a sensing-target substance from the shift in the threshold voltage of the gate-source voltage to source-drain current property.Type: ApplicationFiled: March 27, 2015Publication date: October 1, 2015Inventors: Kazushige TAKECHI, Hiroshi HAGA, Shinnosuke IWAMATSU, Seiya KOBAYASHI, Yutaka ABE, Toru YAHAGI
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Patent number: 9048319Abstract: With a TFT using an oxide semiconductor film, there is such an issue that oxygen deficit is generated in a surface region of the oxide semiconductor film after performing plasma etching of a source/drain electrode, thereby increasing the off-current. Provided is a TFT which includes: a gate electrode on an insulating substrate; a gate insulating film on the gate electrode; an oxide semiconductor film containing indium on the gate insulating film; and a source/drain electrode on the oxide semiconductor film. Further, the peak position derived from an indium 3d orbital in the XPS spectrum of a surface layer in a part of the oxide semiconductor film where the source/drain electrode is not superimposed is shifted towards a high energy side than the peak position derived from the indium 3d orbital in the XPS spectrum of an oxide semiconductor region existing in a lower part of the surface layer.Type: GrantFiled: August 14, 2012Date of Patent: June 2, 2015Assignee: NLT Technologies, Ltd.Inventors: Kazushige Takechi, Shinnosuke Iwamatsu, Seiya Kobayashi, Yoshiyuki Watanabe, Toru Yahagi
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Publication number: 20150123119Abstract: Provided are an image sensor and a method of manufacturing method of manufacturing the image sensor. The image sensor includes a substrate, photoelectric transducers and switching elements formed in layers on the substrate in this order. Each of the photoelectric transducers includes a hydrogenated amorphous silicon layer. Each of the switching elements includes an amorphous oxide semiconductor layer. The image sensor further includes a blocking layer arranged between the hydrogenated amorphous silicon layers of the photoelectric transducers and the amorphous oxide semiconductor layers of the switching elements, where the blocking layer suppresses penetration of hydrogen separated from the hydrogenated amorphous silicon layers.Type: ApplicationFiled: October 31, 2014Publication date: May 7, 2015Applicant: NLT TECHNOLOGIES, LTD.Inventors: Hiroyuki SEKINE, Takayuki ISHINO, Toru UKITA, Fuminori TAMURA, Kazushige TAKECHI
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Publication number: 20150056747Abstract: A method of forming a thin-film device includes forming an oxide-semiconductor film formed on the first electrical insulator, and forming a second electrical insulator formed on the oxide-semiconductor film, the oxide-semiconductor film defining an active layer. The oxide-semiconductor film is comprised of a first interface layer located at an interface with the first electrical insulator, a second interface layer located at an interface with the second electrical insulator, and a bulk layer other than the first and second interface layers. The method further includes oxidizing the oxide-semiconductor film to render a density of oxygen holes in at least one of the first and second interlayer layers is smaller than a density of oxygen holes in the bulk layer.Type: ApplicationFiled: September 30, 2014Publication date: February 26, 2015Applicant: NLT TECHNOLOGIES LTDInventors: Kazushige TAKECHI, Mitsuru NAKATA
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Patent number: 8889480Abstract: A method of forming a thin-film device includes forming an oxide-semiconductor film formed on the first electrical insulator, and forming a second electrical insulator formed on the oxide-semiconductor film, the oxide-semiconductor film defining an active layer. The oxide-semiconductor film is comprised of a first interface layer located at an interface with the first electrical insulating insulator, a second interface layer located at an interface with the second electrical insulator, and a bulk layer other than the first and second interface layers. The method further includes oxidizing the oxide-semiconductor film to render a density of oxygen holes in at least one of the first and second interlayer layers is smaller than a density of oxygen holes in the bulk layer.Type: GrantFiled: March 15, 2013Date of Patent: November 18, 2014Assignee: NLT Technologies, Ltd.Inventors: Kazushige Takechi, Mitsuru Nakata
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Patent number: 8785925Abstract: There is such an issue with a TFT using an oxide semiconductor film that oxygen deficit is generated in a surface region of the oxide semiconductor film after performing plasma etching of a source-drain electrode, and the off-current becomes increased. Disclosed is the TFT which includes: a gate electrode on an insulating substrate as a substrate; a gate insulating film on the gate electrode; an oxide semiconductor film on the gate insulating film; and a source/drain electrode on the oxide semiconductor film. It is the characteristic of the TFT that a surface layer containing at least either fluorine or chlorine exists in a part of the oxide semiconductor film where the source/drain electrode is not superimposed.Type: GrantFiled: August 10, 2012Date of Patent: July 22, 2014Assignee: NLT Technologies, Ltd.Inventor: Kazushige Takechi
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Publication number: 20130237012Abstract: A method of forming a thin-film device includes forming an oxide-semiconductor film formed on the first electrical insulator, and forming a second electrical insulator formed on the oxide-semiconductor film, the oxide-semiconductor film defining an active layer. The oxide-semiconductor film is comprised of a first interface layer located at an interface with the first electrical insulating insulator, a second interface layer located at an interface with the second electrical insulator, and a bulk layer other than the first and second interface layers. The method further includes oxidizing the oxide-semiconductor film to render a density of oxygen holes in at least one of the first and second interlayer layers is smaller than a density of oxygen holes in the bulk layer.Type: ApplicationFiled: March 15, 2013Publication date: September 12, 2013Applicant: NLT Technologies LTDInventors: Kazushige TAKECHI, Mitsuru NAKATA
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Publication number: 20130175239Abstract: Methods of fabricating devices including a TFT array substrate are provided. For example, a method of fabricating a TFT array substrate may comprise adhering a protection film onto an upper surface of a glass substrate containing silicon dioxide as a principal constituent on which a thin film transistor (TFT) array has been fabricated; and etching the glass substrate through a lower surface thereof such that the glass substrate has a thickness greater than 0 micrometer, but equal to or smaller than 200 micrometers. The etching may comprise preparing an apparatus for etching a substrate; and etching said glass substrate at an etching rate equal to or higher than 2 micrometers per a minute by means of the apparatus.Type: ApplicationFiled: March 1, 2013Publication date: July 11, 2013Applicant: NEC CorporationInventor: Kazushige TAKECHI
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Patent number: 8477267Abstract: A conventional liquid crystal display comprises a number of components, so that a manufacturing cost cannot be reduced. Furthermore, a large-area substrate has problems in shipping. According to this invention, a liquid-crystal panel is prepared by forming individual optically functional films, a TFT device and a light-emitting device on a long thin film and then laminating the film by a transfer process. A base film to be a substrate in a liquid-crystal panel preferably has a thickness of 10 ?m to 200 ?m, a curvature radius of 40 mm or less as a measure of flexibility and a coefficient of thermal expansion of 50 ppm/° C. or less. Furthermore, it more preferably gives a variation of ±5% or less in mechanical and optical properties to a thermal history at 200° C.Type: GrantFiled: November 4, 2010Date of Patent: July 2, 2013Assignees: Kuraray Co., Ltd., Konica Minolta Holdings, Inc., JSR Corporation, Sumitomo Chemical Company Limited, Sumitomo Bakelite Co., Ltd., Dainippon Ink and Chemicals, Inc., Dai Nippon Printing Co., Ltd., Toppan Printing Co., Ltd.Inventors: Katsuya Fujisawa, Tokuo Ikari, Kazuo Genda, Atsushi Kumano, Noboru Oshima, Yoshiki Matsuoka, Toshimasa Eguchi, Shigenori Yamaoka, Yoshiyuki Ono, Hisatomo Yonehara, Tatsumi Takahashi, Motoyuki Suzuki, Akimitsu Tsukuda, Norimasa Sekine, Kazushige Takechi, Ken Sumiyoshi, Ichiro Fujieda, Yasuo Tsuruoka
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Patent number: 8420442Abstract: A method of forming a thin-film device includes forming an oxide-semiconductor film formed on the first electrical insulator, and forming a second electrical insulator formed on the oxide-semiconductor film, the oxide-semiconductor film defining an active layer. The oxide-semiconductor film is comprised of a first interface layer located at an interface with the first electrical insulating insulator, a second interface layer located at an interface with the second electrical insulator, and a bulk layer other than the first and second interface layers. The method further includes oxidizing the oxide-semiconductor film to render a density of oxygen holes in at least one of the first and second interlayer layers is smaller than a density of oxygen holes in the bulk layer.Type: GrantFiled: January 3, 2011Date of Patent: April 16, 2013Assignee: NLT Technologies, Ltd.Inventors: Kazushige Takechi, Mitsuru Nakata
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Publication number: 20130043467Abstract: With a TFT using an oxide semiconductor film, there is such an issue that oxygen deficit is generated in a surface region of the oxide semiconductor film after performing plasma etching of a source/drain electrode, thereby increasing the off-current. Provided is a TFT which includes: a gate electrode on an insulating substrate; a gate insulating film on the gate electrode; an oxide semiconductor film containing indium on the gate insulating film; and a source/drain electrode on the oxide semiconductor film. Further, the peak position derived from an indium 3d orbital in the XPS spectrum of a surface layer in a part of the oxide semiconductor film where the source/drain electrode is not superimposed is shifted towards a high energy side than the peak position derived from the indium 3d orbital in the XPS spectrum of an oxide semiconductor region existing in a lower part of the surface layer.Type: ApplicationFiled: August 14, 2012Publication date: February 21, 2013Applicant: NLT TECHNOLOGIES, LTD.Inventors: Kazushige TAKECHI, Shinnosuke IWAMATSU, Seiya KOBAYASHI, Yoshiyuki WATANABE, Toru YAHAGI
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Publication number: 20130037797Abstract: There is such an issue with a TFT using an oxide semiconductor film that oxygen deficit is generated in a surface region of the oxide semiconductor film after performing plasma etching of a source-drain electrode, and the off-current becomes increased. Disclosed is the TFT which includes: a gate electrode on an insulating substrate as a substrate; a gate insulating film on the gate electrode; an oxide semiconductor film on the gate insulating film; and a source/drain electrode on the oxide semiconductor film. It is the characteristic of the TFT that a surface layer containing at least either fluorine or chlorine exists in a part of the oxide semiconductor film where the source/drain electrode is not superimposed.Type: ApplicationFiled: August 10, 2012Publication date: February 14, 2013Applicant: NLT TECHNOLOGIES, LTD.Inventor: Kazushige TAKECHI
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Publication number: 20120286265Abstract: A thin film transistor using an amorphous oxide thin film for an active layer, wherein: the amorphous oxide thin film includes, as main components, indium (In), oxygen (O), and a metal element (M) selected from the group consisting of silicon (Si), aluminum (Al), germanium (Ge), tantalum (Ta), magnesium (Mg) and titanium (Ti); an atomic ratio of M to In in this amorphous oxide thin film is 0.1 or more and 0.4 or less; and carrier density in the amorphous oxide thin film is 1×1015 cm?3 or more and 1×1019 cm?1 or less.Type: ApplicationFiled: February 1, 2011Publication date: November 15, 2012Inventors: Kazushige Takechi, Mitsuru Nakata
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Patent number: 8232124Abstract: A thin-film transistor array includes an electrically insulating substrate, a plurality of thin-film transistors arranged in a matrix on the substrate, and each including a channel, a source, and a drain each comprised of an oxide-semiconductor film, a pixel electrode integrally formed with the drain, a source signal line through which a source signal is transmitted to a group of thin-film transistors, a gate signal line through which a gate signal is transmitted to a group of thin-film transistors, a source terminal formed at an end of the source signal line, and a gate terminal formed at an end of the gate signal line. The source terminal and the gate terminal are formed in the same layer as a layer in which the channel is formed. The source terminal and the gate terminal have the same electric conductivity as that of the pixel electrode.Type: GrantFiled: August 25, 2010Date of Patent: July 31, 2012Assignees: NEC Corporation, NLT Technologies, Ltd.Inventors: Kazushige Takechi, Mitsuru Nakata
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Publication number: 20120025213Abstract: A flat panel display is manufactured by mass production and easily stored and transported at low cost. Provided is a thin film semiconductor substrate which faces a plastic substrate 7 and is combined with the plastic substrate 7 so as to be a flat panel display. Single-board-like insulating substrates 4 each of which has a thin film semiconductor array 3 are continuously bonded onto a lengthy plastic film 2. An apparatus is also provided for manufacturing the thin film semiconductor substrate which faces the plastic substrate 7 and is combined with the plastic substrate 7 so as to be the flat panel display.Type: ApplicationFiled: March 27, 2009Publication date: February 2, 2012Inventors: Shigeyoshi Otsuki, Toshimasa Eguchi, Masatoshi Naka, Kazushige Takechi, Kiyoshi Ouchi
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Patent number: 7989805Abstract: An electronic device of the present invention includes a first substrate provided with a thin film active element, having a thickness of 200 ?m or lower, and a second substrate formed with a high thermal conductivity portion. The second substrate is applied to one surface of the two surfaces of the first substrate, i.e., the surface being the side other than the side that formed with the thin film active element. The thin film active element has a maximum power consumption of 0.01 to 1 mW. The high thermal conductivity portion is a region that corresponds to the position of the thin film active element and whose thermal conductivity falls within the range from 0.1 to 4 W/cm·deg.Type: GrantFiled: March 29, 2010Date of Patent: August 2, 2011Assignee: NEC CorporationInventors: Kazushige Takechi, Hiroshi Kanou, Mitsuru Nakata