Patents by Inventor Kazuyoshi Muraoka

Kazuyoshi Muraoka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5768204
    Abstract: Memory cells and a sense amplifier are connected to a pair of bit lines. Two dummy word lines are capacitively coupled with the pair of bit lines. One of the dummy word lines is driven to a high level before the sense amplifier starts the sense operation, and the other dummy word line is driven to a high level after the sense amplifier has started the sense operation. When the sense amplifier has terminated the sense operation, the two dummy word lines are driven to a low level.
    Type: Grant
    Filed: June 11, 1996
    Date of Patent: June 16, 1998
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Kazuyoshi Muraoka
  • Patent number: 5752295
    Abstract: In the blending and spinning processes, 1/f fluctuation signals are imparted to the feed slivers or rovings, wherein the blending ratio of the blended slivers, blended rovings, or blended yarn varies with a correlation, specifically a correlation with a 1/f fluctuation.
    Type: Grant
    Filed: July 2, 1996
    Date of Patent: May 19, 1998
    Assignees: Nisshinbo Industries Inc., Toshimitsu Musha
    Inventors: Toshimitsu Musha, Yuichi Yanai, Kazuyoshi Muraoka, Yuki Niwa
  • Patent number: 5680684
    Abstract: A method for intermingling yarn, and an air intermingling machine 1 used therein, is provided that yields yarn with the comfortable feel of hand-spun yarn, on an industrial scale. In the air intermingling machine 1, intermingling is imparted to the yarn by signals having a 1/f fluctuation, wherein the degree of intermingling of the yarn vanes with a 1/f fluctuation provides a natural, comfortable feel.
    Type: Grant
    Filed: May 22, 1995
    Date of Patent: October 28, 1997
    Assignees: Toshimitsu Musha, Nisshinbo Industries Inc.
    Inventors: Toshimitsu Musha, Yuichi Yanai, Kazuyoshi Muraoka, Yuki Niwa
  • Patent number: 5660035
    Abstract: A spinning method and a spinning frame are provided that yields spun yarn, with the comfortable feel of a hand-spun yarn, on an industrial scale. In spinning frame 1, rovings 11 are drafted with signals derived from a numerical sequence of having a 1/f fluctuation or signals derived from a melody or other sound having a 1/f fluctuation to yield a spun yarn 13 in which the diameter varies with said 1/f fluctuation, thus providing a natural, comfortable feel.
    Type: Grant
    Filed: February 8, 1995
    Date of Patent: August 26, 1997
    Assignees: Toshimitsu Musha, Nisshinbo Industries Inc.
    Inventors: Toshimitsu Musha, Yuichi Yanai, Kazuyoshi Muraoka, Yuki Niwa, Yasuo Nakano
  • Patent number: 5640355
    Abstract: A semiconductor memory device including a memory cell array, bit lines, and sense amplifier groups. The memory cell array is composed of a plurality of memory cells arranged roughly in a matrix pattern. A plurality of the memory cells arranged in a row are activated in response to a row address decode signal. A pair of the bit lines are provided for each column. The data of the corresponding activated memory cells are transmitted to the bit line pair. Each of the sense amplifier groups has n-units of sense amplifiers each connected to the bit line pair, to sense and amplify data read to the bit line pair connected thereto. The respective reference potential terminals of the sense amplifiers of each of the sense amplifier groups are connected to a single common node which can be connected to a reference potential via a sense amplifier activating transistor turned on in response to a row address signal.
    Type: Grant
    Filed: June 6, 1995
    Date of Patent: June 17, 1997
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kazuyoshi Muraoka, Masaru Koyanagi, Yoshiaki Takeuchi
  • Patent number: 5570047
    Abstract: A semiconductor integrated circuit includes memory cell blocks having memory cells arranged in matrix, sense amplifiers, each located adjacent to the memory cells, and sense amplifier control circuits, each of the sense amplifier control circuit being located on outside of the memory cell block. The sense amplifier control circuit has a standard voltage generating circuit and a control circuit for receiving the standard voltage and for transferring a driver signal to the sense amplifier to control the charging ability of the sense amplifier. The source voltage has three voltage regions, first, intermediate, and second regions. In the first voltage region, the potential of the driver signal increases with the increase of the source voltage. In the intermediate voltage region (2.7 to 3 Volt), the potential of the driver signal is changed oppose to the change of the source voltage, and in the second voltage region, the potential of the driver signal decreases with the increase of the source voltage.
    Type: Grant
    Filed: August 31, 1994
    Date of Patent: October 29, 1996
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Eiichi Makino, Masaru Koyanagi, Kazuyoshi Muraoka
  • Patent number: 5547822
    Abstract: Disclosed is a process for producing a titanium dioxide pigment used for a resin-coated paper type photographic support, comprising the following steps:(a) a step of adding at least one alkaline earth metal compound in an amount of 0.01-2.0% by weight in terms of a metal oxide based on the titanium dioxide before calcination step and(b) an acid-washing step of washing the titanium dioxide at acidic state after the calcination step and before a step of surface treatment with a hydrated metal oxide,and wherein particle size of the titanium dioxide pigment is 0.110-0.150 .mu.m shown by number-average diameter obtained by measuring the diameter in a certain direction using an electron microscope. A photographic support which comprises the above titanium dioxide pigment is also disclosed. Occurrence of die lip stain and microgrit are substantially reduced in the photographic support and a photographic material made thereof exhibits improved image sharpness.
    Type: Grant
    Filed: August 4, 1994
    Date of Patent: August 20, 1996
    Assignees: Mitsubishi Paper Mills, Tohkam Products
    Inventors: Touru Noda, Akira Uno, Kazuyoshi Muraoka
  • Patent number: 5402010
    Abstract: A semiconductor device has a plurality of internal circuits capable of having two conditions of an active state and a precharge state in the internal circuits. The device comprises signal generation element for generating a first signal which causes said internal circuits to be initialized until satisfying a predetermined condition from a time when the power is supplied; and state set element which is connected to an external apparatus through an interface which is supplied an external state signal, and for setting a precharge state of the internal circuits by outputting an internal state signal corresponding to the external state signal in response to a supply of the first signal from the signal generation element.
    Type: Grant
    Filed: May 4, 1993
    Date of Patent: March 28, 1995
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Kazuyoshi Muraoka
  • Patent number: 5392240
    Abstract: A semiconductor memory device comprises: a first bit line connected to a memory cell via a first switching element; a second bit line connected to a reference cell via a second switching element; a reference potential writing circuit for writing a reference potential in the reference cell; an equalizing circuit for equalizing the first and second bit lines in potential; a sense amplifier for detecting data in the memory cell on the basis of a difference in potential between the first and second bit lines; and a control section for reading data in the memory cell and data in the reference cell to the first bit line and the second bit line, respectively, and thereafter for activating the sense amplifier and roughly simultaneously turning off the second switching element.
    Type: Grant
    Filed: June 29, 1993
    Date of Patent: February 21, 1995
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Kazuyoshi Muraoka
  • Patent number: 5391918
    Abstract: In the semiconductor device according to the present invention, bonding pads are arranged on the periphery of the semiconductor chip and power supply inner leads are disposed inwardly of signal inner leads. Since bonding wires for connecting the signal lead to signal pads corresponding thereto do not extend astride of the power supply inner lead, a package of a semiconductor device can be thereby thinned as much as possible.
    Type: Grant
    Filed: June 24, 1993
    Date of Patent: February 21, 1995
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Masaru Koyanagi, Kazuyoshi Muraoka, Minoru Yamada
  • Patent number: 5270971
    Abstract: An improved semiconductor memory having a plurality of sense amplifier circuits corresponding to each bit line of a plurality of columns. A first common line is connected in common to the sense amplifier circuits, and a second common line is connected to the first common line. A first switching element is connected between the second common line and a reference voltage potential terminal, and a second switching element is connected to the first common line and the reference voltage potential. The second switching element corresponding to the first common line connected to one of the sense amplifier circuits is made conductive in response to a selection of the sense amplifier is disclosed.
    Type: Grant
    Filed: March 29, 1991
    Date of Patent: December 14, 1993
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kazuyoshi Muraoka, Masaru Koyanagi, Minoru Yamada
  • Patent number: 5264033
    Abstract: Disclosed is a process for producing a titanium dioxide pigment used for a resin-coated paper type photographic support, comprising the following steps:(a) a step of adding at least one alkaline earth metal compound in an amount of 0.01-2.0% by weight in terms of a metal oxide based on the titanium dioxide before calcination step and(b) an acid-washing step of washing the titanium dioxide at acidic state after the calcination step and before a step of surface treatment with a hydrated metal oxide,and wherein particle size of the titanium dioxide pigment is 0.110-0.150 .mu.m shown by number-average diameter obtained by measuring the diameter in a certain direction using an electron microscope.A photographic support which comprises the above titanium dioxide pigment is also disclosed.Occurrence of die lip stain and microgrit are substantially restrained in this photographic support and a photographic material made of it shows improved image sharpness.
    Type: Grant
    Filed: June 13, 1991
    Date of Patent: November 23, 1993
    Assignees: Mitsubishi Paper Mills Ltd, Tohkem Products Corp.
    Inventors: Touru Noda, Akira Uno, Kazuyoshi Muraoka