Abstract: A method of generating an IC layout diagram includes receiving a first gate resistance value of a gate region in an IC layout diagram, the first gate resistance value corresponding to a location of a gate via positioned within an active region and along a width of the gate region extending across the active region, determining a second gate resistance value based on the location and the width, using the first and second resistance values to determine that the IC layout diagram does not comply with a design specification, and based on the non-compliance with the design specification, modifying the IC layout diagram.

Abstract: A substrate has a first side and a second side opposite the first side. A first transistor has a first gate, a second transistor has a second gate, and a third transistor has a third gate. The first gate, the second gate, and the third gate are each disposed over the first side of the substrate. The second gate is disposed between the first gate and the third gate. The first gate and the third gate have different material compositions. A structure is disposed over the second side of the substrate. The structure includes a first opening aligned with the first transistor, a second opening aligned with the second transistor, and a third opening aligned with the third transistor. A sensing film is disposed over the second side of the substrate. The sensing film is configured to attach to one or more predefined miniature targets.

Abstract: A substrate has a first side and a second side vertically opposite to the first side. A sensing transistor is disposed at least in part over the first side of the substrate. A plurality of voltage reference transistors is disposed at least in part over the first side of the substrate. The voltage reference transistors are disposed on different lateral sides of the sensing transistor. A structure is disposed over the second side of the substrate. The structure defines one or more openings configured to collect a fluid. A sensing film is disposed over the second side of the substrate, wherein the sensing transistor is configured to detect, at least in part through capacitive coupling, a presence of one or more predefined miniature targets in the fluid that attach to the sensing film in the opening that is vertically aligned with the sensing transistor.

Abstract: An interconnect structure is disposed over a semiconductor substrate. The interconnect structure includes a plurality of interconnect layers. A first thin-film transistor (TFT) and a second TFT disposed over the semiconductor substrate. The first TFT and the second TFT each vertically extend through at least a subset of the interconnect layers. An opening is formed in the interconnect structure. The opening is disposed between the first TFT and the second TFT. A sensing film is disposed over a bottom surface and side surfaces of the opening.

Abstract: The invention discloses a polybutylene terephthalate composition comprising as component (A) polybutylene terephthalate resin in an amount of from 40 wt % to 90 wt %, as component (B) glass fiber having low dielectric constant and dissipation factor measured according to GB 9534-88 in an amount of 10 wt % to 60 wt %. The invention also disclosed a radar device component containing the polybutylene terephthalate composition.

Abstract: A semiconductor structure includes a sensor, a patterned dielectric layer, and a cover disposed on the patterned dielectric layer. The sensor includes a bio-sensing device and at least one voltage-reference device disposed in proximity to the bio-sensing device. The bio-sensing device includes a first field effect transistor (FET) and a first sensing portion of a sensing film capacitively coupled to the first FET, and the first sensing portion is concave toward the first FET. The at least one voltage-reference device includes a second FET and a second sensing portion of the sensing film capacitively coupled to the second FET. The patterned dielectric layer is disposed on the sensing film and includes at least one sensing well located above the at least one voltage-reference device and the bio-sensing device. The cover includes fluid channels communicating with the at least one sensing wells.

Abstract: A semiconductor structure includes an isolation structure penetrating through a semiconductor substrate, a biosensor coupled to the semiconductor substrate, and a cover. The biosensor includes a bio-sensing device, a voltage-reference device spaced apart from the bio-sensing device, thermal management devices in proximity to the bio-sensing device, and a patterned dielectric layer. Each of the bio-sensing and voltage-reference devices includes a gate structure disposed on a bottom surface of the semiconductor substrate, S/D regions disposed in the semiconductor substrate, and a portion of a sensing film disposed on the semiconductor substrate and capacitively coupled to the gate structure and the S/D regions. Each thermal management devices includes a gate structure underlying the isolation structure or the semiconductor substrate. The patterned dielectric layer overlying the semiconductor substrate includes sensing wells located above the voltage-reference and bio-sensing devices.

Abstract: A temperature control device includes a temperature sensor configured to detect a temperature within a server. When the temperature in the server is below a preset temperature, the control unit controls an interior heating assembly to heat the server, and closes a ventilation assembly to retain heat within the server. When the temperature in the server has reached the preset temperature, the control unit controls the heating assembly to stop the internal heating, and controls the ventilation assembly to open, to allow dissipation of the heat from the server.

Abstract: A method of generating an integrated circuit (IC) layout diagram of an IC device includes receiving the IC layout diagram of the IC device, the IC layout diagram including a gate region having a width across an active region. The width is divided into a plurality of width segments based on a location of a gate via, and a simulation is performed based on the IC layout diagram and including an effective resistance calculated using at least one width segment of the plurality of width segments.

Abstract: A semiconductor device includes a substrate, an interconnect, and a sensor. The substrate includes devices therein and has a front side and a rear side opposite to the front side. The interconnect is disposed on the front side and electrically coupled to the devices. The sensor is disposed over the substrate and in the interconnect, and includes a sensing element and a reference element. The sensing element is disposed in a topmost layer of the interconnect and exposed therefrom, where the sensing element is electrically coupled to a first device of the devices through the interconnect. The reference element is disposed in the topmost layer of the interconnect and exposed therefrom, where the reference element is laterally spaced from the sensing element and is electrically coupled to a second device of the devices through the interconnect.

Abstract: A semiconductor device includes a substrate, an interconnect, a second transistor, and a sensing film. The substrate includes devices disposed therein. The interconnect is disposed on the substrate and electrically coupled to the devices, where the interconnect includes a plurality of build-up layers and a through hole formed therein. The first transistor is disposed in the interconnect and vertically extends through at least one of the plurality of build-up layers, and the first transistor is electrically coupled to a first device of the devices through the interconnect. The second transistor is disposed in the interconnect and vertically extends through the at least one of the plurality of build-up layers, and the second transistor is electrically coupled to a second device of the devices through the interconnect, where the first transistor and the second transistor are laterally separated from one another through the through hole.

Abstract: A wall module for a building control system includes a back plate with one or more mounting features for mounting the backplate to a wall. A main body includes one or more attachment features for removably attaching the main body to the back plate. The main body also includes a front side and a back side, wherein at least part of the front side is formed by a front plate. A display is housed by the main body in a display cavity that is defined at least in part by the front plate, and wherein at least part of the display is viewable from the front side. An antenna is housed by the main body in an antenna cavity that is defined at least in part by the front plate.

Abstract: A biosensor including a first sensor, a second sensor, a patterned dielectric layer and a cover is provided. The first sensor includes a first voltage-reference device and a first bio-sensing device. The second sensor is disposed adjacent to the first sensor, the second sensor includes a second voltage-reference device and a second bio-sensing device, the first sensor is spaced apart from the second sensor by a lateral distance, and the lateral distance is greater than a half of an average lateral dimension of the first voltage-reference device and the second voltage-reference device. The patterned dielectric layer includes sensing wells located above the first voltage-reference device, the first bio-sensing device, the second voltage-reference device and the second bio-sensing device. The cover includes fluid channels communicating with the sensing wells.

Abstract: A method for processing a plurality of queries is provided according to embodiments of the present disclosure. In this method, based on a plurality of queries and an execution plan for the plurality of quires, a plurality of record identification (ID) numbers can be stored into a pool in a numerical order. Each of the plurality of record ID numbers can identify a data record in a database. Then, the execution plan can be performed to batch a plurality of data records corresponding to the plurality of record ID numbers in the database based on a distribution of the plurality of record ID numbers in the pool.

Abstract: A data center heat recovery system includes a building heat pump system providing a first liquid when an ambient temperature is lower than a first preset temperature, a heat exchanger receiving the first liquid from the building heat pump system when the ambient temperature is lower than the first preset temperature, and modular data centers. Each of the modular data centers includes an air chiller and a data center. Each of the modular data centers is coupled to the heat exchanger through a second pipeline containing a second fluid. When the ambient temperature is higher than a second preset temperature, the air chiller cools the second fluid. When the ambient temperature is lower than the first preset temperature, the heat exchanger collects heat from the second fluid, and the heat exchanger transports the collected heat to the building heat pump system through the first fluid in the first pipeline.

Abstract: A containerized data system, including a container body, a first cabinet array, a second cabinet array and a plurality of first air-conditioning devices. The first cabinet array and the second cabinet array are positioned in the container body and spaced apart from each other. Air intake areas of the first cabinet array and the second cabinet array communicates with a cold aisle connection space of the container body. Heat dissipation areas of the first cabinet array and the second cabinet array communicate with a hot aisle connection space of the container body. Air inlets of the first air-conditioning devices are communicated with the hot aisle connection space to collect the hot air flow in the container body, and air outlets of the plurality of first air-conditioning devices are communicated with the cold aisle connection space to convey the cold air flow to the container body.

Abstract: A containerized data system, including a container body, a first cabinet array, a second cabinet array and a plurality of first air-conditioning devices. The first cabinet array and the second cabinet array are positioned in the container body and spaced apart from each other. Air intake areas of the first cabinet array and the second cabinet array communicates with a cold aisle connection space of the container body. Heat dissipation areas of the first cabinet array and the second cabinet array communicates with a hot aisle connection space of the container body. Air inlets of the first air-conditioning devices are communicated with the hot aisle connection space to collect the hot air flow in the container body, and air outlets of the plurality of first air-conditioning devices are communicated with the cold aisle connection space to convey the cold air flow to the container body.

Abstract: An immersion cooling tank includes a tank body and a liquid flow tube. The tank body holds a coolant and an electronic device. The tank body defines an inlet and an outlet. The inlet and the outlet are respectively located at opposite ends of the electronic device for inputting and outputting the coolant. The coolant flows through the electronic device. The liquid flow tube includes at least one adjuster. The liquid flow tube is located inside the tank body and coupled to at least one of the inlet or the outlet. The at least one adjuster faces the electronic device for controlling an amount of the coolant flowing in or out of the tank body.

Abstract: The present disclosure relates to a data writing method and apparatus of a NAND flash, and a storage medium. The method includes: for each channel in the NAND flash, pairing all logic units, namely LUNs, in the channel so that each LUN pair includes at least two LUNs; and for each LUN pair, sequentially writing data to one same page in a plurality of pages corresponding to a program mode included in each word line of each LUN in the LUN pair, and after completing data writing to the same page of the word line of all the LUNs in the LUN pair, sequentially writing data to a next same page in the plurality of pages of the word line of each LUN in the LUN pair, until the data writing is sequentially performed on a last same page in the plurality of pages of the word line of each LUN in the LUN pair. Therefore, the transmission efficiency of a NAND bus can be improved, and the data writing performance of the NAND flash can be improved.

Abstract: A cooling and heating energy saving system includes a cooling and heating device, a data center, a boiler, a heat exchanger, and a circulating pump. The boiler receives waste heat of the data center and heat generated by the cooling and heating device, and then generates high-temperature heat and transfers the high-temperature heat to an indoor heating device. The heat exchanger receives heat from the cooling and heating device and the data center. The circulating pump receives the heat generated by the data center and transmits the heat to an outdoor cold source, and further transmits the outdoor cold source to an indoor device through the heat exchanger.