Patents by Inventor Keiichi Sekiguchi
Keiichi Sekiguchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8445338Abstract: The present invention provides a method for manufacturing a semiconductor device, by which a transistor including an active layer, a gate insulating film in contact with the active layer, and a gate electrode overlapping the active layer with the gate insulating film therebetween is provided; an impurity is added to a part of a first region overlapped with the gate electrode with the gate insulating film therebetween in the active layer and a second region but the first region in the active layer by adding the impurity to the active layer from one oblique direction; and the second region is situated in the one direction relative to the first region.Type: GrantFiled: July 16, 2012Date of Patent: May 21, 2013Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Keiichi Sekiguchi, Junichi Koezuka, Yasuyuki Arai, Shunpei Yamazaki
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Publication number: 20120276690Abstract: The present invention provides a method for manufacturing a semiconductor device, by which a transistor including an active layer, a gate insulating film in contact with the active layer, and a gate electrode overlapping the active layer with the gate insulating film therebetween is provided; an impurity is added to a part of a first region overlapped with the gate electrode with the gate insulating film therebetween in the active layer and a second region but the first region in the active layer by adding the impurity to the active layer from one oblique direction; and the second region is situated in the one direction relative to the first region.Type: ApplicationFiled: July 16, 2012Publication date: November 1, 2012Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Keiichi SEKIGUCHI, Junichi Koezuka, Yasuyuki Arai, Shunpei Yamazaki
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Patent number: 8236633Abstract: The present invention provides a method for manufacturing a semiconductor device, by which a transistor including an active layer, a gate insulating film in contact with the active layer, and a gate electrode overlapping the active layer with the gate insulating film therebetween is provided; an impurity is added to a part of a first region overlapped with the gate electrode with the gate insulating film therebetween in the active layer and a second region but the first region in the active layer by adding the impurity to the active layer from one oblique direction; and the second region is situated in the one direction relative to the first region.Type: GrantFiled: March 31, 2008Date of Patent: August 7, 2012Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Keiichi Sekiguchi, Junichi Koezuka, Yasuyuki Arai, Shunpei Yamazaki
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Publication number: 20120178238Abstract: An SOI substrate including a semiconductor layer whose thickness is even is provided. According to a method for manufacturing the SOI substrate, the semiconductor layer is formed over a base substrate. In the method, a first surface of a semiconductor substrate is polished to be planarized; a second surface of the semiconductor substrate which is opposite to the first surface is irradiated with ions, so that an embrittled region is formed in the semiconductor substrate; the second surface is attached to the base substrate, so that the semiconductor substrate is attached to the base substrate; and separation in the embrittled region is performed. The value of 3? (? denotes a standard deviation of thickness of the semiconductor layer) is less than or equal to 1.5 nm.Type: ApplicationFiled: December 30, 2011Publication date: July 12, 2012Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Keiichi SEKIGUCHI, Kazuya HANAOKA, Daigo ITO
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Patent number: 8166946Abstract: A diesel engine start-up assisting device includes a plurality of first-and-second switching elements 11a to 11d between a common direct-current power source 1 and a plurality of electrical load 3a to 3d, a plurality of start-up assisting main parts 10a to 10d and an input-and-output unit 7. The diesel engine start-up assisting device is constructed so as to enable start-up of a diesel engine when power distribution is applied to at least one of the electrical loads 3a to 3d. In arrangement, the first-and-second switching elements 11a to 11d, the start-up assisting main parts 10a to 10d and the input-and-output unit 7 are integrated into one package having a lead frame. Defining the first-and-second switching element as a pair of switching elements, the first-and-second switching elements 11a to 11d are arranged in parallel with each other on the lead frame, and the lead frame has a notch part formed between two pairs of switching elements adjoined to each other.Type: GrantFiled: January 20, 2010Date of Patent: May 1, 2012Assignees: Sanken Electric Co., Ltd., Denso CorporationInventors: Keiichi Sekiguchi, Shigeo Yoshizaki, Hideki Asuke
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Publication number: 20110244653Abstract: An object of the present invention is to reduce the influence of a foreign substance adhering to a single crystalline semiconductor substrate and manufacture a semiconductor substrate with a high yield. Another object of the present invention is to manufacture, with a high yield, a semiconductor device which has stable characteristics. In the process of manufacturing a semiconductor substrate, when an embrittled region is to be formed in a single crystalline semiconductor substrate, the surface of the single crystalline semiconductor substrate is irradiated with hydrogen ions from oblique directions at multiple (at least two) different angles, thereby allowing the influence of a foreign substance adhering to the single crystalline semiconductor substrate to be reduced and allowing a semiconductor substrate including a uniform single crystalline semiconductor layer to be manufactured with a high yield.Type: ApplicationFiled: March 24, 2011Publication date: October 6, 2011Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventor: Keiichi SEKIGUCHI
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Patent number: 7990674Abstract: A load drive apparatus is provided which comprises a switching element 3 connected in series to a DC power source Vcc and an electric load 4, a drive circuit 5 for generating control signals to turn switching element 3 on and off, a thermal detection element 6 for sensing a temperature of switching element 3, an overheat protective circuit 7 for generating an overheat detection signal when thermal detection element 6 senses the temperature of switching element 3 over a predetermined temperature level, and a disconnection detection circuit 11 provided with a current mirror circuit 12 connected between one and the other terminals of thermal detection element 6 for detecting a disconnection in wiring between thermal detection element 6 and overheat protective circuit 7.Type: GrantFiled: June 21, 2007Date of Patent: August 2, 2011Assignee: Sanken Electric Co., Ltd.Inventors: Yuji Kato, Keiichi Sekiguchi, Kiyokatsu Satoh
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Patent number: 7776681Abstract: A first resist mask and a second resist mask used for forming a gate electrode for a p-channel TFT and a gate electrode for an n-channel TFT are left, and a third resist mask is formed afterwards over a first area where one of the p-channel TFT and the n-channel TFT is to be formed; thus, a source region and a drain region are formed in a semiconductor film of the other one of the p-channel TFT and the n-channel TFT by adding first impurity ions using the second resist mask and the third resist mask. After that, the first resist mask, the second resist mask, and the third resist mask are removed, and a source region and a drain region are formed in a semiconductor film of the one of the p-channel TFT and the n-channel TFT by adding second impurity ions using a fourth resist mask.Type: GrantFiled: October 19, 2009Date of Patent: August 17, 2010Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventor: Keiichi Sekiguchi
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Publication number: 20100186704Abstract: A diesel engine start-up assisting device includes a plurality of first-and-second switching elements 11a to 11d between a common direct-current power source 1 and a plurality of electrical load 3a to 3d, a plurality of start-up assisting main parts 10a to 10d and an input-and-output unit 7. The diesel engine start-up assisting device is constructed so as to enable start-up of a diesel engine when power distribution is applied to at least one of the electrical loads 3a to 3d. In arrangement, the first-and-second switching elements 11a to 11d, the start-up assisting main parts 10a to 10d and the input-and-output unit 7 are integrated into one package having a lead frame. Defining the first-and-second switching element as a pair of switching elements, the first-and-second switching elements 11a to 11d are arranged in parallel with each other on the lead frame, and the lead frame has a notch part formed between two pairs of switching elements adjoined to each other.Type: ApplicationFiled: January 20, 2010Publication date: July 29, 2010Applicants: Sanken Electric Co., Ltd., DENSO CORPORATIONInventors: Keiichi SEKIGUCHI, Shigeo Yoshizaki, Hideki Asuke
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Patent number: 7705358Abstract: It is an object to improve operation characteristics and reliability of a semiconductor device. A semiconductor device which includes an island-shaped semiconductor film having a channel-formation region, a first low-concentration impurity region, a second low-concentration impurity region, and a high-concentration impurity region including a silicide layer; a gate insulating film; a first gate electrode overlapping with the channel-formation region and the first low-concentration impurity region with the gate insulating film interposed therebetween; a second gate electrode overlapping with the channel-formation region with the gate insulating film and the first gate electrode interposed therebetween; and a sidewall formed on side surfaces of the first gate electrode and the second gate electrode. In the semiconductor device, a thickness of the gate insulating film is smaller in a region over the second low-concentration impurity region than in a region over the first low-concentration impurity region.Type: GrantFiled: December 14, 2007Date of Patent: April 27, 2010Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Satoru Okamoto, Keiichi Sekiguchi
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Patent number: 7675120Abstract: A composite integrated circuit incorporating two LDMOSFETs of unlike designs, with the consequent creation of a parasitic transistor. A multipurpose resistor is integrally built into the composite integrated circuit in order to prevent the parasitic transistor from accidentally turning on. In an intended application of the composite integrated circuit to a startup circuit of a switching-mode power supply, the multipurpose resistor serves as startup resistor for limiting the flow of rush current during the startup period of the switching-mode power supply.Type: GrantFiled: November 10, 2006Date of Patent: March 9, 2010Assignee: Sanken Electric Co., Ltd.Inventors: Keiichi Sekiguchi, Kazuya Aizawa
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Publication number: 20100041190Abstract: A first resist mask and a second resist mask used for forming a gate electrode for a p-channel TFT and a gate electrode for an n-channel TFT are left, and a third resist mask is formed afterwards over a first area where one of the p-channel TFT and the n-channel TFT is to be formed; thus, a source region and a drain region are formed in a semiconductor film of the other one of the p-channel TFT and the n-channel TFT by adding first impurity ions using the second resist mask and the third resist mask. After that, the first resist mask, the second resist mask, and the third resist mask are removed, and a source region and a drain region are formed in a semiconductor film of the one of the p-channel TFT and the n-channel TFT by adding second impurity ions using a fourth resist mask.Type: ApplicationFiled: October 19, 2009Publication date: February 18, 2010Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventor: Keiichi SEKIGUCHI
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Patent number: 7638372Abstract: A first resist mask and a second resist mask used for forming a gate electrode for a p-channel TFT and a gate electrode for an n-channel TFT are left, and a third resist mask is formed afterwards over a first area where one of the p-channel TFT and the n-channel TFT is to be formed; thus, a source region and a drain region are formed in a semiconductor film of the other one of the p-channel TFT and the n-channel TFT by adding first impurity ions using the second resist mask and the third resist mask. After that, the first resist mask, the second resist mask, and the third resist mask are removed, and a source region and a drain region are formed in a semiconductor film of the one of the p-channel TFT and the n-channel TFT by adding second impurity ions using a fourth resist mask.Type: GrantFiled: June 14, 2006Date of Patent: December 29, 2009Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventor: Keiichi Sekiguchi
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Publication number: 20090237853Abstract: A load drive apparatus is provided which comprises a switching element 3 connected in series to a DC power source Vccand an electric load 4, a drive circuit 5 for generating control signals to turn switching element 3 on and off, a thermal detection element 6 for sensing a temperature of switching element 3, an overheat protective circuit 7 for generating an overheat detection signal when thermal detection element 6 senses the temperature of switching element 3 over a predetermined temperature level, and a disconnection detection circuit 11 provided with a current mirror circuit 12 connected between one and the other terminals of thermal detection element 6 for detecting a disconnection in wiring between thermal detection element 6 and overheat protective circuit 7.Type: ApplicationFiled: June 21, 2007Publication date: September 24, 2009Applicant: SANKEN ELECTRIC CO., LTD.Inventors: Yuji Kato, Keiichi Sekiguchi, Kiyokatsu Satoh
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Publication number: 20080188050Abstract: The present invention provides a method for manufacturing a semiconductor device, by which a transistor including an active layer, a gate insulating film in contact with the active layer, and a gate electrode overlapping the active layer with the gate insulating film therebetween is provided; an impurity is added to a part of a first region overlapped with the gate electrode with the gate insulating film therebetween in the active layer and a second region but the first region in the active layer by adding the impurity to the active layer from one oblique direction; and the second region is situated in the one direction relative to the first region.Type: ApplicationFiled: March 31, 2008Publication date: August 7, 2008Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Keiichi SEKIGUCHI, Junichi KOEZUKA, Yasuyuki ARAI, Shunpei YAMAZAKI
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Publication number: 20080150027Abstract: It is an object to improve operation characteristics and reliability of a semiconductor device. A semiconductor device which includes an island-shaped semiconductor film having a channel-formation region, a first low-concentration impurity region, a second low-concentration impurity region, and a high-concentration impurity region including a silicide layer; a gate insulating film; a first gate electrode overlapping with the channel-formation region and the first low-concentration impurity region with the gate insulating film interposed therebetween; a second gate electrode overlapping with the channel-formation region with the gate insulating film and the first gate electrode interposed therebetween; and a sidewall formed on side surfaces of the first gate electrode and the second gate electrode. In the semiconductor device, a thickness of the gate insulating film is smaller in a region over the second low-concentration impurity region than in a region over the first low-concentration impurity region.Type: ApplicationFiled: December 14, 2007Publication date: June 26, 2008Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Satoru Okamoto, Keiichi Sekiguchi
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Patent number: 7365361Abstract: The present invention provides a method for manufacturing a semiconductor device, by which a transistor including an active layer, a gate insulating film in contact with the active layer, and a gate electrode overlapping the active layer with the gate insulating film therebetween is provided; an impurity is added to a part of a first region overlapped with the gate electrode with the gate insulating film therebetween in the active layer and a second region but the first region in the active layer by adding the impurity to the active layer from one oblique direction; and the second region is situated in the one direction relative to the first region.Type: GrantFiled: July 14, 2004Date of Patent: April 29, 2008Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Keiichi Sekiguchi, Junichi Koezuka, Yasuyuki Arai, Shunpei Yamazaki
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Patent number: 7271579Abstract: An AC voltage generated by an AC power source 1 is rectified by a full-wave rectifying circuit 2, which generates a rectified voltage. An internal regulator 33 performs waveform shaping of the rectified voltage. A comparator 42 compares the rectified voltage output from the internal regulator 33 with a reference voltage V1 and detects a period in which the rectified voltage exceeds the reference voltage V1. According to an output signal of the comparator 42, a determination signal generation circuit 50 determines the power source voltage supplied form the AC power source 1 and generates a determination signal. Accordingly, there is no need of a capacitor, etc. for detecting the peak value of the rectified voltage, and it is possible to reduce the size and cost of an AC voltage detection circuit.Type: GrantFiled: March 6, 2003Date of Patent: September 18, 2007Assignee: Sanken Electric Co., Ltd.Inventors: Masaaki Shimada, Tomoyasu Yamada, Keiichi Sekiguchi
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Publication number: 20070108533Abstract: A composite integrated circuit incorporating two LDMOSFETs of unlike designs, with the consequent creation of a parasitic transistor. A multipurpose resistor is integrally built into the composite integrated circuit in order to prevent the parasitic transistor from accidentally turning on. In an intended application of the composite integrated circuit to a startup circuit of a switching-mode power supply, the multipurpose resistor serves as startup resistor for limiting the flow of rush current during the startup period of the switching-mode power supply.Type: ApplicationFiled: November 10, 2006Publication date: May 17, 2007Applicant: Sanken Electric Co., Ltd.Inventors: Keiichi Sekiguchi, Kazuya Aizawa
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Publication number: 20060292778Abstract: A first resist mask and a second resist mask used for forming a gate electrode for a p-channel TFT and a gate electrode for an n-channel TFT are left, and a third resist mask is formed afterwards over a first area where one of the p-channel TFT and the n-channel TFT is to be formed; thus, a source region and a drain region are formed in a semiconductor film of the other one of the p-channel TFT and the n-channel TFT by adding first impurity ions using the second resist mask and the third resist mask. After that, the first resist mask, the second resist mask, and the third resist mask are removed, and a source region and a drain region are formed in a semiconductor film of the one of the p-channel TFT and the n-channel TFT by adding second impurity ions using a fourth resist mask.Type: ApplicationFiled: June 14, 2006Publication date: December 28, 2006Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventor: Keiichi Sekiguchi