Patents by Inventor Keiri Nakanishi

Keiri Nakanishi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180102788
    Abstract: A data compressing device according to an embodiment includes a data cutting unit configured to divide continuously inputted data into W-bit data blocks and to output the data blocks in segments such that each of the segments is composed of N data blocks, and a compression-method determining unit configured to select, as a compression portion for each of the segments, a run length system, a flag system, or no compression, according to a ratio of data blocks of specific data in any of the segments. The data compressing device further includes an RL compression unit configured to execute, on any of the segments, a run length system of storing a consecutive amount of the specific data into compressed data, and a flag compression unit configured to execute, on any of the segments, a flag system of storing positional information of the specific data into compressed data.
    Type: Application
    Filed: August 28, 2017
    Publication date: April 12, 2018
    Inventors: Kazuki Inoue, Keiri Nakanishi, Yasuki Tanabe, Wataru Asano
  • Publication number: 20180074730
    Abstract: According to one embodiment, a control unit determines a first physical sector in which first data is to be written among a plurality of physical sectors based on first information that is based on a result of the first data translation and the device characteristics of the plurality of physical sectors. A write unit writes data for which a first data translation is performed into the first physical sector of a nonvolatile memory.
    Type: Application
    Filed: March 3, 2017
    Publication date: March 15, 2018
    Inventors: Kazuki Inoue, Sho Kodama, Keiri Nakanishi
  • Publication number: 20180068719
    Abstract: According to one embodiment, a controller writes first processed data acquired by a first process into a nonvolatile memory during a first period. The controller writes second processed data acquired by a second process into the nonvolatile memory during a second period. The first process is for the purpose of improving the endurance of memory cells. The second process is for the purpose of decreasing inter-cell interferences between adjacent cells.
    Type: Application
    Filed: March 15, 2017
    Publication date: March 8, 2018
    Applicant: Toshiba Memory Corporation
    Inventors: Kejen LIN, Tokumasa HARA, Hironori UCHIKAWA, Juan SHI, Akira YAMAGA, Sho KODAMA, Keiri NAKANISHI
  • Patent number: 9900604
    Abstract: A semiconductor integrated circuit according to an embodiment includes a compressor, a compression distortion detector, and an image-quality adjusting-parameter generator. The compressor generates a compressed image of an original image output from a host apparatus based on an image-quality adjusting parameter. The compression distortion detector detects a compression distortion of the compressed image. The image-quality adjusting-parameter generator updates the image-quality adjusting parameter based on the compression distortion.
    Type: Grant
    Filed: March 4, 2016
    Date of Patent: February 20, 2018
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Keiri Nakanishi
  • Patent number: 9792884
    Abstract: According to one embodiment, an image processing apparatus includes an encoding unit that compresses an input image for each pixel block having a size smaller than a line to generate a plurality of compressed blocks, and store the compressed blocks in a frame buffer, a reading unit that identifies an object block to be expanded among the compressed blocks, and reads the object block from the frame buffer, a decoding unit that expands the object block to generate an expanded block, and an information acquiring unit that acquires, based on the expanded block, position information used by the reading unit to identify the block to be expanded, or decode information used by the decoding unit to expand another compressed block.
    Type: Grant
    Filed: January 5, 2016
    Date of Patent: October 17, 2017
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Youhei Fukazawa, Keiri Nakanishi, Masashi Jobashi, Sho Kodama
  • Publication number: 20170262194
    Abstract: According to one embodiment, a memory controller includes a compression unit and a padding processing unit. The compression unit compresses first data to be written into a first page and second data to be written into a second page. The padding processing unit performs a padding processing such that the compressed first data is written into first memory cells, first padding data is written into second memory cells, the compressed second data is written into third memory cells, and second padding data is written into fourth memory cells.
    Type: Application
    Filed: September 9, 2016
    Publication date: September 14, 2017
    Inventors: Sho Kodama, Keiri Nakanishi, Kohei Oikawa, Kojiro Suzuki
  • Publication number: 20170262212
    Abstract: According to one embodiment, a memory controller includes a compression unit and a padding processing unit. The compression unit generates first compressed data and second compressed data by compressing first data and second data. The padding processing unit pads first padding data for the first compressed data in accordance with a first padding pattern and pads second padding data for the second compressed data in accordance with a second padding pattern.
    Type: Application
    Filed: February 1, 2017
    Publication date: September 14, 2017
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Keiri NAKANISHI, Sho KODAMA, Kohei OIKAWA, Kojiro SUZUKI
  • Patent number: 9641850
    Abstract: With a video compression device configured to compress one pixel per cycle, a predictive pixel generation unit generates predictive pixel values of a plurality of predictive modes defined assuming local decode pixels read from predetermined positions of a line memory as upper reference pixels and an input original image pixel positioned on the left side of a pixel to be compressed as a left reference pixel for the pixel to be compressed. A predictive mode determination unit calculates a predictive error in a unit based on differential values between the pixel value to be compressed and the predictive pixel value, and selects a minimum predictive mode. A DPCM unit generates a minimum differential value between the minimum predictive pixel value and the pixel to be compressed assuming local decode pixels as upper reference pixels and a local decode pixel value one cycle before as a left reference pixel.
    Type: Grant
    Filed: April 30, 2014
    Date of Patent: May 2, 2017
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Keiri Nakanishi, Masashi Jobashi, Kojiro Suzuki
  • Publication number: 20170070244
    Abstract: According to an embodiment, a storage control device includes a controller, a compression condition determiner, a compressor, and an error correction encoder. The controller receives a write request for a data item and determines whether or not the wear degree of a target region in a storage device to which the data item is to be written is less than a threshold value. The compression condition determiner determines, based on the wear degree, an optimal compression condition out of compression conditions that include lossy compression. The compressor generates, based on the compression condition, compressed data. The error correction encoder subjects the data item to error correction and generates encoded data.
    Type: Application
    Filed: September 7, 2016
    Publication date: March 9, 2017
    Inventors: Keiri Nakanishi, Katsuyuki Nomura, Sho Kodama, Youhei Fukazawa, Kazuki Inoue, Kojiro Suzuki, Harutaka Goto
  • Publication number: 20170064318
    Abstract: An image compression apparatus according to an embodiment includes a slope determiner and a compressor. The slope determiner determines slopes of linear lines calculated from a reference component and non-reference components. The reference component is one of a plurality of image components forming pixels included in an input image data. The non-reference components are other image components. The compressor generates a compressed image data in which a value of the reference component of each of the pixels in the input image data, the slopes, and representative values of the non-reference components are compressed.
    Type: Application
    Filed: March 4, 2016
    Publication date: March 2, 2017
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Sho KODAMA, Keiri NAKANISHI
  • Publication number: 20160267683
    Abstract: A semiconductor integrated circuit according to an embodiment includes a compressor, a compression distortion detector, and an image-quality adjusting-parameter generator. The compressor generates a compressed image of an original image output from a host apparatus based on an image-quality adjusting parameter. The compression distortion detector detects a compression distortion of the compressed image. The image-quality adjusting-parameter generator updates the image-quality adjusting parameter based on the compression distortion.
    Type: Application
    Filed: March 4, 2016
    Publication date: September 15, 2016
    Inventor: Keiri NAKANISHI
  • Publication number: 20160267888
    Abstract: According to one embodiment, an image processing apparatus includes an encoding unit that compresses an input image for each pixel block having a size smaller than a line to generate a plurality of compressed blocks, and store the compressed blocks in a frame buffer, a reading unit that identifies an object block to be expanded among the compressedblocks, and reads the object block from the frame buffer, a decoding unit that expands the object block to generate an expanded block, and an information acquiring unit that acquires, based on the expanded block, position information used by the reading unit to identify the block to be expanded, or decode information used by the decoding unit to expand another compressed block.
    Type: Application
    Filed: January 5, 2016
    Publication date: September 15, 2016
    Inventors: Youhei Fukazawa, Keiri Nakanishi, Masashi Jobashi, Sho Kodama
  • Patent number: 9384524
    Abstract: According to one embodiment, an image processing apparatus includes a receiver, a write controller, and a transmission controller. The receiver is configured to receive image data which forms an image to be displayed on a display apparatus. The write controller is configured to control to divide the image data into a plurality of regions and write compressed image data obtained by compressing the image data for each region, to a frame memory. The transmission controller is configured to control to transmit, to the display apparatus, original image data, which is restored by reading the compressed image data from the frame memory and decompressing the compressed image data for each region. Each of the regions has an overlap portion which is overlapped by a part of an adjacent region.
    Type: Grant
    Filed: August 20, 2013
    Date of Patent: July 5, 2016
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventor: Keiri Nakanishi
  • Patent number: 8953878
    Abstract: According to one embodiment, it is provided that an image compressor includes an image data controller, first to third encoders and an encoded data generator. The image data controller extracts first to third pixels. The first encoder encodes a target first pixel and generates a first encoded pixel. The second encoder encodes a target second pixel and generates a second encoded pixel. The third encoder encodes a target third pixel and generates a third encoded pixel. The encoded data generator combines the first to third encoded pixels and generates encoded data.
    Type: Grant
    Filed: February 19, 2013
    Date of Patent: February 10, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Keiri Nakanishi
  • Publication number: 20140334541
    Abstract: With a video compression device configured to compress one pixel per cycle, a predictive pixel generation unit generates predictive pixel values of a plurality of predictive modes defined assuming local decode pixels read from predetermined positions of a line memory as upper reference pixels and an input original image pixel positioned on the left side of a pixel to be compressed as a left reference pixel for the pixel to be compressed. A predictive mode determination unit calculates a predictive error in a unit based on differential values between the pixel value to be compressed and the predictive pixel value, and selects a minimum predictive mode. A DPCM unit generates a minimum differential value between the minimum predictive pixel value and the pixel to be compressed assuming local decode pixels as upper reference pixels and a local decode pixel value one cycle before as a left reference pixel.
    Type: Application
    Filed: April 30, 2014
    Publication date: November 13, 2014
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Keiri Nakanishi, Masashi Jobashi, Kojiro Suzuki
  • Publication number: 20140285505
    Abstract: According to one embodiment, an image processing apparatus includes a receiver, a write controller, and a transmission controller. The receiver is configured to receive image data which forms an image to be displayed on a display apparatus. The write controller is configured to control to divide the image data into a plurality of regions and write compressed image data obtained by compressing the image data for each region, to a frame memory. The transmission controller is configured to control to transmit, to the display apparatus, original image data, which is restored by reading the compressed image data from the frame memory and decompressing the compressed image data for each region. Each of the regions has an overlap portion which is overlapped by a part of an adjacent region.
    Type: Application
    Filed: August 20, 2013
    Publication date: September 25, 2014
    Inventor: Keiri NAKANISHI
  • Patent number: 8824789
    Abstract: According to one embodiment, an image encode controller includes a chroma component adjuster, a difference generator, a quantizer, an inverse-quantizer, and a variable codeword length encoder. The chroma component adjuster adjusts an original color component in accordance with a quantization coefficient to generate an adjusted chroma component. The difference generator generates a difference pixel component. The quantizer quantizes an output of the difference generator based on the quantization coefficient. The inverse-quantizer inversely quantizes an output of the quantizer based on the quantization coefficient. The variable codeword length encoder performs variable codeword length encoding with respect to an output of the quantizer to generate encoded data.
    Type: Grant
    Filed: August 28, 2012
    Date of Patent: September 2, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Keiri Nakanishi
  • Patent number: 8792012
    Abstract: According to one embodiment, an image processing device includes a motion vector generator, a correction amount generator, and a correcting module. The motion vector generator is configured to generate a horizontal direction motion vector and a vertical direction motion vector of an input video signal photographed in an order of scanning lines. The correction amount generator is configured to generate a horizontal direction correction amount based on the horizontal direction motion vector and the vertical direction motion vector by each scanning line, and generate a vertical direction correction amount based on the vertical direction motion vector by a scanning line. The correcting module is configured to correct the input video signal to generate an output video signal based on the horizontal direction correction amount and the vertical direction correction amount.
    Type: Grant
    Filed: August 8, 2011
    Date of Patent: July 29, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Keiri Nakanishi
  • Patent number: 8780216
    Abstract: According to one embodiment, an image processing system includes a pickup apparatus, a motion vector generator, a motion vector converter, a motion vector interpolator, a correction amount generator, and a correcting module. The pickup apparatus is configured to capture an image per scanning line and to generate an input video signal from the captured image. The motion vector generator is configured to generate a first horizontal direction motion vector and a first vertical direction motion vector indicative of a horizontal direction moving distance and a vertical direction moving distance respectively between frames in the input video signal.
    Type: Grant
    Filed: March 14, 2012
    Date of Patent: July 15, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Keiri Nakanishi
  • Publication number: 20140147040
    Abstract: According to an embodiment, an image encoding device includes a deciding unit, an assigning unit, and an encoding unit. The deciding unit is configured to determine representative colors for expressing each of pixel blocks into which image data are divided. The assigning unit is configured to assign an index for identifying the representative color to each pixel in the pixel block. The encoding unit is configured to encode indices and the representative colors, the indices and the representative colors in each pixel box being arranged alternately so that two representative colors are discontinuously encoded.
    Type: Application
    Filed: October 3, 2013
    Publication date: May 29, 2014
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Tatsuya TANAKA, Atsushi MATSUMURA, Masato SUMIYOSHI, Keiri NAKANISHI, Masashi JOBASHI, Sho KODAMA