Patents by Inventor Keisuke Kishishita

Keisuke Kishishita has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20050040879
    Abstract: To restrain variations in the power supply potential caused among a plurality of integrated circuits as well as the voltage drop of the power supply potential that has reached each block. A semiconductor integrated circuit device is provided with integrated circuits as blocks 2-4, power supply wires 11-13 for supplying power supply potential VDD or ground potential GND from feeder terminals 5-10 to the blocks 2-4, a switch circuit 14 for connecting the power supply wire 11 and the power supply wire 12, and a switch circuit 15 for connecting the power supply wire 11 and the power supply wire 13. When the switch circuit 15 is turned on, for example, the power supply wire 11 and the power supply wire 13 of the block 2 and the block 4 are connected whereby to supply the power supply potential from the two power supply wires, so that power supply potential variation is restrained.
    Type: Application
    Filed: August 20, 2004
    Publication date: February 24, 2005
    Inventor: Keisuke Kishishita