Abstract: A period composed of a total of three periods, namely a period when an actual voltage vector is employed and periods before and after it can be regarded as an isolation period when an actual voltage vector is isolated in a vicinity where switching for commutation in a current-source converter is generated. When the switching in the current-source converter occurs at the isolation period, zero-current switching is realized. When presence of dead time is thus taken into consideration, a width of the timing when the zero-current switching is realized is made to be broader than a case where the presence of the dead time is not taken into consideration by the dead time.

Abstract: A power converting apparatus generates a carrier having a waveform in which an absolute value of a slope is constant with respect to time, based on a value for internally dividing amplitude of the waveform into first and second values. Commutation of a converter is performed when the carrier takes a reference. Adoption is allowed of a zero voltage vector as a switching mode of an inverter in a period in which the carrier takes a first command value to a second command value. A value for internally dividing a value from the reference to a maximum value of the carrier at a ratio between a third value and a fourth value is the first command value. A value for internally dividing a value from a minimum value of the carrier to the reference at a ratio between the third value and the fourth value is the second command value.

Abstract: A power converter includes a rectifier section, an inverter section, a capacitance element connected between inverter section input ends, an inductance element forming part of an LC filter with the capacitance element, a voltage detector detecting an inductance element voltage, and a controller controlling the inverter section based on the detected voltage. The LC filter has a resonance frequency set such that ripple current components contained in DC current outputted from the rectifier section passes through, and current components of a frequency equal to a carrier frequency of the inverter section are dampened. The controller controls the inverter section so that a transfer characteristic of input voltage of the inverter section versus the DC voltage from the rectifier section becomes a damping characteristic given by a phase lead element and a second-order lag element connected in series, and a damping coefficient of the transfer characteristic is set larger than 1.

Abstract: Disclosed herein is a device that includes a first semiconductor chip. The first semiconductor chip includes a first data storage area storing data, a first refresh circuit repeating a first refresh operation on the first data storage area to make the first data storage area retain the data, a first terminal supplied with a first control signal from outside of the first semiconductor chip, and a first control circuit coupled between the first terminal and the first refresh circuit to control a repetition cycle of the first refresh operation in response to the first control signal.

Abstract: A converter section (2) includes three pairs of switching elements (Srp, . . . , Stn), each pair having two switching elements connected in series between two direct current links (L1, L2), and phases of an input three-phase alternating current are connected to nodes between the series-connected switching elements one by one. Each of the switching elements (Srp, . . . , Stn) is made of a transistor having a bipolar structure. The control unit (5) controls the switching elements (Srp, . . . , Stn) such that line voltages between a reference phase, which is one of the phases of the input three-phase alternating current, and each of the other phases are output to the two direct current links (L1, L2) on a time division basis. The control unit (5) applies a predetermined gate voltage to one or more of the switching elements (Srp, . . . , Stn) to which a reverse bias is applied.

Abstract: In a direct converting apparatus including a converter and a plurality of inverters, substantial carrier frequencies of the plurality of inverters are made different from each other while performing an operation in synchronization with the converter. An original carrier has a carrier frequency twice as high as a carrier frequency of a first carrier used for controlling one of the inverters. A waveform of the original carrier is magnified twice with a value serving as the center thereof, so that a second carrier used for controlling the other of the inverters is obtained.

Abstract: An output voltage of a converter is given to a pair of DC power supply lines. Inverters are connected in parallel with each other between the DC power supply lines. When one inverter is operated based on a first zero vector and the other inverter is operated based on a second zero vector, a commutation is caused in the converter. The first zero vector and the second zero vector are different from each other. For example, all of high-arm side switching elements of the one inverter and low-arm side switching elements of the other inverter are rendered non-conducting, and all of side switching elements of the one inverter and high-arm side switching elements of the other inverter are rendered conducting.

Abstract: A current controlled power converter includes a converting part configured to convert a three-phase ac voltage into a dc voltage or converts a dc voltage into a three-phase ac voltage, ac side current detection portions configured to detect an ac side current of the converting part, dc side current detection portions configured to detect a dc side current of the converting part, and a control section configured to control the converting part by pulse-width modulation using a spatial vector modulation method based on the ac side current detected by the ac side current detection portions and the dc side current detected by the dc side current detection portions. The control section corrects an amplitude error of the ac side current detected by the ac side current detection portions, and an offset error of the ac side current detected by the ac side current detection portions.

Abstract: A cycle is divided into a first period and a second period. The first period is longer than the second period. Two sections in which a unit voltage vector is adopted in the first period are adopted as a first section and a second section. A first measured value of a link voltage is measured at a midpoint of the first section and a second measured value of the link voltage is measured at a midpoint of the second section. Then, a representative value of the link voltage in a cycle including the first period is obtained by interpolation of the first measured value and the second measured value. A maximum value of the link voltage is obtained by dividing the representative value by cos ?.

Abstract: A converter and an inverter are connected via a clamp circuit. The converter performs commutation in accordance with any of a first commutation mode in which trapezoidal waves are compared with a carrier and a 120-degree conduction mode. A diode of the clamp circuit is short-circuited by a shorting switch. The shorting switch is rendered conductive when a power factor reduces or a power supply voltage reduces, and capacitors of the clamp circuit are connected in series between DC power supply lines. The converter performs commutation in accordance with the 120-degree conduction mode, not in accordance with the first commutation mode, while the shorting switch is conductive.

Abstract: Controlled by switching is which reactor in a reactor group present between a power source and a three-level converter is to be connected to an intermediate point that outputs a midpoint potential. In the switching, the closer to the command value of the midpoint potential the command values of input potentials of the converter are, the greater the duty at which corresponding reactors are connected to the intermediate point is for pulse width modulation. Additionally, a predetermined range to be compared with the command values has a predetermined potential width with respect to an AC waveform centered around the command value of the midpoint potential.

Abstract: A control section controls a current-source converter while a switch is conducting, to render conducting a pair of a high-aim side transistor and a low-arm side transistor (for example, transistors) which are connected to any one of input lines, performs voltage doubler rectification on a voltage between a neutral phase input line on which a resistor is provided and any one of the input lines, to serve for charging of clamp capacitors.

Abstract: A control section controls a current-source converter simultaneously with or prior to conduction of a power supply switch to connect a clamp capacitor and capacitors between a first input line on which a resistor is provided and any one of second and third input lines in parallel with each other. Accordingly, current is transmitted to the clamp capacitor via the resistor when the power supply switch is brought into conduction, which prevents inrush current from flowing to the clamp capacitor. In addition, for example, the capacitors are not charged prior to the clamp capacitor, whereby it is possible to prevent the inrush current from flowing from the capacitors to the clamp capacitor when they are connected in parallel with each other.

Abstract: Disclosed herein is a device that includes a plurality of memory circuits and a refresh control circuit configured to generate a plurality of refresh initiation signals such that one of the refresh initiation signals takes an active level. Each of the memory circuits comprises a memory cell array including a plurality of memory cells, at least one data terminal, a data read/write circuit performing a data read operation to read out read-data from a selected one of the memory cells and supply the read-data to the data terminal and a data write operation to receive write-data from the data terminal and write the write-data into a selected one of the memory cells, and a refresh circuit performing a data refresh operation on selected one or ones of the memory cells of the memory cell array in response to an associated one of the refresh initiation signals taking the active level.

Abstract: A control section controls a current-source converter in a state in which a switch is in conduction, and performs voltage doubler rectification on a voltage between a neutral phase input line and any of input lines to provide for charging of clamp capacitors. Accordingly, the clamp capacitors are charged through a resistor, which prevents an inrush current from flowing therethrough. In addition, a voltage between both ends of a pair of the clamp capacitors is higher than, for example, a voltage between both ends of a pair of capacitors. Accordingly, even if the clamp capacitors and, for example, the capacitors are electrically connected to each other in a normal operation, it is possible to prevent the inrush current from flowing from the capacitors to the clamp capacitors.

Abstract: A switch device is brought into conduction in a case where a carrier takes a value zero to drt, a switch device is brought into conduction in a case where the carrier takes a value the drt to one, and one cycle of the carrier is divided into a period in which the carrier has a command value or more and a period in which the carrier has the command value or less. The periods are calculated by dst·T and drt·T, respectively. The same one as the carrier of a converter is employed in a carrier of an inverter, and based on the value drt set as a reference value, a command value of the inverter is provided in each of a side with a value larger than the reference value and a side with a value smaller than the reference value. The period in which the carrier takes the value or more is divided at a ratio among d0, d4 and d6, and the period in which the carrier takes the value drt or less is divided at the ratio among d0, d4 and d6.

Abstract: A transistor is brought into conduction when, for example, a voltage between both ends of a second clamp capacitor exceeds a predetermined reference voltage. A resistance value of a discharge resistor is smaller than a value obtained by dividing the reference voltage by the maximum value of a current flowing through the discharge resistor. When the transistor is brought into conduction as a result of a voltage between both ends of the second clamp capacitor exceeding the predetermined reference voltage, a voltage applied to the discharge resistor, which results from a regenerative current, is larger one of the voltage between both ends of the second clamp capacitor and a voltage drop of the discharge resistor due to the regenerative current. The voltage drop and the voltage between both ends are smaller than a voltage between DC power supply lines, whereby it is possible to reduce an electrostatic capacitance of the discharge resistor.

Abstract: A converter section (2) includes three pairs of switching elements (Srp, . . . , Stn), each pair having two switching elements connected in series between two direct current links (L1, L2), and phases of an input three-phase alternating current are connected to nodes between the series-connected switching elements one by one. Each of the switching elements (Srp, . . . , Stn) is made of a transistor having a bipolar structure. The control unit (5) controls the switching elements (Srp, . . . , Stn) such that line voltages between a reference phase, which is one of the phases of the input three-phase alternating current, and each of the other phases are output to the two direct current links (L1, L2) on a time division basis. The control unit (5) applies a predetermined gate voltage to one or more of the switching elements (Srp, . . . , Stn) to which a reverse bias is applied.

Abstract: A current controlled power converter includes a converting part configured to convert a three-phase ac voltage into a dc voltage or converts a dc voltage into a three-phase ac voltage, ac side current detection portions configured to detect an ac side current of the converting part, dc side current detection portions configured to detect a dc side current of the converting part, and a control section configured to control the converting part by pulse-width modulation using a spatial vector modulation method based on the ac side current detected by the ac side current detection portions and the dc side current detected by the dc side current detection portions. The control section corrects an amplitude error of the ac side current detected by the ac side current detection portions, and an offset error of the ac side current detected by the ac side current detection portions.

Abstract: A current controlled power converter includes a converting part configured to convert a three-phase ac voltage into a dc voltage or converts a dc voltage into a three-phase ac voltage, ac side current detection portions configured to detect an ac side current of the converting part, dc side current detection portions configured to detect a dc side current of the converting part, and a control section configured to control the converting part by pulse-width modulation using a spatial vector modulation method based on the ac side current detected by the ac side current detection portions and the dc side current detected by the dc side current detection portions. The control section corrects an amplitude error of the ac side current detected by the ac side current detection portions, and an offset error of the ac side current detected by the ac side current detection portions.