Abstract: The correspondence between input fields and grammars is obtained (S102), and a speech utterance example is displayed using a grammar corresponding to a portion (field) designated by an input instruction (S106). Also, a speech recognition process is executed using this grammar (S108). The speech recognition result is displayed in the field designated by the input instruction (S109). Upon reception an instruction for transmitting input data to an application, the input data is transmitted to the application (S110).

Abstract: Disclosed are an interactive system and method of controlling the same for achieving a task more efficiently. Items of data to be searched are stored in a memory (107) in a form classified according to prescribed classes, and a dialog controller (102) decides the order in which questions are presented to a user in order to narrow down the object of a search to data in a specific class. The questions are then presented to the user in the decided order by a question generator (103).

Abstract: Speech data is input from a speech capture unit. External data including vocabulary information is read from an external data acquisition unit. A speech recognition unit makes speech recognition of the speech data using the vocabulary information in the external data and recognition vocabulary information in a recognition vocabulary database, and outputs its speech recognition result.

Abstract: Disclosed is a fabrication method for a non-volatile semiconductor memory device that comprises a pattern forming step in which by using a first mask layer and a second mask layer formed in a common lithography step as masks, a pattern is formed from a second layer, a third layer, a fourth layer, a sixth layer and a protection layer in a laminated substrate having, in a memory cell area, a sequential lamination of a first layer for forming a first insulating layer, the second layer for forming a floating gate, the third layer for forming an intergate insulating layer, the fourth layer for forming a control gate and a first mask layer, and having, in a logic area, a sequential lamination of a fifth layer for forming a second insulating layer, the sixth layer for forming a logic gate, the protection layer for protecting the sixth layer at the time of forming the control gate and a second mask layer.

Abstract: A central processing unit determines whether speech separately uttered as a single syllable is included in input speech. On the basis of the determination result, an output unit is used to notify the user of information prompting the user to input speech again.

Abstract: An apparatus and method to successively extract a proper speech zone from speech inputted in such a fashion that noise is mixed in a speech to be recognized, and to remove noise from the detected speech zone. To this end, a noise position is estimated from an input waveform, a speech zone is detected from a speech inputted subsequently by using power information of speech at the estimated noise position, and noise is removed from the speech in the detected speech zone by using spectrum information of the speech at the estimated noise position. Further, the estimated noise zone is updated as appropriate by using a result of comparison between the power information of the input speech and the power information of the speech in the estimated noise zone so that the noise position is always properly estimated.

Abstract: In a semiconductor device, a plurality of transistor elements, each of which is formed by a channel region, a source region, and a drain region, are provided on a substrate, this semiconductor device further having a first element separation region that is made of insulating material and formed by a foot that protrudes form the substrate surface between the transistor elements of a pair of neighboring transistors (6) and (6′) or (6′) and (6″) toward the inside of the substrate and a wing that is connected to the foot (7), and that extends so as to cover the top of either the drain region or the source regions of each of the neighboring transistor elements (6) and (6′).

Abstract: A semiconductor memory device includes a floating gate, a control gate, source and drain regions, a lightly doped region of the second conductivity type, and a silicide layer. The floating gate is formed on a semiconductor substrate of the first conductivity type via a gate insulating film. The control gate is formed on the floating gate via an insulating film. The source and drain regions are formed by diffusing an impurity of the second conductivity type in the surface of the semiconductor substrate on the two sides of the floating gate. The lightly doped region is formed with a surface exposed at a position distant from the floating gate in at least the source region. The lightly doped region has an impurity dose lower than that of the source region. The silicide layer is formed on the exposed surface of the lightly doped region.

Abstract: In order to achieve effective reduction of memory cell area in a contactless type non-volatile memory, the main bit lines ran zigzag in the column direction connecting the buried local bit lines in two adjacent columns of memory cell blocks alternately. This permits the number of main bit lines to be half, thereby reducing the pitch of the main bit lines with the result of reducing the memory cell area.