Patents by Inventor Kenji Fukuda

Kenji Fukuda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10600921
    Abstract: In forming an ohmic electrode on a back surface of an n-type SiC substrate, an n+-type semiconductor region is formed in a surface layer of the back surface of an n-type epitaxial substrate by ion implantation. In this ion implantation, the impurity concentration of the n+-type semiconductor region is a predetermined range and preferably a predetermined value or less, and an n-type impurity is implanted by acceleration energy of a predetermined range such that the n+-type semiconductor region has a predetermined thickness or less. Thereafter, a nickel layer and a titanium layer are sequentially formed on the surface of the n+-type semiconductor region, the nickel layer is heat treated to form a silicide, and the ohmic electrode formed from nickel silicide is formed. In this manner, a back surface electrode that has favorable properties can be formed while peeling of the back surface electrode can be suppressed.
    Type: Grant
    Filed: May 11, 2016
    Date of Patent: March 24, 2020
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Naoyuki Ohse, Fumikazu Imai, Tsunehiro Nakajima, Kenji Fukuda, Shinsuke Harada, Mitsuo Okamoto
  • Publication number: 20190372287
    Abstract: A rotary structural body includes a rotation body that rotates in cooperation with a rotation shaft. The rotation body includes an engaging portion engaged with an engaged portion arranged on one of the rotation shaft and a transmission member that transmits rotation of the rotation shaft to the rotation body. The rotary structural body further includes a detector that detects a rotation angle of the rotation shaft in accordance with rotation of the rotation body and a support arranged on the engaged portion to extend across a circumferential gap between the engaged portion and the engaging portion.
    Type: Application
    Filed: May 24, 2019
    Publication date: December 5, 2019
    Inventors: Yuta Yamanishi, Kenji Fukuda
  • Publication number: 20190369313
    Abstract: A heat-ray shielding particle dispersing liquid includes heat-ray shielding particles at least containing composite tungsten oxide particles and indium tin oxide particles, the weight ratio of the composite tungsten oxide particles and the indium tin oxide particles in the heat-ray shielding particles being within a range of “composite tungsten oxide particles”/“indium tin oxide particles”=99/1 to 22/78; and a liquid medium.
    Type: Application
    Filed: August 16, 2019
    Publication date: December 5, 2019
    Inventors: Kenji Fukuda, Yukihiro Koyama
  • Patent number: 10486982
    Abstract: ATO infrared absorbing fine particles having high coloring property (high light absorption property) which has both excellent dispersibility and solar radiation shielding properties and can reduce a use amount of ATO infrared ray absorbing fine particles can be provided, wherein crystal lattice constant a is 4.736 ? or more and 4.743 or less, crystal lattice constant c is 3.187 ? or more and 3.192 ? or less, and a crystallite size is 5.5 nm or more and 10.0 nm or less, which are analyzed by an X-ray diffraction measurement result.
    Type: Grant
    Filed: September 20, 2016
    Date of Patent: November 26, 2019
    Assignee: SUMITOMO METAL MINING CO., LTD.
    Inventors: Hirofumi Tsunematsu, Kenji Fukuda, Kenichi Fujita
  • Patent number: 10453952
    Abstract: The second conductivity type thin film includes: a high-concentration layer having a first impurity concentration; a first electric field relaxing layer continuous to the high-concentration layer at an outer circumference of the high-concentration layer, the first electric field relaxing layer having a second impurity concentration lower than the first impurity concentration; a second electric field relaxing layer continuous to the first electric field relaxing layer at an outer circumference of the first electric field relaxing layer, the second electric field relaxing layer having a third impurity concentration lower than the second impurity concentration; and a first electric field diffusion layer continuous to the second electric field relaxing layer at an outer circumference of the second electric field relaxing layer, the first electric field diffusion layer having a fourth impurity concentration lower than the third impurity concentration.
    Type: Grant
    Filed: September 8, 2016
    Date of Patent: October 22, 2019
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Hiromu Shiomi, Hidenori Kitai, Hideto Tamaso, Kenji Fukuda
  • Patent number: 10424642
    Abstract: The current diffusion layer is interposed between the divided portions of the first base region. The second base region is provided adjacent to both sides of the trench current diffusion layer. The body region is provided on the trench current diffusion layer and the second base region. The source region is provided on the body region. The trench is provided to extend from a surface of the source region to the trench current diffusion layer through the source region and the body region. The trench has a bottom surface that is separated from and overlaps with the center portion of the first base region in a perpendicular direction. A width of the center portion in a horizontal direction is larger than a width of the bottom surface of the trench.
    Type: Grant
    Filed: September 8, 2016
    Date of Patent: September 24, 2019
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Hiromu Shiomi, Hidenori Kitai, Kenji Fukuda, Hideto Tamaso
  • Publication number: 20190241438
    Abstract: One object of the present invention is to provide a method for producing stable isotope labeled carbon monoxide capable of controlling the abundance ratio of a specific kind of the stable oxygen isotope to be an arbitrary value, the present invention provides a method for producing stable isotope labeled carbon monoxide including: a first mixing step in which carbon monoxide selectively containing at least one kind of stable isotope selected from the group consisting of 12C16O, 12C17O, 12C18O, 13C16O, 13C17O, and 13C18O, and water vapor selectively containing at least one kind of stable isotope selected form the group consisting of H216O, H217O and H218O are mixed to produce stable isotope labeled carbon dioxide: and a second mixing step in which the stable isotope labeled carbon dioxide produced in the first mixing step and hydrogen are mixed.
    Type: Application
    Filed: January 30, 2019
    Publication date: August 8, 2019
    Inventor: Kenji FUKUDA
  • Patent number: 10249497
    Abstract: A silicon carbide semiconductor device includes a silicon carbide semiconductor substrate of a first conductivity type, a gate insulating film provided on a front surface of the silicon carbide semiconductor substrate and including any one or a plurality of an oxide film, a nitride film, and an oxynitride film, and a gate electrode containing poly-silicon and provided on the gate insulating film. A concentration of fluorine in the gate insulating film at an interface with the silicon carbide semiconductor substrate is equal to or higher than 1×1019 atoms/cm3.
    Type: Grant
    Filed: August 30, 2017
    Date of Patent: April 2, 2019
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Tsuyoshi Araoka, Youichi Makifuchi, Takashi Tsutsumi, Mitsuo Okamoto, Kenji Fukuda
  • Publication number: 20190016602
    Abstract: Boride particles represented by a general formula XB, (where X is at least one kind of metal element selected from Y, La, Ce, Pr, Nd, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb, Lu, Sr, Ca, and m is a number indicating an amount of boron in the general formula) are provided, wherein an amount of carbon included in the boride particles is 0.2% by mass or less, as measured by a combustion-infrared absorption method.
    Type: Application
    Filed: December 28, 2016
    Publication date: January 17, 2019
    Inventors: Kenji FUKUDA, Mitsunobu MIRATSU, Hirofumi TSUNEMATSU, Takeshi CHONAN
  • Patent number: 10163637
    Abstract: A silicon carbide semiconductor device, including a silicon carbide semiconductor substrate, and an insulating film formed on a front surface of the silicon carbide semiconductor substrate. The silicon carbide semiconductor substrate has fluorine implanted therein, a concentration of which is in a range of 2×1017/cm3 to 4×1018/cm3. A method of manufacturing the silicon carbide semiconductor device includes providing a silicon carbide semiconductor substrate, forming an oxide film on a front surface of the silicon carbide semiconductor substrate, removing a portion of the oxide film to expose the silicon carbide semiconductor substrate, implanting fluorine ions in the front surface of the silicon carbide semiconductor substrate through the removed portion of the oxide film, removing the oxide film after the fluorine ions are implanted, and forming an insulating film on the front surface of the silicon carbide semiconductor substrate after the oxide film is removed.
    Type: Grant
    Filed: August 30, 2017
    Date of Patent: December 25, 2018
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Tsuyoshi Araoka, Youichi Makifuchi, Masaki Miyazato, Takashi Tsutsumi, Mitsuo Okamoto, Kenji Fukuda
  • Publication number: 20180331209
    Abstract: The current diffusion layer is interposed between the divided portions of the first base region. The second base region is provided adjacent to both sides of the trench current diffusion layer. The body region is provided on the trench current diffusion layer and the second base region. The source region is provided on the body region. The trench is provided to extend from a surface of the source region to the trench current diffusion layer through the source region and the body region. The trench has a bottom surface that is separated from and overlaps with the center portion of the first base region in a perpendicular direction. A width of the center portion in a horizontal direction is larger than a width of the bottom surface of the trench.
    Type: Application
    Filed: September 8, 2016
    Publication date: November 15, 2018
    Applicant: Sumitomo Electric Industries, Ltd.
    Inventors: Hiromu Shiomi, Hidenori Kitai, Kenji Fukuda, Hideto Tamaso
  • Publication number: 20180315813
    Abstract: The second conductivity type thin film includes: a high-concentration layer having a first impurity concentration; a first electric field relaxing layer continuous to the high-concentration layer at an outer circumference of the high-concentration layer, the first electric field relaxing layer having a second impurity concentration lower than the first impurity concentration; a second electric field relaxing layer continuous to the first electric field relaxing layer at an outer circumference of the first electric field relaxing layer, the second electric field relaxing layer having a third impurity concentration lower than the second impurity concentration; and a first electric field diffusion layer continuous to the second electric field relaxing layer at an outer circumference of the second electric field relaxing layer, the first electric field diffusion layer having a fourth impurity concentration lower than the third impurity concentration.
    Type: Application
    Filed: September 8, 2016
    Publication date: November 1, 2018
    Inventors: Hiromu Shiomi, Hidenori Kitai, Hideto Tamaso, Kenji Fukuda
  • Patent number: 10103059
    Abstract: A method of manufacturing a silicon carbide semiconductor device includes forming on a front surface of a silicon carbide substrate of a first conductivity type, a silicon carbide layer of the first conductivity type of a lower concentration; selectively forming a region of a second conductivity type in a surface portion of the silicon carbide layer; selectively forming a source region of the first conductivity type in the region; forming a source electrode electrically connected to the source region; forming a gate insulating film on a surface of the region between the silicon carbide layer and the source region; forming a gate electrode on the gate insulating film; forming a drain electrode on a rear surface of the substrate; forming metal wiring comprising aluminum for the device, the metal wiring being connected to the source electrode; and performing low temperature nitrogen annealing after the metal wiring is formed.
    Type: Grant
    Filed: July 28, 2016
    Date of Patent: October 16, 2018
    Assignees: FUJI ELECTRIC CO., LTD., NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY
    Inventors: Yoshiyuki Sugahara, Takashi Tsutsumi, Youichi Makifuchi, Tsuyoshi Araoka, Kenji Fukuda, Shinsuke Harada, Mitsuo Okamoto
  • Patent number: 10096680
    Abstract: A silicon carbide semiconductor device, including a silicon carbide semiconductor structure, an insulated gate structure including a gate insulating film contacting the silicon carbide semiconductor structure and a gate electrode formed on the gate insulating film, an interlayer insulating film covering the insulated gate structure, a metal layer provided on the interlayer insulating film for absorbing or blocking hydrogen, and a main electrode provided on the metal layer and electrically connected to the silicon carbide semiconductor structure.
    Type: Grant
    Filed: March 24, 2017
    Date of Patent: October 9, 2018
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Naoki Kumagai, Takashi Tsutsumi, Yoshiyuki Sakai, Yasuhiko Oonishi, Takumi Fujimoto, Kenji Fukuda, Shinsuke Harada, Mitsuo Okamoto
  • Publication number: 20180282175
    Abstract: ATO infrared absorbing fine particles having high coloring property (high light absorption property) which has both excellent dispersibility and solar radiation shielding properties and can reduce a use amount of ATO infrared ray absorbing fine particles can be provided, wherein crystal lattice constant a is 4.736 ? or more and 4.743 or less, crystal lattice constant c is 3.187 ? or more and 3.192 ? or less, and a crystallite size is 5.5 nm or more and 10.0 nm or less, which are analyzed by an X-ray diffraction measurement result.
    Type: Application
    Filed: September 20, 2016
    Publication date: October 4, 2018
    Applicant: SUMITOMO METAL MINING CO., LTD.
    Inventors: Hirofumi TSUNEMATSU, Kenji FUKUDA, Kenichi FUJITA
  • Patent number: 10090417
    Abstract: A p-type region, a p? type region, and a p+ type region are selectively disposed in a surface layer of a silicon carbide substrate base. The p-type region and the p? type region are disposed in a breakdown voltage structure portion that surrounds an active region. The p+ type region is disposed in the active region to make up a JBS structure. The p? type region surrounds the p-type region to make up a junction termination structure. A Schottky electrode forms a Schottky junction with an n-type silicon carbide epitaxial layer. The Schottky electrode overhangs an interlayer insulation film covering a portion of the p-type region and this overhanging portion acts as a field plate. The p+ type region has an acceptor concentration greater than or equal to a predetermined concentration and can make a forward surge current larger.
    Type: Grant
    Filed: March 18, 2013
    Date of Patent: October 2, 2018
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Takashi Tsuji, Akimasa Kinoshita, Noriyuki Iwamuro, Kenji Fukuda
  • Patent number: 10035253
    Abstract: A portable work tool includes: a housing; a motor; and a restraining surface. The housing has an outer surface including a covered region that is covered with a soft layer and an uncovered region that is exposed to an outside. The covered region and the uncovered region define a boundary therebetween. The motor is accommodated in the housing. The restraining surface is disposed in proximity to the boundary and protrudes from the covered region.
    Type: Grant
    Filed: January 8, 2014
    Date of Patent: July 31, 2018
    Assignee: Hitachi Koki Co., Ltd.
    Inventors: Hiroto Inagawa, Kenji Fukuda
  • Publication number: 20180208803
    Abstract: An adhesive layer is provided including composite tungsten oxide particles and/or tungsten oxide particles; a dispersant; a metal coupling agent including an amino group; an adhesive agent; and a cross-linking agent.
    Type: Application
    Filed: October 27, 2016
    Publication date: July 26, 2018
    Inventors: Mika OKADA, Hideaki FUKUYAMA, Kenji FUKUDA
  • Publication number: 20180134089
    Abstract: A tire made of rubbery material comprising a tread (1), said tread having a width C measured between two edges (3) of the tread, the tread comprising a tread surface (5) intended to come into contact with the ground. The tread surface (5) comprises two shoulder regions (7a, 7b) surrounding a central region (9), at least one of the two shoulder regions (7a, 7b) comprising a plurality of successive cutouts (11a, 11b) in a circumferential direction (X). All or some of the cutouts (11a, 11b) of the plurality of cutouts extend obliquely, each cutout having two ends (13a, 13b), and when a cutout (11a) reaches one of its ends (13b), another cutout (11b) starts out at the same circumferential level (N) in the shoulder region (7a).
    Type: Application
    Filed: May 4, 2016
    Publication date: May 17, 2018
    Applicant: Compagnie Generale Des Etablissements Michelin
    Inventors: Benoit DURAND-GASSELIN, Kenji FUKUDA, Kazunori INABA
  • Publication number: 20180138288
    Abstract: A silicon carbide semiconductor element includes n-type silicon carbide epitaxial layers formed on an n+-type silicon carbide semiconductor substrate, plural p base layers selectively formed in surfaces of the silicon carbide epitaxial layers, a p-type silicon carbide epitaxial layer formed in the silicon carbide epitaxial layer, and a trench penetrating at least the silicon carbide epitaxial layer. The silicon carbide semiconductor element also includes, in a portion of the silicon carbide epitaxial layer, a mesa portion exposing the p base layer. The silicon carbide semiconductor element further includes, between consecutive mesa side faces of the mesa portion, a flat portion substantially parallel to the silicon carbide substrate. The remaining thickness of the exposed p base layer is larger than 0.5 ?m and smaller than 1.0 ?m.
    Type: Application
    Filed: October 30, 2017
    Publication date: May 17, 2018
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventors: Makoto UTSUMI, Yasuhiko OONISHI, Kenji FUKUDA, Shinsuke HARADA, Masanobu IWAYA