Abstract: A silicon carbide semiconductor device, including a silicon carbide semiconductor substrate, and an insulating film formed on a front surface of the silicon carbide semiconductor substrate. The silicon carbide semiconductor substrate has fluorine implanted therein, a concentration of which is in a range of 2×1017/cm3 to 4×1018/cm3. A method of manufacturing the silicon carbide semiconductor device includes providing a silicon carbide semiconductor substrate, forming an oxide film on a front surface of the silicon carbide semiconductor substrate, removing a portion of the oxide film to expose the silicon carbide semiconductor substrate, implanting fluorine ions in the front surface of the silicon carbide semiconductor substrate through the removed portion of the oxide film, removing the oxide film after the fluorine ions are implanted, and forming an insulating film on the front surface of the silicon carbide semiconductor substrate after the oxide film is removed.

Abstract: A silicon carbide semiconductor device includes a silicon carbide semiconductor substrate of a first conductivity type, a gate insulating film provided on a front surface of the silicon carbide semiconductor substrate and including any one or a plurality of an oxide film, a nitride film, and an oxynitride film, and a gate electrode containing poly-silicon and provided on the gate insulating film. A concentration of fluorine in the gate insulating film at an interface with the silicon carbide semiconductor substrate is equal to or higher than 1×1019 atoms/cm3.

Abstract: An infrared ray absorbing film is selectively formed on a surface of a silicon carbide semiconductor substrate in a predetermined area. The infrared ray absorbing film is composed of one of a multi-layered film of titanium nitride and titanium, a multi-layered film of molybdenum nitride and molybdenum, a multi-layered film of tungsten nitride and tungsten, or a multi-layered film of chromium nitride and chromium. An aluminum film and a nickel film are sequentially formed in this order on the silicon carbide semiconductor substrate in an area excluding the predetermined area in which the infrared ray absorbing film is formed. The silicon carbide semiconductor substrate is thereafter heated using a rapid annealing process with a predetermined heating rate to form an electrode. The rapid annealing process converts the nickel film into a silicide and, with the aluminum film, provides an electrode having ohmic contact.

Abstract: On a silicon carbide semiconductor substrate, heat treatment is performed after one layer or two or more layers of an oxide film, a nitride film, or an oxynitride film are formed as a gate insulating film. The heat treatment after the gate insulating film is formed is performed for a given period in an atmosphere that includes H2 and H2O without including O2. As a result, hydrogen or hydroxyl groups can be segregated in a limited region that includes the interface of the silicon carbide substrate and the gate insulating film. The width of the region to which the hydrogen or hydroxyl groups is segregated is from 0.5 nm to 10 nm. In such a manner, the interface state density can be lowered and high channel mobility can be realized.

Abstract: Provided is an individual identification device including: a biometric information storage unit; a biometric information acquisition unit; an identification unit which calculates a similarity of the biometric information on the subject and the registrant and performs identification of the subject according to whether or not the calculated similarity is equal to or higher than an identification threshold; an identification result storage unit which stores identification result information constituted by the calculated similarity and a correct identification result; and a threshold setting unit which sets the identification threshold such that at least either one of a false rejection rate and a false acceptance rate fulfils a predetermined condition in the identification result information stored in the identification result storage unit.

Abstract: A heat-ray shielding particle dispersing liquid includes heat-ray shielding particles at least containing composite tungsten oxide particles and indium tin oxide particles, the weight ratio of the composite tungsten oxide particles and the indium tin oxide particles in the heat-ray shielding particles being within a range of “composite tungsten oxide particles”/“indium tin oxide particles”=99/1 to 22/78; and a liquid medium.

Abstract: A P+ type region, a p-type region, and a P? type region are disposed in a surface layer of a silicon carbide substrate base and are disposed in a breakdown voltage structure portion surrounding an active region to make up an element structure of Schottky junction. The p? type region surrounds the P+ type region and the p-type region to form a junction termination structure. A Schottky electrode forms a Schottky junction with an n-type silicon carbide epitaxial layer. The Schottky electrode and an electrode pad have end portions positioned on the P+ type region and the end portion of the Schottky electrode is exposed from the end portion of the electrode pad. As a result, the region of the breakdown voltage structure portion can be made smaller while the active region can be made larger, and a semiconductor device is easily fabricated.

Abstract: Process (A) of preparing a silicon carbide substrate of a first conductivity type; process (B) of forming an epitaxial layer of the first conductivity type on one principal surface of the silicon carbide substrate; process (C) of forming on another principal surface of the silicon carbide substrate, a first metal layer; process (D) of heat treating the silicon carbide substrate after the process (C) to form an ohmic junction between the first metal layer and the other principal surface of the silicon carbide substrate, and a layer of a substance (10) highly cohesive with another metal on the first metal layer; and a process (E) of removing impurities and cleaning a surface of the first metal layer (8) on the other principal surface of the silicon carbide substrate (D), are performed. The heat treatment at process (D) is executed at a temperature of 1,100 degrees C. or more.

Abstract: In a fabrication method of a silicon carbide semiconductor element including a drift layer playing a role of retaining a high withstand voltage on a front side of a semiconductor substrate of silicon carbide and including an ohmic electrode on a backside, dicing is added to form at least one dicing line in an element active region on a surface of the semiconductor substrate on a side opposite of the drift layer before forming the ohmic electrode on the backside of the semiconductor substrate. Thus, a silicon carbide semiconductor element and fabrication method thereof is provided such that even if the semiconductor substrate is made thinner to reduce the on-resistance, the strength of the substrate can be maintained and cracking of the wafer during wafer processing can be reduced.

Abstract: A silicon carbide semiconductor device, including a silicon carbide semiconductor structure, an insulated gate structure including a gate insulating film contacting the silicon carbide semiconductor structure and a gate electrode formed on the gate insulating film, an interlayer insulating film covering the insulated gate structure, a metal layer provided on the interlayer insulating film for absorbing or blocking hydrogen, and a main electrode provided on the metal layer and electrically connected to the silicon carbide semiconductor structure.

Abstract: A method of manufacturing a silicon carbide semiconductor device includes forming on a front surface of a silicon carbide substrate of a first conductivity type, a silicon carbide layer of the first conductivity type of a lower concentration; selectively forming a region of a second conductivity type in a surface portion of the silicon carbide layer; selectively forming a source region of the first conductivity type in the region; forming a source electrode electrically connected to the source region; forming a gate insulating film on a surface of the region between the silicon carbide layer and the source region; forming a gate electrode on the gate insulating film; forming a drain electrode on a rear surface of the substrate; forming metal wiring comprising aluminum for the device, the metal wiring being connected to the source electrode; and performing low temperature nitrogen annealing after the metal wiring is formed.

Abstract: A silicon carbide vertical MOSFET having low ON-resistance and high blocking voltage is provided. For this, a first deposition film (2) of low concentration silicon carbide of a first conductivity type is formed on the surface of a high concentration silicon carbide substrate (1) of a first conductivity type. Formed on the first deposition film (2) is a second deposition film (31) that comprises a high concentration gate region of a second conductivity type, with a first region removed selectively. A third deposition film (32) formed on the second deposition film, which comprises a second region that is wider than the selectively removed first region, a high concentration source region (5) of a first conductivity type and a low concentration gate region (11) of a second conductivity type. A low concentration base region (4) of a first conductivity type is formed in contact with the first deposition film (2) in the first and second regions.

Abstract: Provided is an individual identification device including: a biometric information storage unit; a biometric information acquisition unit; an identification unit which calculates a similarity of the biometric information on the subject and the registrant and performs identification of the subject according to whether or not the calculated similarity is equal to or higher than an identification threshold; an identification result storage unit which stores identification result information constituted by the calculated similarity and a correct identification result; and a threshold setting unit which sets the identification threshold such that at least either one of a false rejection rate and a false acceptance rate fulfils a predetermined condition in the identification result information stored in the identification result storage unit.

Abstract: In forming an ohmic electrode on a back surface of an n-type SiC substrate, an n+-type semiconductor region is formed in a surface layer of the back surface of an n-type epitaxial substrate by ion implantation. In this ion implantation, the impurity concentration of the n+-type semiconductor region is a predetermined range and preferably a predetermined value or less, and an n-type impurity is implanted by acceleration energy of a predetermined range such that the n+-type semiconductor region has a predetermined thickness or less. Thereafter, a nickel layer and a titanium layer are sequentially formed on the surface of the n+-type semiconductor region, the nickel layer is heat treated to form a silicide, and the ohmic electrode formed from nickel silicide is formed. In this manner, a back surface electrode that has favorable properties can be formed while peeling of the back surface electrode can be suppressed.

Abstract: P+ type regions and a p-type region are selectively disposed in a surface layer of a silicon carbide substrate base. The P+ type region is disposed in a breakdown voltage structure portion surrounding an active region. The P+ type region is disposed in the active region to make up a JBS structure. The p-type region surrounds the P+ type region to make up a junction termination (JTE) structure. A Schottky electrode forms a Schottky junction with an n-type silicon carbide epitaxial layer. The Schottky electrode overhangs an interlayer insulation film covering a portion of the P+ type region and the p-type region and this overhanging portion acts as a field plate. This enables the provision of a semiconductor device configured by using a wide band gap semiconductor capable of maintaining a high breakdown voltage with high reliability, and a method of fabricating thereof.

Abstract: An infrared ray absorbing film is selectively formed on a surface of a silicon carbide semiconductor substrate in a predetermined area. An aluminum film and a nickel film are sequentially formed in this order on the silicon carbide semiconductor substrate in an area excluding the predetermined area in which the infrared ray absorbing film is formed. The silicon carbide semiconductor substrate is thereafter heated using a rapid annealing process with a predetermined heating rate to form an electrode. The rapid annealing process converts the nickel film into a silicide and, with the aluminum film, provides an electrode having ohmic contact.

Abstract: On a silicon carbide semiconductor substrate, heat treatment is performed after one layer or two or more layers of an oxide film, a nitride film, or an oxynitride film are formed as a gate insulating film. The heat treatment after the gate insulating film is formed is performed for a given period in an atmosphere that includes H2 and H2O without including O2. As a result, hydrogen or hydroxyl groups can be segregated in a limited region that includes the interface of the silicon carbide substrate and the gate insulating film. The width of the region to which the hydrogen or hydroxyl groups is segregated is from 0.5 nm to 10 nm. In such a manner, the interface state density can be lowered and high channel mobility can be realized.

Abstract: An ohmic electrode (6) of a silicon carbide semiconductor apparatus is fabricated by forming an ohmic metal film on a silicon carbide substrate (1) by sputtering a target including a mixture or an alloy having therein nickel, and a metal(s) reducing the magnetic permeability of nickel and producing a carbide, where compositional ratios of the mixture or alloy are adjusted to predetermined compositional ratios, and by executing heat treatment for the ohmic metal film to calcinate the ohmic metal film. Thus, the ohmic electrode (6) that is for the silicon carbide semiconductor apparatus and capable of improving the use efficiency of the target can be manufactured, whose film thickness is even and that does not peel off.

Abstract: An Ni2Si layer and a TiC layer formed by sintering after deposition of a thin layer including Ni and a thin layer including Ti on a silicon carbide substrate have a structure in which the TiC layer is precipitated on a surface of the Ni2Si layer. A multilayer thin film including a Ti layer as a first thin film and an Ni layer as a second thin film is formed on the TiC layer surface in the structure. A TiC-derived C composition ratio is set to 15% or more at an interface between the TiC layer and the Ti layer of the multilayer thin film. As a result, a silicon carbide semiconductor element can be provided without occurrence of peeling after wafer dicing and subsequent picking up by a dicing tape.