Abstract: An ultrasonic transmitting/receiving circuit equipped with: a semiconductor circuit element which comprises at least three terminals including a first terminal connected to a plurality of transducer elements that constitute an ultrasonic probe, a second terminal connected to a transmission signal generating circuit, and a third terminal serving as an output terminal of an amplifier of a reception signal from the transducer element, and which has a function of amplifying a signal inputted from one terminal by the other terminal and outputting the amplified signal between at least two terminals among the above-said three terminals; and a control unit which performs control so as to cause the semiconductor circuit element to perform a first function of functioning as a switch for inputting a transmission signal to the transducer element and a second function of amplifying the reception signal received from the transducer element.

Abstract: In order to simplify a manufacturing process and reduce cost and power consumption by providing an ultrasonic diagnostic apparatus including a carrier signal generating circuit excellent in IC implementation, a carrier signal generating circuit for generating an output voltage Vo applied to an ultrasonic probe 41 includes cascaded source follower type NMOSFETs 11 to 14, a variable current source 31, and a constant current source for biasing 32. The probe 41 can be made to generate the output voltage Vo with arbitrary amplitude by controlling a gate voltage V4 by controlling the output current value of the variable current source 31. In addition, a voltage applied to each NMOSFET can be divided by connecting the NMOSFETs 11 to 14 in a multi-stage manner. Accordingly, the withstand voltage of the NMOSFET may be low.

Abstract: An ultrasonic diagnostic apparatus characterized by comprising, a probe which has a transducer and which transmits and receives ultrasonic waves, an ultrasonic diagnostic apparatus main body; and a cable through which signals are transmitted and received between the ultrasonic diagnostic apparatus main body and the probe, wherein the probe includes a transmission signal generator that generates an ultrasonic transmission signal, a transmission circuit that amplifies the generated transmission signal, and a transmission phasing circuit that adjusts the timing of the transmission signal.

Abstract: The present invention provides an ultrasonic probe contains at least one reception preamplifier that is provided per transducer element and connected to the transducer at an input side thereof and to a cable at an output side thereof, a transmission bypass unit that is connected between the cable and the transducer, blocks off a reception signal and allows a transmission signal to pass therethrough, and a floating unit that is connected between a power supply terminal of the preamplifier and a driving power source and increases impedance thereof for a high-voltage transmission signal, whereby a bias potential of the preamplifier is electrically set to a floating state and returned to an original bias potential by a reception time.

Abstract: An ultrasonic diagnostic apparatus characterized by comprising, a probe which has a transducer and which transmits and receives ultrasonic waves, an ultrasonic diagnostic apparatus main body; and a cable through which signals are transmitted and received between the ultrasonic diagnostic apparatus main body and the probe, wherein the probe includes a transmission signal generator that generates an ultrasonic transmission signal, a transmission circuit that amplifies the generated transmission signal, and a transmission phasing circuit that adjusts the timing of the transmission signal.

Abstract: An ultrasonic transmitting/receiving circuit equipped with: a semiconductor circuit element which comprises at least three terminals including a first terminal connected to a plurality of transducer elements that constitute an ultrasonic probe, a second terminal connected to a transmission signal generating circuit, and a third terminal serving as an output terminal of an amplifier of a reception signal from the transducer element, and which has a function of amplifying a signal inputted from one terminal by the other terminal and outputting the amplified signal between at least two terminals among the above-said three terminals; and a control unit which performs control so as to cause the semiconductor circuit element to perform a first function of functioning as a switch for inputting a transmission signal to the transducer element and a second function of amplifying the reception signal received from the transducer element.

Abstract: The present invention provides an ultrasonic probe contains at least one reception preamplifier that is provided per transducer element and connected to the transducer at an input side thereof and to a cable at an output side thereof, a transmission bypass unit that is connected between the cable and the transducer, blocks off a reception signal and allows a transmission signal to pass therethrough, and a floating unit that is connected between a power supply terminal of the preamplifier and a driving power source and increases impedance thereof for a high-voltage transmission signal, whereby a bias potential of the preamplifier is electrically set to a floating state and returned to an original bias potential by a reception time.

Abstract: In order to provide an ultrasonic diagnostic apparatus with a transceiver circuit configuration which has a small number of components and is suitable for miniaturization, an amplifier circuit used for both transmission and reception which can be built in an ultrasonic probe and has a function of adding currents of received signals from plural elements is provided in the ultrasonic diagnostic apparatus. In addition, an analog matrix switch (402) for arbitrarily adding received signals from plural transducers is provided. That is, a transmitted and received signal amplifier circuit is shared by using a transceiver circuit section, which is formed by an FET element serving as a source follower circuit, as a gate-grounded amplifier during a signal reception period. The received signals from the transducers which have been amplified by FET elements can be added for each group of arbitrary elements by the matrix current switch (402) formed by plural FET elements corresponding to the respective transducers.

Abstract: In order to simplify a manufacturing process and reduce cost and power consumption by providing an ultrasonic diagnostic apparatus including a carrier signal generating circuit excellent in IC implementation, a carrier signal generating circuit for generating an output voltage Vo applied to an ultrasonic probe 41 includes cascaded source follower type NMOSFETs 11 to 14, a variable current source 31, and a constant current source for biasing 32. The probe 41 can be made to generate the output voltage Vo with arbitrary amplitude by controlling a gate voltage V4 by controlling the output current value of the variable current source 31. In addition, a voltage applied to each NMOSFET can be divided by connecting the NMOSFETs 11 to 14 in a multi-stage manner. Accordingly, the withstand voltage of the NMOSFET may be low.

Abstract: In order to rapidly control the gains of a plurality of variable gain amplifiers VGAs, each of gain control circuits is configured to determine a gain to be set therein, based on gain control information received from other gain control circuits existing in its preceding stage or stages and the signal level detected by a level detector circuit connected thereto. By carrying out such gain control, a total application gain is stabilized more quickly by gain control. Therefore, even in receiving systems that the preparation period for reception is very short, desired gain control is achieved within this period and stable data reception can be performed.

Abstract: A gain-control method and device that enable high-speed gain switching of cascaded programmable gain amplifiers (PGA) without a high-resolution A/D converter is provided. In one example, the gain-control method for cascaded PGAs detects all the input levels of the PGAs, calculates the optimum gains of the PGAs each on the basis of the detection results, and sets the obtained optimum gains of each of the PGAs at one time, whereby high-speed gain switching becomes possible. The gain-control device for cascaded PGAs that implements this gain-control method includes peak hold circuits that retain the input levels of each of the PGAs, a switch group that sequentially switches outputs of the peak hold circuits, an A/D converter that sequentially detects the outputs from the switch group, and a control and operation device that calculates the optimum gains of the PGAs from the detection results by the A/D converter to set the calculated optimum gains simultaneously to each of the PGAs.

Abstract: A magnetic head driving circuit includes a main driving circuit symmetrical with respect to a centered recording coil, and at least two pairs of adding circuits, each pair including a positive pulse adding circuit and a negative pulse superposed circuit symmetrical with respect to the centered coil. And, by reversing the direction of the magnetic head coil current, at least one of the adding circuits is made to operate and make it as a magnetic head driving circuit for adding a potential equal to or higher than the power supply, thereby to drive as a sub-driving circuit arranged symmetrically with respect to the centered coil, which promotes the reversal of the magnetic head coil current, and which drives stably with a central potential of the coil at about the disk potential.

Abstract: A magnetic head driving circuit includes a main driving circuit symmetrical with respect to a centered recording coil, and at least two pairs of adding circuits, each pair including a positive pulse adding circuit and a negative pulse superposed circuit symmetrical with respect to the centered coil. And, by reversing the direction of the magnetic head coil current, at least one of the adding circuits is made to operate and make it as a magnetic head driving circuit for adding a potential equal to or higher than the power supply, thereby to drive as a sub-driving circuit arranged symmetrically with respect to the centered coil, which promotes the reversal of the magnetic head coil current, and which drives stably with a central potential of the coil at about the disk potential.

Abstract: In order to rapidly control the gains of a plurality of variable gain amplifiers VGAs, each of gain control circuits is configured to determine a gain to be set therein, based on gain control information received from other gain control circuits existing in its preceding stage or stages and the signal level detected by a level detector circuit connected thereto. By carrying out such gain control, a total application gain is stabilized more quickly by gain control. Therefore, even in receiving systems that the preparation period for reception is very short, desired gain control is achieved within this period and stable data reception can be performed.

Abstract: In order to provide a high sensitivity variable gain amplifier, there is provided a structure in which at least one path comprising at least a stage of the voltage-input/voltage-output amplifier+ a stage of voltage-input/current-output amplifier and a path comprising a stage of the voltage-input/current-output amplifier are connected in parallel between the input terminal and output terminal or, a structure in which a plurality of paths each comprising at least a stage of voltage-input/voltage-output amplifier+a stage of voltage-input/current-output amplifier are connected in parallel between the input terminal and output terminal. A gain is switched by selecting and operating any one of paths. When any one path is selected, an input impedance viewed from the input terminal is suppressed almost not to change or an output impedance viewed from the output terminal is suppressed almost not to change. Thereby, a high sensitivity wireless receiver can be realized.

Abstract: An automatic gain adjustment circuit for automatically adjusting the gain and DC output voltage of an amplifier against power supply fluctuations, temperature fluctuations and process variations and the amplifier using the circuit are provided. The gain and the DC output voltage are adjusted by providing a bias circuit for adjusting the operating current or gain of an amplifying element, connecting a load to the output electrode of the amplifying element to form an output terminal, connecting a variable current source for adjusting the operating voltage or DC output voltage of the amplifying element to the output electrode, connecting a gain detection circuit and a DC output voltage detection circuit to the output terminal, and feed backing the respective outputs of the detection circuits to the variable current source. A reference AC signal is inputted for gain adjustment.

Abstract: A gain-control method and device that enable high-speed gain switching of cascaded programmable gain amplifiers (PGA) without a high-resolution A/D converter is provided. In one example, the gain-control method for cascaded PGAs detects all the input levels of the PGAs, calculates the optimum gains of the PGAs each on the basis of the detection results, and sets the obtained optimum gains of each of the PGAs at one time, whereby high-speed gain switching becomes possible. The gain-control device for cascaded PGAs that implements this gain-control method includes peak hold circuits that retain the input levels of each of the PGAs, a switch group that sequentially switches outputs of the peak hold circuits, an A/D converter that sequentially detects the outputs from the switch group, and a control and operation device that calculates the optimum gains of the PGAs from the detection results by the A/D converter to set the calculated optimum gains simultaneously to each of the PGAs.

Abstract: In order to provide a high sensitivity variable gain amplifier, there is provided a structure in which at least one path comprising at least a stage of the voltage-input/voltage-output amplifier+a stage of voltage-input/current-output amplifier and a path comprising a stage of the voltage-input/current-output amplifier are connected in parallel between the input terminal and output terminal or, a structure in which a plurality of paths each comprising at least a stage of voltage-input/voltage-output amplifier+a stage of voltage-input/current-output amplifier are connected in parallel between the input terminal and output terminal. A gain is switched by selecting and operating any one of paths. When any one path is selected, an input impedance viewed from the input terminal is suppressed almost not to change or an output impedance viewed from the output terminal is suppressed almost not to change. Thereby, a high sensitivity wireless receiver can be realized.

Abstract: Provided is an electrostatic discharge protection circuit for protecting from electrostatic destruction an Integrated Circuit (IC) formed from a CMOS material that is capable of handling high frequencies and can withstand low voltage. The electrostatic discharge protection circuit has NMOS transistors, which are diode-connected transistors oriented in opposite directions, connected in parallel between a ground line and a line connecting an input terminal of the IC and the gate of an NMOS transistor included in an amplifier. The electrostatic discharge protection circuit is highly resistive to a surge voltage without impairment by high-frequency characteristics including noise and signal loss. The size of the IC need not be significantly increased to incorporate the new electrostatic discharge protection circuit, which is also highly cost effective since it requires fewer manufacturing steps to produce.

Abstract: An automatic gain adjustment circuit for automatically adjusting the gain and DC output voltage of an amplifier against power supply fluctuations, temperature fluctuations and process variations and the amplifier using the circuit are provided. The gain and the DC output voltage are adjusted by providing a bias circuit for adjusting the operating current or gain of an amplifying element, connecting a load to the output electrode of the amplifying element to form an output terminal, connecting a variable current source for adjusting the operating voltage or DC output voltage of the amplifying element to the output electrode, connecting a gain detection circuit and a DC output voltage detection circuit to the output terminal, and feed backing the respective outputs of the detection circuits to the variable current source. A reference AC signal is inputted for gain adjustment.