Abstract: A photo semiconductor integrated circuit device has a photodiode portion and amplifier portion, each portion having a buried layer. The impurity concentration and/or depth of the buried layer for the photodiode portion is lower than that of the buried layer for the amplifier portion. As a result, the frequency band width is widened.

Abstract: In a DA converter wherein an analog output voltage is formed in such a way that constant currents formed by a plurality of constant-current source transistors are selectively fed to a load resistor by controlling switching means to turn ON and OFF in correspondence with input signals; each of the constant-current source transistors is operated in an operating range from a saturation region to a non-saturation region as the output voltage enlarges in its absolute value, and those of the plurality of constant-current source transistors whose currents based on the operations in the non-saturation regions are selected by the switching means have their sizes enlarged so as to compensate for current decrements ascribable to such operations in the non-saturation regions.

Abstract: A magnetic head driving circuit includes a main driving circuit symmetrical with respect to a centered recording coil, and at least two pairs of adding circuits, each pair including a positive pulse adding circuit and a negative pulse superposed circuit symmetrical with respect to the centered coil. And, by reversing the direction of the magnetic head coil current, at least one of the adding circuits is made to operate and make it as a magnetic head driving circuit for adding a potential equal to or higher than the power supply, thereby to drive as a sub-driving circuit arranged symmetrically with respect to the centered coil, which promotes the reversal of the magnetic head coil current, and which drives stably with a central potential of the coil at about the disk potential.

Abstract: Disclosed is an optical information processor having high-speed reading property by improving responsivity and extension of the frequency band width of a photodiode prepared on one identical substrate together with other semiconductor integrated circuit device. To extend the frequency band width, a buried layer of a photodiode portion is deeply implanted or the impurity concentration of the buried layer is lowered. To improve the responsivity, the thickness of the oxide layer of the SOI substrate is selected such that the reflected light is maximized.

Abstract: A radiation detector for use on X-ray CT scanner with a plurality of elements arrayed to form a detector block, which is structured that a plurality of thin-film photodiodes consisting of amorphous silicon each are formed on the back of a scintillator block having a width to cover the plurality of elements, a platelike supporting member provided with signal lines on the back is bonded to cover the photodiodes, the photodiodes and the signal lines are connected together through wire bonding, the scintillator block is divided into each element across separators on the supporting member.

Abstract: This invention relates to a multi-element type radiation detector for an X-ray CT scanner system wherein a plurality of scintillator blocks that are isolated either optically or radiation-wise from one another are arranged integrally, and a photo-diode consisting of an amorphous silicon layer for converting the emission of each scintillator is formed on the surface of each scintillator block by thin film technique.

Abstract: The same analog signal is inputted to an 8-bit AD converter and to a 4-bit AD converter to obtain an 8-bit digital data and a 4-bit digital data for the same sample value of the analog signal. Values of the 8-bit digital data and 4-bit digital data are compared with each other. The 8-bit digital data is outputted as a digital signal for the sample value of the analog signal when a difference between these values is not greater than one-half the quantity that corresponds to the least significant bit of the 4-bit digital data, and the 4-bit digital data is outputted as a digital signal for the sample value of the analog signal in other cases. There is realized AD conversion which operates apparently at high speeds maintaining high accuracy.

Abstract: In a two-step parallel analog to digital converter of the type in which a first flash-type A/D converter determines the upper significant bits of a digital signal output having a desired number of bits and after a quantizing error of the first flash-type A/D converter has been determined from the difference between a value obtained by reconverting the upper significant bits to an analog value and the input analog value a second flash-type A/D converter subjects the quantizing error to A/D conversion to determine a digital output of the remaining lower significant bits, a gain correcting circuit is additionally provided to automatically establish a gain of a D/A converter for reconverting the upper significant bits to an analog value on the basis of a reference voltage applied to the first flash-type A/D converter.

Abstract: A flash type AD converter includes a group of comparators divided into blocks each including 2.sup.N comparators (N=1, 2, ---), each comparing an input signal with one of a plurality of reference signals, each having individually different voltage levels. One of the comparators may correspond to a level change point where the voltage level of the input signal is higher than that of the reference signal of that comparator which then generates a specific output different from those of the remaining comparators. The converter generates a binary-coded output on the basis of the specific output generated from the level change point comparator.

Abstract: A parallel (flashed) type analog-to-digital converter is provided which is fabricated on a single integrated-circuit chip. An input analog voltage is compared with respective reference voltages by a number of comparators. A change position of an output pattern (for example, a thermometer format signal) of the comparators is detected by a number of exclusive OR circuits. The exclusive OR circuits are grouped into several groups, and in each group, the output transistors of respective exclusive OR circuits are connected to separate bit lines. Several sets of separate bit lines are connected to one set of output bit lines through emitter followers or diodes so that parasitic capacitances related to the output transistors are reduced.

Abstract: The present invention provides a DA converter of the type wherein a group of switch circuits are controlled in response to input digital signals and a plurality of constant current sources are driven in response to on and off of the switch circuits to convert the input digital signals into analogue signals, the DA converter comprising a plurality of lineages of digital input circuits for controlling the switch circuits, whereby digital signals inputted to the input circuits are changed over in order for each lineage to DA convert them.

Abstract: In an analog-to-digital converter of a parallel comparison type having a plurality of comparators for comparing an analog input voltage with different reference voltages and converting a comparison result into a digital output by means of an encoder, a plurality of comparators each having a different input dynamic range are used to widen the analog input voltage range up to the power source range of positive and negative voltages.

Abstract: A radiation detector comprises a scintillator capable of emitting light by radiation and a photodetector for detecting the light emitted from the scintillator, the scintillator being composed of a sintered body prepared by sintering rare earth oxysulfide as a body starting material containing a densification additive by hot isostactic pressing. The sintered body has a high light output and a high density.

Abstract: An integral-type small signal input circuit having a Miller integrator is adapted to perform cyclically an integrating operation, a resetting operation and an input offset current compensating operation. An input offset current compensation circuit which forms a feedback circuit of the amplifier in the Miller integrator is arranged to supply a compensation current to the amplifier for canceling the input offset current during the compensating operation and to supply the held compensation current to the amplifier during the integrating operation. During the compensation period, a low-pass filter which blocks sinusoidal noise components in the input signal is connected to the input of the integrator so that the held compensation current is not affected by the noise components.

Abstract: The present invention is characterized that a digital-to-analog converter having ordinal accuracy and one or more current sources are combined and the output currents of the current sources are accurately controlled to have a predetermined relationship with regard to the reference current which is a full-scale value of the analog output current of DAC so that the output current of the current sources designated by bits added to the superior bit of the digital input signal depending on the number of the current sources and the analog output current in response to the digital input signal with the added bits are added to produce an analog signal corresponding to the digital input signal.

Abstract: A digital-to-analog conversion system includes a digital-to-analog converter, a source of at least one set of digital input signals and a signal for error compensation and a digital signal for error detection to the converter, a switch to selectively couple either the one set of digital input signals and the signal for error compensation or the signal for error detection to the converter, a clock to generate a switching signal having a predetermined period and duration which is coupled to control the switch, a distribution switch for selectively coupling the output of the digital-to-analog converter to two different terminals, receiving a control input from the clock, a sample and hold circuit to sample and hold the output of the digital-to-analog converter, a detector for detecting a linearity error in the digital-to-analog converter output signal when the digital signal for error detection is coupled as an input thereto, a memory for storing the output of the detector, a circuit to write the output of the d

Abstract: A D/A conversion system with a compensation circuit comprises a D/A converter for converting a digital input signal into an analog signal and a memory for storing a compensation data used for the compensation of the output of the D/A converter at an address corresponding to the digital input signal. The digital input signal is applied to the D/A converter and a signal corresponding to the digital input signal is applied to the memory. The output of the D/A converter is adjusted on the basis of the compensation data read out from the memory.

Abstract: In a digital-to-analog converter having means to convert a digital input signal into an analog signal, processing means to evaluate an error attendant upon the conversion, and memory means to store the evaluated error; a digital-to-analog converter with a compensating circuit wherein the processing means comprises a ramp voltage generator, a clock pulse generator, and counting means to count clock pulses of the generator and to deliver the error on the basis of the count value of the clock pulses at each time when the ramp voltage exceeds the output of the conversion means.

Abstract: A high-speed low-drift operational amplifier is disclosed in which a coefficient circuit having a voltage gain of more than 1 is formed employing a low frequency operational amplifier with a low-drift characteristic to multiply an input voltage by the voltage gain, the coefficient circuit and a low pass filter are connected in cascade to form a drift compensating circuit, and the inverting and non-inverting input terminals of a wide-band operational amplifier are connected to the input and output terminals of the drift compensating circuit, respectively.

Abstract: An electron beam deflection control system includes a first signal generation circuit which generates a triangular signal varying at a comparatively low speed, a second signal generation circuit which generates a stepped signal varying at a comparatively high speed, and a switching arrangement to change over the first and second signal generation circuits and to drive one of them, whereby the signal from the generation circuit selected by the switching arrangement is used as a deflection signal for an electron beam.