Patents by Inventor Kenneth C. Dyer
Kenneth C. Dyer has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8847139Abstract: Circuits, methods, sub-systems and systems including adaptive analog subtraction for light sensing are described herein. In an embodiment, an analog circuit including a current mirror is configured to replicate a first current to produce a replicated version of the first current, and to subtract the replicated version of the first current from a second current to produce a third current. A mismatch correction circuit is configured to produce an adjustment signal, indicative of a mismatch error associated with the analog circuit, based on a digital version of the third current. This adjustment signal is used to reduce the mismatch error associated with the analog circuit.Type: GrantFiled: August 16, 2011Date of Patent: September 30, 2014Assignee: Intersil Americas LLCInventor: Kenneth C. Dyer
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Patent number: 8848202Abstract: An optical proximity sensor includes a driver, light detector and offset signal generator. The driver selectively drives a light source. The light detector produces an analog detection signal indicative of an intensity of light detected by the light detector. The detected light can include light transmitted by the light source that reflected off an object within the sense region of the optical sensor, interference light and ambient light. The interference light includes light transmitted by the light source, and detected by the light detector, that was not reflected off an object within the sense region of the optical sensor. The offset signal generator selectively produces an analog offset signal that is combined with the analog detection signal produced by the photodetector to produce an analog compensated detection signal. The analog offset signal compensates for at least a portion of the interference light included in the light detected by the photodetector.Type: GrantFiled: January 27, 2012Date of Patent: September 30, 2014Assignee: Intersil Americas LLCInventors: Kenneth C. Dyer, Xijian Lin
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Patent number: 8841934Abstract: Hybrid frequency compensation is provided. Hybrid circuits are used to subtract the transmit signal from the receive signal in a full duplex communication system. Since the hybrid circuit and the main line driver are exposed to different loads, accurate subtraction is difficult to achieve. A frequency dependent network is used to match the loading seen by the driver and the hybrid. The compensation network can be based on active and/or passive components.Type: GrantFiled: February 28, 2012Date of Patent: September 23, 2014Assignee: Vintomie Networks B.V., LLCInventors: Patrick Isakanian, Kenneth C. Dyer
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Patent number: 8787488Abstract: The present invention effectively cancels echo, near-end crosstalk and far-end crosstalk. A FEXT canceller is placed at the transmitter rather than at the receiver according to an aspect of the invention. In some embodiment, a FEXT canceller can be placed at the receiver only or the combination of both ends. The FEXT canceller is continuously adapted with information sent back from a remote receiver and with data from a neighbor transmitter that causes the crosstalk at the remote receiver. This allows the FEXT canceller to quickly adapt to a change in crosstalk function or conditions with the surrounding environment, for example, aging, temperature, humidity, physical pressure, etc. In some embodiments, an adaptation control signal is sent back from the receiver to the transmitter by using an overhead bit in the frame format. In some embodiments, part of the FEXT canceller is built-in at the remote receiver.Type: GrantFiled: August 3, 2009Date of Patent: July 22, 2014Assignee: Vintomie Networks B.V., LLCInventors: Hiroshi Takatori, Kenneth C. Dyer, Mark Callicotte
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Publication number: 20140001588Abstract: Monolithic optical sensor devices, and methods for fabricating such devices, are described herein. In an embodiment, a semiconductor wafer substrate includes a plurality of photodetector (PD) regions. A wafer-level inorganic dielectric optical filter is deposited and thereby formed over at least a subset of the plurality of PD regions. One or more wafer-level organic color filter(s) is/are deposited and thereby formed on one or more selected portion(s) of the wafer-level inorganic dielectric optical filter that is/are over selected ones of the PD regions. For example, an organic red filter, an organic green filter and an organic blue filter can be over, respectively, portions of the wafer-level inorganic dielectric optical filter that are over first, second and third PD regions.Type: ApplicationFiled: June 28, 2012Publication date: January 2, 2014Applicant: INTERSIL AMERICAS LLCInventors: Michael I-Shan Sun, Francois Hebert, Kenneth C. Dyer, Eric S. Lee
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Publication number: 20130208257Abstract: An optical sensor includes a driver, light detector and echo canceller. The driver is adapted to selectively drive a light source. The light detector is adapted to produce a detection signal indicative of an intensity of light detected by the light detector. The echo canceller is adapted to produce an echo cancellation signal that is combined with the detection signal produced by the light detector to produce an echo cancelled detection signal having a predetermined target magnitude (e.g., zero). The echo canceller includes a coefficient generator that is adapted to produce echo cancellation coefficients indicative of distance(s) to one or more objects, if any, within the sense region of the optical sensor. The optical sensor can also include a proximity detector adapted to detect distance(s) to one or more objects within the sense region of the optical sensor based on the echo cancellation coefficients generated by the coefficient generator.Type: ApplicationFiled: June 7, 2012Publication date: August 15, 2013Applicant: INTERSIL AMERICAS INC.Inventor: Kenneth C. Dyer
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Publication number: 20130120761Abstract: An optical proximity sensor includes a driver, light detector and offset signal generator. The driver selectively drives a light source. The light detector produces an analog detection signal indicative of an intensity of light detected by the light detector. The detected light can include light transmitted by the light source that reflected off an object within the sense region of the optical sensor, interference light and ambient light. The interference light includes light transmitted by the light source, and detected by the light detector, that was not reflected off an object within the sense region of the optical sensor. The offset signal generator selectively produces an analog offset signal that is combined with the analog detection signal produced by the photodetector to produce an analog compensated detection signal. The analog offset signal compensates for at least a portion of the interference light included in the light detected by the photodetector.Type: ApplicationFiled: January 27, 2012Publication date: May 16, 2013Applicant: Intersil Americas LLCInventors: Kenneth C. Dyer, Xijian Lin
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Patent number: 8242430Abstract: A system and method for adaptive analog infrared subtraction during ambient light sensing is provided. The system employs a current mirror circuit to perform an analog subtraction of currents (IIR and IIR+AB) obtained from photodiodes. An ADC is employed to digitize the output signal from the current mirror and, the digitized signal is amplitude modulated at a chop frequency utilized by the current mirror. Further, a digital filer is employed to generate an adjustment signal by filtering the modulated signal and the gain of the current mirror is calibrated by employing the adjustment signal. Moreover, as the adjustment signal converges to a value indicative of the mismatch error of the current mirror, the output signal of the current mirror provides an accurate value of ambient light incident on the photodiode.Type: GrantFiled: January 10, 2011Date of Patent: August 14, 2012Assignee: Intersil Americas Inc.Inventor: Kenneth C. Dyer
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Publication number: 20120155342Abstract: Hybrid frequency compensation is provided. Hybrid circuits are used to subtract the transmit signal from the receive signal in a full duplex communication system. Since the hybrid circuit and the main line driver are exposed to different loads, accurate subtraction is difficult to achieve. A frequency dependent network is used to match the loading seen by the driver and the hybrid. The compensation network can be based on active and/or passive components.Type: ApplicationFiled: February 28, 2012Publication date: June 21, 2012Applicant: VIntomie Networks B.V. LLCInventors: Patrick Isakanian, Kenneth C. Dyer
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Patent number: 8134386Abstract: Hybrid frequency compensation is provided. Hybrid circuits are used to subtract the transmit signal from the receive signal in a full duplex communication system. Since the hybrid circuit and the main line driver are exposed to different loads, accurate subtraction is difficult to achieve. A frequency dependent network is used to match the loading seen by the driver and the hybrid. The compensation network can be based on active and/or passive components.Type: GrantFiled: September 24, 2008Date of Patent: March 13, 2012Assignee: Vintomie Networks B.V., LLCInventors: Patrick Isakanian, Kenneth C. Dyer
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Publication number: 20120049048Abstract: A system and method for adaptive analog infrared subtraction during ambient light sensing is provided. The system employs a current mirror circuit to perform an analog subtraction of currents (IIR and IIR?AB) obtained from photodiodes. An ADC is employed to digitize the output signal from the current mirror and, the digitized signal is amplitude modulated at a chop frequency utilized by the current mirror. Further, a digital filer is employed to generate an adjustment signal by filtering the modulated signal and the gain of the current mirror is calibrated by employing the adjustment signal. Moreover, as the adjustment signal converges to a value indicative of the mismatch error of the current mirror, the output signal of the current mirror provides an accurate value of ambient light incident on the photodiode.Type: ApplicationFiled: January 10, 2011Publication date: March 1, 2012Applicant: INTERSIL AMERICAS INC.Inventor: Kenneth C. Dyer
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Publication number: 20120049927Abstract: Circuits, methods, sub-systems and systems including adaptive analog subtraction for light sensing are described herein. In an embodiment, an analog circuit including a current mirror is configured to replicate a first current to produce a replicated version of the first current, and to subtract the replicated version of the first current from a second current to produce a third current. A mismatch correction circuit is configured to produce an adjustment signal, indicative of a mismatch error associated with the analog circuit, based on a digital version of the third current. This adjustment signal is used to reduce the mismatch error associated with the analog circuit.Type: ApplicationFiled: August 16, 2011Publication date: March 1, 2012Applicant: INTERSIL AMERICAS INC.Inventor: Kenneth C. Dyer
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Patent number: 7999708Abstract: A method of phase mismatch correction in high-sample rate time-interleaved analog-to-digital converters (ADC) is provided. An ADC parallel array has an output signal that is processed by a phase-mismatch detector. The detector drives a clock generator control circuit for the ADC array. The clock generator includes a common mode logic (CML) buffer, a CMOS, a non-overlapping generator, a DAC and a decimating low-pass filter. The CML receives a reference clock signal providing source line control (SLC) to the CMOS, the CMOS provides SLC to the DAC that is controlled by the filter which receives a digital control signal from the phase mismatch detector. The DAC provides a corrected timing input to the CMOS that provides the corrected timing signal to the non-overlap generator, where a delay in the clock path is modified and the signal path is unaltered.Type: GrantFiled: December 4, 2009Date of Patent: August 16, 2011Assignee: Vintomie Networks B.V., LLCInventor: Kenneth C. Dyer
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Publication number: 20110193536Abstract: A method of identifying and correcting each of the changes that may occur with wire pairs between the transmitter and receiver in Ethernet 10GBase-T cabling is provided. The method includes four wire pairs A, B, C and D, a polarity swapping and scrambler state machine that determine if the chosen pair matches the requirements for pair A. A slave Tap state machine generates a rule for correct B, C and D patterns based on a pair chosen as pair A. The cables B, C and D are iteratively swapped to rearrange the pair mapping into the polarity swap state machine, and a deskew state machine identifies the latency difference between the different pairs. If the rules are not satisfied, a new pair A is designated at the swapping state machine and the process is repeated until the rules are satisfied.Type: ApplicationFiled: April 14, 2011Publication date: August 11, 2011Applicant: Vintomie Networks B.V., LLCInventor: Kenneth C. Dyer
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Patent number: 7983373Abstract: A 10GBASE-T clocking method that limits EMI and increases SNR, while reducing power and conserving chip space is provided. The method includes simultaneous clocking of transmitters in an analog front end of a 10 gigabit Ethernet. The method includes providing at least two channels to a 10GBase-T analog front end, where the channel has at least a transmitter port and a receiver port, and providing at least two phase interpreters to the analog front end, where each phase interpreter is dedicated to one receiver port. A central clock generator is disposed to distribute a transmit clock to the phase interpreters and to the transmitter ports, where the transmit clock is further provided to the receiver ports from the phase interpreters. Any clock delay between the clock generator and each channel is balanced and clock phases between the channels are matched.Type: GrantFiled: October 19, 2007Date of Patent: July 19, 2011Assignee: Vintomie Networks B.V., LLCInventors: Kenneth C. Dyer, James M. Little
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Patent number: 7952447Abstract: An adaptive electromagnetic interference (EMI) detection and reduction device for multi-port applications is provided. The invention includes at least two physical devices (PHY), where the PHYs transmit data along wire pairs to a register jack (RJ). The transmissions create EMI along the wire pairs, where the transmissions have constructively interfering resonant frequencies having phases and amplitudes. An antenna is disposed proximal to each RJ, where the antennae detect each frequency. A resonating network determines a peak amplitude of each frequency, an envelope detector amplifies each peak amplitude from the resonating network. A discretization circuit converts the amplified peak to discrete amplitude values, where the discretization circuit transmits the discrete amplitude values to a controller.Type: GrantFiled: January 23, 2008Date of Patent: May 31, 2011Assignee: Vintomie Networks B.V., LLCInventors: Kenneth C. Dyer, Harvey Scull
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Publication number: 20100085226Abstract: A method of phase mismatch correction in high-sample rate time-interleaved analog-to-digital converters (ADC) is provided. An ADC parallel array has an output signal that is processed by a phase-mismatch detector. The detector drives a clock generator control circuit for the ADC array. The clock generator includes a common mode logic (CML) buffer, a CMOS, a non-overlapping generator, a DAC and a decimating low-pass filter. The CML receives a reference clock signal providing source line control (SLC) to the CMOS, the CMOS provides SLC to the DAC that is controlled by the filter which receives a digital control signal from the phase mismatch detector. The DAC provides a corrected timing input to the CMOS that provides the corrected timing signal to the non-overlap generator, where a delay in the clock path is modified and the signal path is unaltered.Type: ApplicationFiled: December 4, 2009Publication date: April 8, 2010Inventor: Kenneth C. Dyer
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Patent number: 7629905Abstract: A method of phase mismatch correction in high-sample rate time-interleaved analog-to-digital converters (ADC) is provided. An ADC parallel array has an output signal that is processed by a phase-mismatch detector. The detector drives a clock generator control circuit for the ADC array. The clock generator includes a common mode logic (CML) buffer, a CMOS, a non-overlapping generator, a DAC and a decimating low-pass filter. The CML receives a reference clock signal providing source line control (SLC) to the CMOS, the CMOS provides SLC to the DAC that is controlled by the filter which receives a digital control signal from the phase mismatch detector. The DAC provides a corrected timing input to the CMOS that provides the corrected timing signal to the non-overlap generator, where a delay in the clock path is modified and the signal path is unaltered.Type: GrantFiled: January 16, 2008Date of Patent: December 8, 2009Inventor: Kenneth C. Dyer
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Publication number: 20090290622Abstract: The present invention effectively cancels echo, near-end crosstalk and far-end crosstalk. A FEXT canceller is placed at the transmitter rather than at the receiver according to an aspect of the invention. In some embodiment, a FEXT canceller can be placed at the receiver only or the combination of both ends. The FEXT canceller is continuously adapted with information sent back from a remote receiver and with data from a neighbor transmitter that causes the crosstalk at the remote receiver. This allows the FEXT canceller to quickly adapt to a change in crosstalk function or conditions with the surrounding environment, for example, aging, temperature, humidity, physical pressure, etc. In some embodiments, an adaptation control signal is sent back from the receiver to the transmitter by using an overhead bit in the frame format. In some embodiments, part of the FEXT canceller is built-in at the remote receiver.Type: ApplicationFiled: August 3, 2009Publication date: November 26, 2009Inventors: Hiroshi Takatori, Kenneth C. Dyer, Mark Callicotte
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Publication number: 20090232033Abstract: Hybrid frequency compensation is provided. Hybrid circuits are used to subtract the transmit signal from the receive signal in a full duplex communication system. Since the hybrid circuit and the main line driver are exposed to different loads, accurate subtraction is difficult to achieve. A frequency dependent network is used to match the loading seen by the driver and the hybrid. The compensation network can be based on active and/or passive components.Type: ApplicationFiled: September 24, 2008Publication date: September 17, 2009Inventors: Patrick Isakanian, Kenneth C. Dyer