Patents by Inventor Kenzo Ishida

Kenzo Ishida has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6020561
    Abstract: A printed circuit substrate having solder bumps formed on pad-on-via contacts and pad-off-via contacts. The printed circuit substrate has at least one pad-on-via contact and at least one pad-off-via contact. A first solder bump is on the pad-on-via contact and a second solder bump is on the pad-off-via contact. The first and second solder bumps are substantially the same height as measured above a horizontal plane that is substantially co-planar to the pad-off-via contact.
    Type: Grant
    Filed: November 12, 1996
    Date of Patent: February 1, 2000
    Assignee: Intel Corporation
    Inventors: Kenzo Ishida, Yohko Mashimoto, Kinya Ichikawa
  • Patent number: 5660321
    Abstract: An method for depositing solder onto the pad-on and pad-off via contacts of a substrate is disclosed. In one embodiment the present invention includes positioning a mask having a first opening of a first diameter and a second opening of a second diameter over a substrate having both pad-on and pad-off via contacts. The substrate is positioned over the substrate such that the first opening is positioned over the pad-on via contact and the second opening is positioned over the pad-off via contact. Solder of a first volume and solder of a second volume are deposited onto the pad-on and pad-off via contacts, respectively, by forcing a solder paste through the mask openings. In this manner, solder bumps having a uniform height and volume above the pad-on via contact plane is established after reflowing the deposited solder.
    Type: Grant
    Filed: March 29, 1996
    Date of Patent: August 26, 1997
    Assignee: Intel Corporation
    Inventors: Kenzo Ishida, Yohko Mashimoto, Kinya Ichikawa