Patents by Inventor Kiyoshi Inoue

Kiyoshi Inoue has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20110292727
    Abstract: An electrically alterable non-volatile multi-level memory device and a method of operating such a device, which includes setting a status of at least one of the memory cells to one state selected from a plurality of states including at least first to fourth level states, in response to information to be stored in the one memory cell, and reading the status of the memory cell to determine whether the read out status corresponds to one of the first to fourth level states by utilizing a first reference level set between the second and third level states, a second reference level set between the first and second level states and a third reference level set between the third and fourth level states.
    Type: Application
    Filed: August 10, 2011
    Publication date: December 1, 2011
    Inventors: Kunihiro Katayama, Takayuki Tamura, Kiyoshi Inoue
  • Patent number: 8064257
    Abstract: In response to a read command received by a system interface unit for accessing a plurality of blocks of data stored in said non-volatile semiconductor memory, a controller carries out selective read operations of blocks of data to two memories from the non-volatile semiconductor memory. The controller also carries out parallel operations of data transferring a first block of data, which has already been subjected to error detection and error correction operations by an error correction unit, from one of the two memories to a host system via said system interface unit and of data transferring of a second block of data to be subjected to the error detection and error correction operation, from said non-volatile semiconductor memory to the other of the two memories.
    Type: Grant
    Filed: November 10, 2009
    Date of Patent: November 22, 2011
    Assignee: Solid State Storage Solutions, Inc.
    Inventors: Kunihiro Katayama, Takayuki Tamura, Satoshi Watatani, Kiyoshi Inoue, Shigemasa Shiota, Masashi Naito
  • Publication number: 20110255131
    Abstract: When trial printing is executed in a repeat printing mode, trial printing is performed in size of an image of one piece in a layout in which a plurality of images are supposed to be printed in the repeat printing mode normally. A user who has checked a finished state of the trial printing sets, when the finished state is in a desired state, the recording paper on which the trial printing is performed to the paper feed portion again and executes the repeat printing. Thereby, in a blank space excluding a print image which is printed with a first time trial printing, a scheduled quantity of a plurality of images are repeatedly printed.
    Type: Application
    Filed: April 15, 2011
    Publication date: October 20, 2011
    Applicant: SHARP KABUSHIKI KAISHA
    Inventor: Kiyoshi Inoue
  • Patent number: 8023325
    Abstract: An electrically alterable non-volatile multi-level memory device and a method of operating such a device, which includes setting a status of at least one of the memory cells to one state selected from a plurality of states including at least first to fourth level states, in response to information to be stored in the one memory cell, and reading the status of the memory cell to determine whether the read out status corresponds to one of the first to fourth level states by utilizing a first reference level set between the second and third level states, a second reference level set between the first and second level states and a third reference level set between the third and fourth level states.
    Type: Grant
    Filed: February 1, 2011
    Date of Patent: September 20, 2011
    Assignee: Renesas Technology Corporation
    Inventors: Kunihiro Katayama, Takayuki Tamura, Kiyoshi Inoue
  • Publication number: 20110122701
    Abstract: An electrically alterable non-volatile multi-level memory device and a method of operating such a device, which includes setting a status of at least one of the memory cells to one state selected from a plurality of states including at least first to fourth level states, in response to information to be stored in the one memory cell, and reading the status of the memory cell to determine whether the read out status corresponds to one of the first to fourth level states by utilizing a first reference level set between the second and third level states, a second reference level set between the first and second level states and a third reference level set between the third and fourth level states.
    Type: Application
    Filed: February 1, 2011
    Publication date: May 26, 2011
    Inventors: Kunihiro KATAYAMA, Takayuki Tamura, Kiyoshi Inoue
  • Patent number: 7895857
    Abstract: An indoor unit of an air conditioner wherein a pipe retaining member retaining auxiliary piping connected to a heat exchanger is disposed near both a lateral side and an underside of a mounting frame. The pipe retaining member is bent in an L-shape, and its short plate is exposed on the underside of the mounting frame. The pipe retaining member can be removed only by slightly separating a lower part of the mounting frame from a wall in the fixed state of the indoor unit to the wall. Since the heat exchanger can be separated from the mounting frame without disconnecting the auxiliary piping from communication piping, maintenance work such as washing of the heat exchanger is efficiently performed without requiring much time and effort for separating the auxiliary piping from the communication piping.
    Type: Grant
    Filed: September 9, 2005
    Date of Patent: March 1, 2011
    Assignee: Daikin Industies, Ltd.
    Inventors: Kiyoshi Inoue, Katsuhiro Wakihara, Toshiaki Yamada, Ikuhiro Yamada, Shiro Kashiwa
  • Patent number: 7881111
    Abstract: An electrically alterable non-volatile multi-level memory device and a method of operating such a device, which includes setting a status of at least one of the memory cells to one state selected from a plurality of states including at least first to fourth level states, in response to information to be stored in the one memory cell, and reading the status of the memory cell to determine whether the read out status corresponds to one of the first to fourth level states by utilizing a first reference level set between the second and third level states, a second reference level set between the first and second level states and a third reference level set between the third and fourth level states.
    Type: Grant
    Filed: July 16, 2009
    Date of Patent: February 1, 2011
    Assignee: Renesas Technology Corporation
    Inventors: Kunihiro Katayama, Takayuki Tamura, Kiyoshi Inoue
  • Publication number: 20100177579
    Abstract: In response to a read command received by a system interface unit for accessing a plurality of blocks of data stored in said non-volatile semiconductor memory, a controller carries out selective read operations of blocks of data to two memories from the non-volatile semiconductor memory. The controller also carries out parallel operations of data transferring a first block of data, which has already been subjected to error detection and error correction operations by an error correction unit, from one of the two memories to a host system via said system interface unit and of data transferring of a second block of data to be subjected to the error detection and error correction operation, from said non-volatile semiconductor memory to the other of the two memories.
    Type: Application
    Filed: November 10, 2009
    Publication date: July 15, 2010
    Inventors: Kunihiro Katayama, Takayuki Tamura, Satoshi Watatani, Kiyoshi Inoue, Shigemasa Shiota, Masashi Naito
  • Patent number: 7724249
    Abstract: Terminal equipment for electronically making patent and utility patent applications. The terminal equipment converts various formats of text data generated by an external device into the internal format of the terminal equipment, retrieves the converted text data, merges the text data with a procedure, and transmits the procedure. The merging operation in which image data is merged with text data is simplified whereby the operator can make applications with a simple operation without special skill and knowledge when an application document is transmitted and received on line.
    Type: Grant
    Filed: April 30, 1991
    Date of Patent: May 25, 2010
    Assignee: Fujitsu Limited
    Inventors: Akira Horikawa, Masanori Kawaguchi, Hirotoshi Umemura, Tetsuo Aoki, Atsurou Noguchi, Kouichi Masaki, Akihiko Shigeta, Kiyoshi Ohi, Kiyoshi Inoue, Yasuhiro Tameie, Naruhito Yamamoto, Hiroshi Aihara, Masahiko Senda
  • Patent number: 7694526
    Abstract: A shielding member includes a shielding plate for covering a part of a heat exchanger, heat transfer tube engagement sections for engaging with heat transfer tubes of the heat exchanger, fin engagement portions for engaging with fins of the heat exchanger, a bypass preventing rib for preventing air from being directed to the part of the heat exchanger, and a mismounting preventing portion for preventing the shielding member from being mounted on a heat exchanger that does not require blocking of air flow. The heat exchanger in which the part covered with the shielding member has no heat exchanging function is manufactured with the same components as those of a heat exchanger on which the shielding member is not mounted and the whole of which has a heat exchanging function.
    Type: Grant
    Filed: October 31, 2005
    Date of Patent: April 13, 2010
    Assignee: Daikin Industries, Ltd.
    Inventors: Kiyoshi Inoue, Katsuhiro Wakihara, Naoko Asai, Toshiaki Yamada, Ikuhiro Yamada, Shiro Kashiwa
  • Publication number: 20100062945
    Abstract: An Nb3Sn wire rod having a high Jc value is manufactured using an Ag—Sn alloy. A composite rod including a plurality of Nb core materials incorporated in an Ag—Sn alloy matrix material having an Sn concentration of 9.35 to 22.85 at % is prepared. Next, the composite rod is extruded and/or wire drawn while carrying out process annealing of 350 to 490° C., followed by heat treatment at 500 to 900° C. to produce an Nb3Sn filament. Thus, an Nb3Sn extrafine multi-core superconducting wire is manufactured.
    Type: Application
    Filed: May 31, 2006
    Publication date: March 11, 2010
    Applicant: The University of Tokushima
    Inventor: Kiyoshi Inoue
  • Publication number: 20100014351
    Abstract: An electrically alterable non-volatile multi-level memory device and a method of operating such a device, which includes setting a status of at least one of the memory cells to one state selected from a plurality of states including at least first to fourth level states, in response to information to be stored in the one memory cell, and reading the status of the memory cell to determine whether the read out status corresponds to one of the first to fourth level states by utilizing a first reference level set between the second and third level states, a second reference level set between the first and second level states and a third reference level set between the third and fourth level states.
    Type: Application
    Filed: July 16, 2009
    Publication date: January 21, 2010
    Inventors: Kunihiro KATAYAMA, Takayuki Tamura, Kiyoshi Inoue
  • Patent number: 7623258
    Abstract: An expansion image processing board 6 (expansion information processing module) of the present invention, which is installable in a network printer 2 having an image processing board 5 (information processing module), includes: a second printer function control section 28 (expansion information processing section) which controls the network printer 2; and a router 31 (data relaying section) which relays data to the second printer function control section 28 or the image processing board 5. Therefore, the expansion image processing board 6 is capable of simply and efficiently extending a functionality of the network printer 2.
    Type: Grant
    Filed: July 13, 2005
    Date of Patent: November 24, 2009
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Junichi Kajiwara, Kiyoshi Inoue, Jun Morimoto
  • Patent number: 7616485
    Abstract: In response to a read command received by a system interface unit for accessing a plurality of blocks of data stored in said non-volatile semiconductor memory, a controller carries out selective read operations of blocks of data to two memories from the non-volatile semiconductor memory. The controller also carries out parallel operations of data transferring a first block of data, which has already been subjected to error detection and error correction operations by an error correction unit, from one of the two memories to a host system via said system interface unit and of data transferring of a second block of data to be subjected to the error detection and error correction operation, from said non-volatile semiconductor memory to the other of the two memories.
    Type: Grant
    Filed: October 31, 2007
    Date of Patent: November 10, 2009
    Assignee: Solid State Storage Solutions LLC
    Inventors: Kunihiro Katayama, Takayuki Tamura, Satoshi Watatani, Kiyoshi Inoue, Shigemasa Shiota, Masashi Naito
  • Patent number: 7596441
    Abstract: In a power steering device employing a hydraulic power cylinder, a motor-driven pump, and a driving power source for the motor, a power steering control system is configured to electrically connected to at least the motor and the power source for controlling a driving state of the motor and a power source voltage of the power source. The power steering control system includes a motor control circuit that generates a motor driving signal, whose command signal value is determined based on a steering assist force applied through the power cylinder to steered road wheels, a booster circuit that boosts the power source voltage, a motor angular acceleration detection circuit that detects or estimates a motor angular acceleration, and a booster-circuit control circuit that controls, responsively to the motor angular acceleration, switching between operating and non-operating states of the booster circuit.
    Type: Grant
    Filed: June 12, 2006
    Date of Patent: September 29, 2009
    Assignee: Hitachi, Ltd.
    Inventors: Tadaharu Yokota, Kiyoshi Inoue, Toru Takahashi
  • Patent number: 7570515
    Abstract: An electrically alterable non-volatile multi-level memory device and a method of operating such a device, which includes setting a status of at least one of the memory cells to one state selected from a plurality of states including at least first to fourth level states, in response to information to be stored in the one memory cell, and reading the status of the memory cell to determine whether the read out status corresponds to one of the first to fourth level states by utilizing a first reference level set between the second and third level states, a second reference level set between the first and second level states and a third reference level set between the third and fourth level states.
    Type: Grant
    Filed: October 10, 2007
    Date of Patent: August 4, 2009
    Assignee: Renesas Technology Corporation
    Inventors: Kunihiro Katayama, Takayuki Tamura, Kiyoshi Inoue
  • Patent number: 7541313
    Abstract: A alloy (Mg—X) of metal (X) and Mg in a liquid phase is made to react with B in a solid phase at a low temperature to manufacture a superconductor, which contains a large amount of MgB2 potential for MRI, linear motorcar, superconducting cavity, electric power transmission cable, high-magnetic field magnet for medical units, electric power storage (SMES), and the like and is formed in the shape of bulk, wire, and foil, by heat treatment performed at a low temperature for a short time and at low cost.
    Type: Grant
    Filed: March 4, 2004
    Date of Patent: June 2, 2009
    Assignee: National Institute for Materials Science
    Inventors: Akihiro Kikuchi, Kiyoshi Inoue, Yasuo Iijima, Yuji Yoshida
  • Patent number: 7482914
    Abstract: A steering angle of steered wheels and a vehicle speed of a fork-lift truck are respectively detected by sensors (4, 5). A CPU (1) compares the vehicle speed with a predetermined speed (S2), and causes a meter (6) to display the steering angle when the vehicle speed is lower than the predetermined speed (S4, S14), and causes the meter (6) to display the vehicle speed when the vehicle speed not lower than the predetermined speed (S3, S13). As a result, the space for the display device can be reduced without affecting the operation efficiency of the fork-lift truck.
    Type: Grant
    Filed: April 4, 2006
    Date of Patent: January 27, 2009
    Assignee: Nissan Motor Co., Ltd.
    Inventors: Kiyoshi Inoue, Takayuki Kishimoto, Makoto Wagatsuma, Toru Takamura
  • Publication number: 20090007618
    Abstract: In an apparatus for producing a spark plug, approach driving conditions are calculated on the basis of a specified thrust feeding amount so that, while a temporal overlap occurs between a time period of feed-driving toward a rolling position P2 of a workpiece supporting portion (11) and an approach driving time period, in a circumferential direction of a workpiece W, a positional relationship between the starting position of the threaded portion which is rolling-formed, and the joining position of the ground electrode to the tip end face of the workpiece W is constant. The operation of an approach driving portion is controlled on the basis of the calculated approach driving conditions.
    Type: Application
    Filed: November 22, 2007
    Publication date: January 8, 2009
    Inventors: Hiroshi Ohashi, Kiyoshi Inoue, Masato Nagasaki, Yasuhiro Hori
  • Patent number: 7448618
    Abstract: A sheet transport apparatus of the present invention is arranged so that a first eject tray is located at a position to which sheets are ejectable in such a manner that front and back surfaces of the sheets are not reversed after the sheets are subjected to predetermined processing. Further, the sheet transport apparatus of the present invention is provided with a first eject tray operation section for aligning leading edges of the sheets ejected to the first eject tray by changing a positional relation in a vertical direction between an upstream side and a downstream side of the first eject tray in a sheet transporting direction.
    Type: Grant
    Filed: September 9, 2004
    Date of Patent: November 11, 2008
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Kiyoshi Inoue, Takao Fukuda, Osamu Fujimoto, Kenji Kitami