Abstract: A unit cell of a static random-access memory includes a laminated gate electrode structure adjacent to a diffusion layer. A top surface of the gate electrode structure is coated with a first silicide layer and the diffusion layer includes a second silicide layer. The second silicide layer is separated from the gate electrode structure by a distance that is the same as a width of a sidewall spacer on an opposite side of the gate electrode structure. The portion of the diffusion layer that is exposed between the second silicide layer and the gate electrode structure has a higher impurity concentration than the remainder of the diffusion layer to reduce or eliminate undesired leakage voltage.

Abstract: The present invention discloses a MOS transistor which is capable of reducing an area of a diffusion layer of a source and drain, and is capable of reducing the number of manufacturing processes while enhancing flatness of a surface of the device. A selective silicon epitaxial layer is formed in an element region which is defined by an element isolation insulating layer formed in a silicon substrate. In the element isolation insulation layer, a polysilicon layer and a selective polysilicon layer connected to the selective silicon epitaxial layer are formed as a source and drain electrode. An LDD region and a source and drain region are formed in the selective silicon epitaxial layer, and a leading electrode for the source and drain region is formed in the source and drain electrode.

Abstract: A spiral conductive layer formed over a semiconductor substrate is covered with a ferromagnetic particle containing photo-sensitive polyimide layer, and the ferromagnetic particle containing photo-sensitive polyimide layer is patterned into a ferromagnetic insulating layer inserted between turning portions of the spiral conductive layer through a lithographic process, thereby making the structure of a spiral inductor simple.

Abstract: In a method of manufacturing a bipolar transistor, a collector region having a first portion and a second portion around the first portion is covered with an insulating film and a polysilicon layer is formed on the insulating film, the polysilicon layer having an opening. The insulating film is then selectively removed about an area that is larger than the area of the opening to thereby expose the first and second portions of the collector region and form a gap between a part of the polysilicon layer and the second portion of the collector region. The gap is then filled with a silicon layer and impurities are doped to form an intrinsic base region in the first portion, followed by forming a side wall space to make the opening smaller than the original area.

Abstract: In a method of manufacturing a bipolar transistor, an oxide film pattern is formed on an epitaxial collector layer of a first conductive type which is formed on a buried layer of the first conductive type. A selectively-ion-implanted-collector (SIC) region is then formed in the collector layer, and after that, a base layer is grown on the SIC region with an inversely graded impurity distribution profile.

Abstract: After a formation of a side wall of silicon nitride on an inner periphery defining an emitter hole passing through a silicon nitride layer and a heavily doped polysilicon base electrode layer, a silicon oxide layer on a collector region is isotropically etched so as to expose an upper surface of the collector region and a bottom surface of an inner peripheral portion of the heavily doped polysilicon base electrode layer, and a ring-shaped hollow space beneath the polysilicon base electrode layer is filled with a piece of polysilicon so that the dopant impurity is diffused from the doped polysilicon layer independently from a selective growth of a base layer over the collector region.

Abstract: A collector layer of a first electrically conductive type is surrounded by an oxide film for separating elements. A base layer comprising an epitaxial layer of a second electrically conductive type is formed on the collector layer. A polysilicon film of the second electrically conductive type is formed at a first area of a surface of the base layer. An emitter layer of the first electrically conductive type is formed at a second area of a surface of the base layer. A base polysilicon electrode comprising of the second electrically conductive type is formed on the polysilicon film and on the oxide film for separating elements. A sidewall comprising an insulating film is formed over a lateral wall of the base polysilicon electrode and a lateral wall of the polysilicon film. An emitter polysilicon electrode of the first electrically conductive type is formed over the emitter layer and the side wall.

Abstract: The invention provides a heterojunction bipolar transistor which has a low reistance SiGe base and is high in current gain and cutoff frequency even at low temperatures near the liquid nitrogen temperature. The transistor fabrication process comprises forming an n-type collector layer on a silicon substrate and a dielectric film on the collector layer, forming a base electrode of p.sup.+ -type polysilicon having an opening on the dielectric film, isotropically etching the dielectric film on the collector layer by using the opening of the base electrode to form a window, forming an external base layer of p.sup.+ -type silicon on the collector layer exposed by the window, selectively etching the external base layer to form an aperture in a central region, forming a p-type SiGe intrinsic base layer in the aperture of the external base layer and then forming an n.sup.+ -type emitter on the intrinsic base layer.

Abstract: The invention provides a heterojunction bipolar transistor which has a low reistance SiGe base and is high in current gain and cutoff frequency even at low temperatures near the liquid nitrogen temperature. The transistor fabrication process comprises forming an n-type collector layer on a silicon substrate and a dielectric film on the collector layer, forming a base electrode of p.sup.+ -type polysilicon having an opening on the dielectric film, isotropically etching the dielectric film on the collector layer by using the opening of the base electrode to form a window, forming an external base layer of p.sup.+ -type silicon on the collector layer exposed by the window, selectively etching the external base layer to form an aperture in a central region, forming a p-type SiGe intrinsic base layer in the aperture of the external base layer and then forming an n.sup.+ -type emitter on the intrinsic base layer.

Abstract: A semiconductor device manufacturing method according to the present invention includes forming an outer base region in a collector layer. The outer base region connects an intrinsic base layer and a base electrode so that base contact resistance between them is decreased.

Abstract: Disclosed herein is a Bi-CMOS IC which includes a semiconductor substrate of one conductivity type, a semiconductor layer of an opposite conductivity type formed on the substrate, a buried region of the opposite conductivity type formed between a first part of the semiconductor layer and the substrate and elongated under a second part of the semiconductor layer to form an elongated buried portion, a bipolar transistor formed in the first part by using the first part as a collector region thereof, a semiconductor region of the one conductivity type formed in the second part in contact with the elongated buried portion separately from the substrate, and an insulated gate transistor formed in the semiconductor region.

Abstract: In a method for manufacturing a bipolar transistor with the SST structure in which a P-type base region consists of a P.sup.+ -type extrinsic base region, a P-type link base region and a P-type intrinsic base region, a silicon oxide film, for example, is formed in advance in a formation region of the P-type link base region and the P-type intrinsic base region on the surface of an N-type epitaxial layer, and a P.sup.+ -type polycrystalline silicon film and a silicon nitride film that cover at least the formation region of the P-type base region are formed. An emitter opening surrounded by a gap part and a base lead-out electrode consisting of the P.sup.+ -type polycrystalline silicon film are formed. A P.sup.+ -type extrinsic base region and a P-type intrinsic base region are formed by applying heat treatment after forming a BSG film on the surface so as to fill in the gap part.

Abstract: The plating amount and composition of a plated steel plate are measured by determining a theoretical relation for an intensity at two different light-receiving angles of K-series fluorescent X-rays of analysis target elements reflected by the plate when monochromatized X-rays are radiated onto the plate at two incident angles, measuring a fluorescent X-ray intensity by using standard samples having known plating amounts and compositions, under the same conditions as for obtaining the theoretical relation, and calculating a conversion coefficient for converting the measured value into a theoretical value by the theoretical relation, measuring a fluorescent X-ray intensity obtained from a plated steel plate to be measured having unknown plating amount and composition under the same conditions for obtaining the theoretical relation, and converting the measured fluorescent X-ray intensity into a theoretical intensity by using the conversion coefficient, and calculating a plating amount and composition as paramete

Abstract: The tip of an alloy rod in a vacuum chamber is remelted by radiation with an electron beam from an electron gun and the remelted droplets fall into a mold where they solidify. The droplets are scanned a plurality of times through a window provided on the vacuum chamber by an image pickup device as they pass its field of view. From the signal of the maximum level obtained during these scans, temperature data of the droplet is obtained by a temperature measurement control device.

Abstract: A method for continuously measuring the surface temperature of a heated steel strip, includes providing a flat reflecting plate so as to face a heated steel strip at an angle of inclination (.alpha.) with the steel strip. A radiation thermometer measures the amount of heat radiation energy which is emitted from an arbitrary point on the surface of the steel strip and comes directly into the radiation thermometer; and the thermometer also measures the total sum of heat radiation energy which (a) is emitted from a different point on the surface of the steel strip and comes into the radiation thermometer after having been reflected at least twice between the steel strip and the reflecting plate and, (b) is emitted from a final reflecting point, on the steel strip, of the heat radiation from said different point.