Patents by Inventor Klaas Bult
Klaas Bult has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7906992Abstract: In a latch circuit having a bistable pair of cross connected transistors of a first polarity and a third transistor of a second polarity, a current signal greater than a bias current is received at a latch circuit port, amplified with the third transistor, and applied to the latch circuit port. This decreases the time in which the latch circuit port receiving the current signal greater than the bias current reaches a steady state voltage.Type: GrantFiled: February 29, 2008Date of Patent: March 15, 2011Assignee: Broadcom CorporationInventors: Klaas Bult, Rudy Van de Plassche, Jan Mulder
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Patent number: 7848724Abstract: An integrated communications system. Comprising a substrate having a receiver disposed on the substrate for converting a received signal to an IF signal. Coupled to a VGA for low voltage applications and coupled to the receiver for processing the IF signal. The VGA includes a bank pair having a first bank of differential pairs of transistors and a second bank of differential pairs of transistors. The bank pair is cross-coupled in parallel, the IF signal is applied to the bank pair decoupled from a control signal used to control transconductance output gain of the bank pair over a range of input voltages. A digital IF demodulator is disposed on the substrate and coupled to the VGA for low voltage applications, for converting the IF signal to a demodulated baseband signal. And a transmitter is disposed on the substrate operating in cooperation with the receiver to establish a two way communications path.Type: GrantFiled: May 12, 2006Date of Patent: December 7, 2010Assignee: Broadcom CorporationInventors: Klaas Bult, Rudy van de Plassche, Pieter Vorenkamp, Arnoldus Venes
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Patent number: 7821581Abstract: An integrated receiver with channel selection and image rejection substantially implemented on a single CMOS integrated circuit is described. A receiver front end provides programmable attenuation and a programmable gain low noise amplifier. Frequency conversion circuitry advantageously uses LC filters integrated onto the substrate in conjunction with image reject mixers to provide sufficient image frequency rejection. Filter tuning and inductor Q compensation over temperature are performed on chip. The filters utilize multi track spiral inductors. The filters are tuned using local oscillators to tune a substitute filter, and frequency scaling during filter component values to those of the filter being tuned. In conjunction with filtering, frequency planning provides additional image rejection. The advantageous choice of local oscillator signal generation methods on chip is by PLL out of band local oscillation and by direct synthesis for in band local oscillator.Type: GrantFiled: July 30, 2008Date of Patent: October 26, 2010Assignee: Broadcom CorporationInventors: Pieter Vorenkamp, Klaas Bult, Frank Carr, Christopher M. Ward, Ralph Duncan, Tom W. Kwan, James Y. C. Chang, Haideh Khorramabadi
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Publication number: 20100237884Abstract: An integrated receiver with channel selection and image rejection substantially implemented on a single CMOS integrated circuit is described. A receiver front end provides programmable attenuation and a programmable gain low noise amplifier. Frequency conversion circuitry advantageously uses LC filters integrated onto the substrate in conjunction with image reject mixers to provide sufficient image frequency rejection. Filter tuning and inductor Q compensation over temperature are performed on chip. The filters utilize multi track spiral inductors. The filters are tuned using local oscillators to tune a substitute filter, and frequency scaling during filter component values to those of the filter being tuned. In conjunction with filtering, frequency planning provides additional image rejection. The advantageous choice of local oscillator signal generation methods on chip is by PLL out of band local oscillation and by direct synthesis for in band local oscillator.Type: ApplicationFiled: May 28, 2010Publication date: September 23, 2010Applicant: Broadcom CorporationInventors: Klaas BULT, Ramon A. Gomez
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Patent number: 7729676Abstract: An integrated receiver with channel selection and image rejection substantially implemented on a single CMOS integrated circuit is described. A receiver front end provides programmable attenuation and a programmable gain low noise amplifier. Frequency conversion circuitry advantageously uses LC filters integrated onto the substrate in conjunction with image reject mixers to provide sufficient image frequency rejection. Filter tuning and inductor Q compensation over temperature are performed on chip. The filters utilize multi track spiral inductors. The filters are tuned using local oscillators to tune a substitute filter, and frequency scaling during filter component values to those of the filter being tuned. In conjunction with filtering, frequency planning provides additional image rejection. The advantageous choice of local oscillator signal generation methods on chip is by PLL out of band local oscillation and by direct synthesis for in band local oscillator.Type: GrantFiled: January 26, 2007Date of Patent: June 1, 2010Assignee: Broadcom CorporationInventors: Klaas Bult, Ramon A. Gomez
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Patent number: 7701295Abstract: A high efficiency class-AB amplifier is disclosed. The amplifier comprises a first input stage and a second input stage, both coupled to a class-AB biasing mesh and an output stage, wherein the outputs of the first and second input stages are directly coupled to the output transistors in the output stage. In one embodiment, a first gate of the first input stage and of the second input stage are coupled together to receive the same input and a second gate of the first input stage and of the second input stage are coupled together to receive the same input. In another embodiment, the first input stage and second input stage may further comprise cascode transistors for coupling the two input stages to the class-AB biasing mesh. In yet another embodiment, a 3V supply is used and 1V transistors are used to improve gain and 3V transistors are used to protect the 1V transistors.Type: GrantFiled: May 11, 2007Date of Patent: April 20, 2010Assignee: Broadcom CorporationInventors: Ovidiu Bajdechi, Christopher M. Ward, Klaas Bult
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Patent number: 7671681Abstract: Circuitry to remove switches from signal paths in integrated circuit programmable gain attenuators. Programmable gain attenuators and programmable gain amplifiers commonly switch between signal levels using semi-conductor switches. Such switches may introduce non-linearities in the signal. By isolating the switches from the signal path linearity of the PGA can be improved.Type: GrantFiled: October 29, 2002Date of Patent: March 2, 2010Inventors: Arya R. Behzad, Klaas Bult, Ramon A. Gomez, Chi-Hung Lin, Tom W. Kwan, Oscar E. Agazzi, John L. Creigh, Mehdi Hatamian, David E. Kruse, Arthur Abnous, Henry Samueli
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Patent number: 7605734Abstract: Binary indications are converted to an analog representation with significant reduction in ringing at the transitions between successive binary indications and in the period during each binary indication. The binary indications are disposed in a row-and-column matrix to provide a thermometer code. Each stage of the converter includes a decoder and latch arranged so the decoder inputs settle before the latch is set by the clock pulses. The stages are implemented in complementary CMOS. Complementary transistors are biased so one transistor of the pair is driven to the rail while the other transistor of the pair floats. A dummy CMOS transistor is used to balance the number of transistors in the decoder paths.Type: GrantFiled: October 31, 2007Date of Patent: October 20, 2009Assignee: Broadcom CorporationInventors: Klaas Bult, Chi-Hung Lin
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Patent number: 7598808Abstract: Circuitry to remove switches from signal paths in integrated circuit programmable gain attenuators. Programmable gain attenuators and programmable gain amplifiers commonly switch between signal levels using semi-conductor switches. Such switches may introduce non-linearities in the signal. By isolating the switches from the signal path linearity of the PGA can be improved.Type: GrantFiled: February 26, 2008Date of Patent: October 6, 2009Inventors: Arya R. Behzad, Klaas Bult, Ramon A. Gomez, Chi-Hung Lin, Tom W. Kwan, Oscar E. Agazzi, John L. Creigh, Mehdi Hatamian, David E. Kruse, Arthur Abnous, Henry Samueli
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Patent number: 7545296Abstract: The invention relates to an interleaved track and hold circuit for tracking and holding a value of a continuous input signal and to provide discrete values thereof, wherein the circuit comprises a first and a second stage. To avoid tones caused by differences in the non-ideal elements when switching through several parallel second stages the circuit according to the invention comprises a single first stage and at least two second stages.Type: GrantFiled: August 22, 2007Date of Patent: June 9, 2009Assignee: Broadcom CorporationInventors: Klaas Bult, Frank van der Goes
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Patent number: 7515895Abstract: An integrated receiver with channel selection and image rejection substantially implemented on a single CMOS integrated circuit is described. A receiver front end provides programable attenuation and a programable gain low noise amplifier. Frequency conversion circuitry advantageously uses LC filters integrated onto the substrate in conjunction with image reject mixers to provide sufficient image frequency rejection. Filter tuning and inductor Q compensation over temperature are performed on chip. The filters utilize multi track spiral inductors. The filters are tuned using local oscillators to tune a substitute filter, and frequency scaling during filter component values to those of the filter being tuned. In conjunction with filtering, frequency planning provides additional image rejection. The advantageous choice of local oscillator signal generation methods on chip is by PLL out of band local oscillation and by direct synthesis for in band local oscillator.Type: GrantFiled: February 4, 2005Date of Patent: April 7, 2009Assignee: Broadcom CorporationInventors: Pieter Vorenkamp, Klaas Bult, Frank Carr
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Publication number: 20080284919Abstract: An integrated receiver with channel selection and image rejection substantially implemented on a single CMOS integrated circuit is described. A receiver front end provides programmable attenuation and a programmable gain low noise amplifier. Frequency conversion circuitry advantageously uses LC filters integrated onto the substrate in conjunction with image reject mixers to provide sufficient image frequency rejection. Filter tuning and inductor Q compensation over temperature are performed on chip. The filters utilize multi track spiral inductors. The filters are tuned using local oscillators to tune a substitute filter, and frequency scaling during filter component values to those of the filter being tuned. In conjunction with filtering, frequency planning provides additional image rejection. The advantageous choice of local oscillator signal generation methods on chip is by PLL out of band local oscillation and by direct synthesis for in band local oscillator.Type: ApplicationFiled: July 30, 2008Publication date: November 20, 2008Applicant: Broadcom CorporationInventors: Pieter Vorenkamp, Klaas Bult, Frank Carr, Christopher M. Ward, Ralph Duncan, Tom W. Kwan, James Y.C. Chang, Haideh Khorramabadi
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Patent number: 7423699Abstract: An integrated receiver with channel selection and image rejection substantially implemented on a single CMOS integrated circuit is described. A receiver front end provides programable attenuation and a programable gain low noise amplifier. Frequency conversion circuitry advantageously uses LC filters integrated onto the substrate in conjunction with image reject mixers to provide sufficient image frequency rejection. Filter tuning and inductor Q compensation over temperature are performed on chip. The filters utilize multi track spiral inductors. The filters are tuned using local oscillators to tune a substitute filter, and frequency scaling during filter component values to those of the filter being tuned. In conjunction with filtering, frequency planning provides additional image rejection. The advantageous choice of local oscillator signal generation methods on chip is by PLL out of band local oscillation and by direct synthesis for in band local oscillator.Type: GrantFiled: March 31, 2006Date of Patent: September 9, 2008Assignee: Broadcom CorporationInventors: Pieter Vorenkamp, Klaas Bult, Frank Carr, Christopher M. Ward, Ralph Duncan, Tom W. Kwan, James Y. C. Chang, Haideh Khorramabadi
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Publication number: 20080150632Abstract: Circuitry to remove switches from signal paths in integrated circuit programmable gain attenuators. Programmable gain attenuators and programmable gain amplifiers commonly switch between signal levels using semi-conductor switches. Such switches may introduce non-linearities in the signal. By isolating the switches from the signal path linearity of the PGA can be improved.Type: ApplicationFiled: February 26, 2008Publication date: June 26, 2008Inventors: Arya R. Behzad, Klaas Bult, Ramon A. Gomez, Chi-Hung Lin, Tom W. Kwan, Oscar E. Agazzi, John L. Creigh, Mehdi Hatamian, David E. Kruse, Arthur Abnous, Henry Samueli
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Patent number: 7366486Abstract: An integrated receiver with channel selection and image rejection substantially implemented on a single CMOS integrated circuit is described. A receiver front end provides programable attenuation and a programable gain low noise amplifier. Frequency conversion circuitry advantageously uses LC filters integrated onto the substrate in conjunction with image reject mixers to provide sufficient image frequency rejection. Filter tuning and inductor Q compensation over temperature are performed on chip. The filters utilize multi track spiral inductors. The filters are tuned using local oscillators to tune a substitute filter, and frequency scaling during filter component values to those of the filter being tuned. In conjunction with filtering, frequency planning provides additional image rejection. The advantageous choice of local oscillator signal generation methods on chip is by PLL out of band local oscillation and by direct synthesis for in band local oscillator.Type: GrantFiled: May 19, 2003Date of Patent: April 29, 2008Assignee: Broadcom CorporationInventors: Pieter Vorenkamp, Klaas Bult, Frank Carr
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Publication number: 20080094269Abstract: The invention relates to an interleaved track and hold circuit for tracking and holding a value of a continuous input signal and to provide discrete values thereof, wherein the circuit comprises a first and a second stage. To avoid tones caused by differences in the non-ideal elements when switching through several parallel second stages the circuit according to the invention comprises a single first stage and at least two second stages.Type: ApplicationFiled: August 22, 2007Publication date: April 24, 2008Applicant: Broadcom CorporationInventors: Klaas Bult, Frank Goes
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Patent number: 7352215Abstract: In a latch circuit having a bistable pair of cross connected transistors of a first polarity and a third transistor of a second polarity, a current signal greater than a bias current is received at a latch circuit port, amplified with the third transistor, and applied to the latch circuit port. This decreases the time in which the latch circuit port receiving the current signal greater than the bias current reaches a steady state voltage.Type: GrantFiled: August 28, 2003Date of Patent: April 1, 2008Assignee: Broadcom CorporationInventors: Klaas Bult, Rudy Van de Plassche, Jan Mulder
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Publication number: 20080062025Abstract: Binary indications are converted to an analog representation with significant reduction in ringing at the transitions between successive binary indications and in the period during each binary indication. The binary indications are disposed in a row-and-column matrix to provide a thermometer code. Each stage of the converter includes a decoder and latch arranged so the decoder inputs settle before the latch is set by the clock pulses. The stages are implemented in complementary CMOS. Complementary transistors are biased so one transistor of the pair is driven to the rail while the other transistor of the pair floats. A dummy CMOS transistor is used to balance the number of transistors in the decoder paths.Type: ApplicationFiled: October 31, 2007Publication date: March 13, 2008Applicant: Broadcom CorporationInventors: Klaas Bult, Chi-Hung Lin
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Patent number: 7336131Abstract: Circuitry to remove switches from signal paths in integrated circuit programmable gain attenuators. Programmable gain attenuators and programmable gain amplifiers commonly switch between signal levels using semi-conductor switches. Such switches may introduce non-linearities in the signal. By isolating the switches from the signal path linearity of the PGA can be improved.Type: GrantFiled: May 25, 2006Date of Patent: February 26, 2008Assignee: Broadcom CorporationInventors: Arya R. Behzad, Klaas Bult, Ramon A. Gomez, Chi-Hung Lin, Tom W. Kwan, Oscar E. Agazzi, John L. Creigh, Mehdi Hatamian, David E. Kruse, Arthur Abnous, Henry Samueli
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Patent number: 7317414Abstract: Binary indications are converted to an analog representation with significant reduction in ringing at the transitions between successive binary indications and in the period during each binary indication. The binary indications are disposed in a row-and-column matrix to provide a thermometer code. Each stage of the converter includes a decoder and latch arranged so the decoder inputs settle before the latch is set by the clock pulses. The stages are implemented in complementary CMOS. Complementary transistors are biased so one transistor of the pair is driven to the rail while the other transistor of the pair floats. A dummy CMOS transistor is used to balance the number of transistors in the decoder paths.Type: GrantFiled: January 29, 2007Date of Patent: January 8, 2008Assignee: Broadcom CorporationInventors: Klaas Bult, Chi-Hung Lin