Patents by Inventor Ko Nakamura
Ko Nakamura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8263419Abstract: According to the present invention, there is provided a method for manufacturing a semiconductor device, including the steps of forming an insulating film on a silicon substrate, forming a first conductive film on the insulating film, forming an aluminum crystal layer on the first conductive film, forming a ferroelectric film containing Pb(ZrxTi1-x)O3 (where 0?x?1) on the aluminum crystal layer, forming a second conductive film on the ferroelectric film, and patterning the first conductive film, the ferroelectric film, and the second conductive film to form a capacitor including a lower electrode, a capacitor dielectric film, and an upper electrode which are laminated sequentially.Type: GrantFiled: March 3, 2008Date of Patent: September 11, 2012Assignee: Fujitsu Semiconductor LimitedInventor: Ko Nakamura
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Patent number: 8236844Abstract: A novel histidine derivative represented by the following formula (I), and a pharmaceutically acceptable salt and hydrate thereof, useful as a pharmaceutical agent such as analgesics for the treatment of various kinds of acute or chronic pain diseases and of neuropathic pain diseases: wherein, R1 is hydrogen, alkyl having 1 to 6 carbon(s) or benzyl which may be substituted with alkyl having 1 to 4 carbon(s) or halogen; R2 is hydrogen or alkyl having 1 to 4 carbon(s); R3 and R4 are same or different and each is hydrogen, alkyl having 1 to 4 carbon(s) or phenyl which may be substituted with any one or two of alkyl having 1 to 6 carbon(s), alkoxy having 1 to 6 carbon(s), halogen, trifluoromethyl, nitro and cyano; and R5 is hydrogen or an alkyl group having 1 to 4 carbon(s).Type: GrantFiled: January 23, 2007Date of Patent: August 7, 2012Assignee: Nippon Zoki Pharmaceutical Co., Ltd.Inventors: Ko Nakamura, Yoshitaka Nakazawa, Minoru Kawamura, Kunihiko Higashiura, Tomoshi Miura
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Publication number: 20120171785Abstract: There are provided a capacitor lower electrode formed on an adhesive layer, whose surface roughness is 0.79 nm or less, and having a (111) orientation that is inclined from a perpendicular direction to an upper surface of a substrate by 2.3° or less, a ferroelectric layer having a structure the (111) orientation of which is inclined from the perpendicular direction to the upper surface of the substrate by 3.5° or less, and a capacitor upper electrode.Type: ApplicationFiled: March 12, 2012Publication date: July 5, 2012Applicant: FUJITSU SEMICONDUCTOR LIMITEDInventors: Tomohiro Takamatsu, Junichi Watanabe, Ko Nakamura, Wensheng Wang, Naoyuki Sato, Aki Dote, Kenji Nomura, Yoshimasa Horii, Masaki Kurasawa, Kazuaki Takai
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Patent number: 8153448Abstract: There are provided a capacitor lower electrode formed on an adhesive layer, whose surface roughness is 0.79 nm or less, and having a (111) orientation that is inclined from a perpendicular direction to an upper surface of a substrate by 2.3° or less, a ferroelectric layer having a structure the (111) orientation of which is inclined from the perpendicular direction to the upper surface of the substrate by 3.5° or less, and a capacitor upper electrode.Type: GrantFiled: May 12, 2009Date of Patent: April 10, 2012Assignee: Fujitsu Semiconductor LimitedInventors: Tomohiro Takamatsu, Junichi Watanabe, Ko Nakamura, Wensheng Wang, Naoyuki Sato, Aki Dote, Kenji Nomura, Yoshimasa Horii, Masaki Kurasawa, Kazuaki Takai
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Publication number: 20110172442Abstract: The amino acid derivative of the present invention provides a novel compound that shows excellent analgesic action. The amino acid derivative of the present invention is a novel compound that shows excellent analgesic action to not only a model animal for nociceptive pains but also a model animal for neuropathic pains, so that the amino acid derivative is very useful as a drug for treating various pain diseases.Type: ApplicationFiled: September 17, 2009Publication date: July 14, 2011Applicant: NIPPON ZOKI PHARMACEUTICAL CO., LTD.Inventors: Tomohiro Ookubo, Ko Nakamura, Hiroyoshi Nanba, Hiroyuki Yoshida, Yoshitaka Nakazawa
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Patent number: 7816150Abstract: A method for fabricating a semiconductor device includes the steps of forming a first ferroelectric film over a lower electrode, crystallizing the first ferroelectric film, forming a second ferroelectric film in an amorphous state over the first ferroelectric film so as to fill voids existing on a surface of the first ferroelectric film, and forming an upper electrode over the second ferroelectric film of the amorphous state, wherein the crystallizing step of the first ferroelectric film is conducted by a thermal annealing process at a temperature of 585° C. or higher.Type: GrantFiled: November 1, 2007Date of Patent: October 19, 2010Assignee: Fujitsu Semiconductor LimitedInventor: Ko Nakamura
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Publication number: 20100207178Abstract: A method for manufacturing a semiconductor device comprises: forming a lower electrode on a semiconductor substrate, sputtering a ferroelectric film on the lower electrode using a target, thermal treating the ferroelectric film in an atmosphere containing oxygen in accordance with an accumulated period of use of the target for fabricating the ferroelectric film, and forming an upper electrode on the ferroelectric film.Type: ApplicationFiled: February 15, 2008Publication date: August 19, 2010Applicant: FUJITSU LIMITEDInventors: Makoto TAKAHASHI, Mitsushi Fujiki, Kenkichi Suezawa, Wensheng Wang, Ko Nakamura
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Publication number: 20090280577Abstract: There are provided a capacitor lower electrode formed on an adhesive layer, whose surface roughness is 0.79 nm or less, and having a (111) orientation that is inclined from a perpendicular direction to an upper surface of a substrate by 2.3° or less, a ferroelectric layer having a structure the (111) orientation of which is inclined from the perpendicular direction to the upper surface of the substrate by 3.5° or less, and a capacitor upper electrode.Type: ApplicationFiled: May 12, 2009Publication date: November 12, 2009Applicant: FUJITSU MICROELECTRONICS LIMITEDInventors: Tomohiro TAKAMATSU, Junichi WATANABE, Ko NAKAMURA, Wensheng WANG, Naoyuki SATO, Aki DOTE, Kenji NOMURA, Yoshimasa HORII, Masaki KURASAWA, Kazuaki TAKAI
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Patent number: 7547933Abstract: There are provided a capacitor lower electrode formed on an adhesive layer, whose surface roughness is 0.79 nm or less, and having a (111) orientation that is inclined from a perpendicular direction to an upper surface of a substrate by 2.3° or less, a ferroelectric layer having a structure the (111) orientation of which is inclined from the perpendicular direction to the upper surface of the substrate by 3.5° or less, and a capacitor upper electrode.Type: GrantFiled: October 29, 2003Date of Patent: June 16, 2009Assignee: Fujitsu Microelectronics LimitedInventors: Tomohiro Takamatsu, Junichi Watanabe, Ko Nakamura, Wensheng Wang, Naoyuki Sato, Aki Dote, Kenji Nomura, Yoshimasa Horii, Masaki Kurasawa, Kazuaki Takai
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Publication number: 20090149658Abstract: The present invention is to provide a novel compound which is useful as an excellent analgesic agent. The present invention is to provide the novel histidine derivative having an excellent analgesic action and the like. The compound of the present invention is very useful as a pharmaceutical agent such as analgesics for the treatment of various kinds of acute or chronic pain diseases and of neuropathic pain diseases.Type: ApplicationFiled: January 23, 2007Publication date: June 11, 2009Applicant: NIPPON ZOKI PHARMACEUTICAL CO., LTD.Inventors: Ko Nakamura, Yoshitaka Nakazawa, Minoru Kawamura, Kunihiko Higashiura, Tomoshi Miura
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Publication number: 20080224195Abstract: A semiconductor device has a ferro-electric capacitor with small leak current and less process deterioration even upon miniaturization.Type: ApplicationFiled: May 28, 2008Publication date: September 18, 2008Applicant: FUJITSU LIMITEDInventors: Wensheng WANG, Ko NAKAMURA
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Publication number: 20080191252Abstract: A semiconductor device with a first insulating film formed on a semiconductor substrate; a capacitor formed on the first insulating film and including a lower electrode, a ferroelectric film and an upper electrode; a second insulating film formed on the capacitor and the first insulating film; a first contact hole formed in the second insulating film; and a first conductive plug formed in the first contact hole and having a multilayer structure and including a first aluminum film.Type: ApplicationFiled: December 17, 2007Publication date: August 14, 2008Applicant: FUJITSU LIMITEDInventors: Ko NAKAMURA, Aki DOTE
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Publication number: 20080179645Abstract: A semiconductor device has a conductive film formed over a substrate, an insulating film formed over the conductive film, and having a hole on the conductive film, and a conductive plug formed in the hole including a barrier metal film and a conductive film. A nitride concentration of the barrier metal film is decreased towards an interface between the barrier metal film and the conductive film, and the nitride concentration of the side of the barrier metal film is higher than the nitride concentration of the side of the conductive film at the interface.Type: ApplicationFiled: January 18, 2008Publication date: July 31, 2008Applicant: FUJITSU LIMITEDInventors: Ko Nakamura, Takashi Hasegawa, Yoshihiro Sugiyama, Hideki Ito
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Publication number: 20080160645Abstract: After bottom electrode film is formed, a first ferroelectric film is formed thereon. Then, the first ferroelectric film is allowed to crystallize. Thereafter, a second ferroelectric film is formed on the first ferroelectric film. Next, a top electrode film is formed on the second ferroelectric film, and the second ferroelectric film is allowed to crystallize.Type: ApplicationFiled: February 6, 2008Publication date: July 3, 2008Applicant: FUJITSU LIMITEDInventors: Ko Nakamura, Kazuaki Takai
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Publication number: 20080149977Abstract: According to the present invention, there is provided a method for manufacturing a semiconductor device, including the steps of forming an insulating film on a silicon substrate, forming a first conductive film on the insulating film, forming an aluminum crystal layer on the first conductive film, forming a ferroelectric film containing Pb(ZrxTi1-x)O3 (where 0?x?1) on the aluminum crystal layer, forming a second conductive film on the ferroelectric film, and patterning the first conductive film, the ferroelectric film, and the second conductive film to form a capacitor including a lower electrode, a capacitor dielectric film, and an upper electrode which are laminated sequentially.Type: ApplicationFiled: March 3, 2008Publication date: June 26, 2008Applicant: FUJITSU LIMITEDInventor: Ko NAKAMURA
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Publication number: 20080113453Abstract: A method for fabricating a semiconductor device includes the steps of forming a first ferroelectric film over a lower electrode, crystallizing the first ferroelectric film, forming a second ferroelectric film in an amorphous state over the first ferroelectric film so as to fill voids existing on a surface of the first ferroelectric film, and forming an upper electrode over the second ferroelectric film of the amorphous state, wherein the crystallizing step of the first ferroelectric film is conducted by a thermal annealing process at a temperature of 585° C. or higher.Type: ApplicationFiled: November 1, 2007Publication date: May 15, 2008Applicant: FUJITSU LIMITEDInventor: Ko Nakamura
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Publication number: 20080057598Abstract: A ferroelectric capacitor formation method that enables stable FeRAM mass production. When a ferroelectric capacitor of an FeRAM is formed, a ferroelectric layer is formed over a lower electrode layer by a sputtering method by keeping a stage at a temperature lower than or equal to 35° C. To crystallize the ferroelectric layer, first RTA treatment is performed in an atmosphere of a mixed gas which contains an inert gas and O2 gas a concentration of which is 1.25 volume percent or greater. The formation of an upper electrode layer, second RTA treatment, patterning, and the like are then performed to form the ferroelectric capacitor. By doing so, ferroelectric capacitors each having predetermined capacitor performance can be formed with a high yield and FeRAMs can stably be mass-produced.Type: ApplicationFiled: August 30, 2007Publication date: March 6, 2008Applicant: FUJITSU LIMITEDInventors: Kenkichi SUEZAWA, Mitsushi FUJIKI, Makoto TAKAHASHI, Ko NAKAMURA, Wensheng WANG
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Publication number: 20070122917Abstract: Disclosed is a ferroelectric capacitor forming method of allowing a FeRAM to be stably mass-produced. In forming the ferroelectric capacitor for the FeRAM, a PZT layer is formed on a lower electrode layer by a sputtering method. Then, a first RTA treatment for crystallizing the PZT is performed in an environment controlled such that predetermined capacitor performance such as a data holding property can be obtained regardless of the amount of a target previously used (used hours) in the sputtering method. For example, the O2 gas flow rate is controlled in an appropriate range during the first RTA treatment. Thereafter, formation of an upper electrode layer or a second RTA treatment is performed. As a result, the ferroelectric capacitor having predetermined capacitor performance can be formed with high yield, so that the FeRAM can be stably mass-produced.Type: ApplicationFiled: April 20, 2006Publication date: May 31, 2007Applicant: FUJITSU LIMITEDInventors: Mitsushi Fujiki, Kenkichi Suezawa, Makoto Takahashi, Ko Nakamura, Wensheng Wang
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Publication number: 20060220082Abstract: After a ferroelectric capacitor is formed, a cap film made of Ti or Ir is formed on a top electrode of the ferroelectric capacitor. Thereafter, an alumina film which covers the ferroelectric capacitor is formed as a protective film. Further, a SiO2 film which covers the ferroelectric capacitor with the alumina film therebetween is formed by a sputtering method. After an interlayer insulating film is formed, holes which reach the cap film and a bottom electrode are respectively formed, and a barrier metal film made of Ti or TiN and a W film are formed therein.Type: ApplicationFiled: July 28, 2005Publication date: October 5, 2006Applicant: FUJITSU LIMITEDInventor: Ko Nakamura
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Patent number: 7078242Abstract: An IrOx film is formed as a first conductive oxide film on a PLZT film by a reactive sputtering method. Thereafter, thermal treatment by, for example, RTA is performed in an atmosphere containing oxygen having partial pressure of less than 5% of atmospheric pressure. As a result, crystallization of the PLZT film is promoted, and annealing treatment is performed for the IrOx film. Thereafter, furnace annealing at 600° C. or higher, for example, 650° C. is performed for 60 minutes in, for example, an O2 atmosphere as recovering annealing to recover oxygen deficiency in the PLZT film. Subsequently, an IrO2 film is formed as a second conductive oxide film on the IrOx film by a sputtering method.Type: GrantFiled: April 30, 2004Date of Patent: July 18, 2006Assignee: Fujitsu LimitedInventors: Katsuyoshi Matsuura, Wensheng Wang, Ko Nakamura