Abstract: A Ti barrier film and a TiN barrier film are formed between a top-level pad made of copper or an alloy film mainly composed of copper and an Al pad. The Ti barrier film is formed to have a greater thickness than the TiN barrier film.

Abstract: Electrode pads respectively have a probe region permitting probe contact and a non-probe region. In each of the electrode pads arranged zigzag in two or more rows, a lead interconnect for connecting another electrode pad with an internal circuit is not placed directly under the probe region but placed directly under the non-probe region.

Abstract: The semiconductor integrated circuit includes: a first wiring layer including a plurality of first interconnects formed to run in a first direction; a second wiring layer formed above the first wiring layer, the second wiring layer including a plurality of second interconnects formed to run in a second direction vertical to the first direction; and a third wiring layer formed above the second wiring layer, the third wiring layer including a plurality of third interconnects formed to run in the same direction as the second direction.

Abstract: Input/output cells are formed so as to be peripherally arranged adjacent to a corner cell on a surface of a semiconductor chip, and electrode pads are formed on the respective input/output cells. The electrode pads are configured in a zigzag pad arrangement so as to form inner and outer pad arrays. However, of the electrode pads forming the inner pad array, those electrode pads in predetermined areas adjacent to the two sides of the corner cell are not disposed, such that an interconnect pattern of a carrier which is bump-bonded to the semiconductor chip and vias are prevented from becoming complex.

Abstract: A semiconductor device includes: an interlayer insulating film formed on a substrate; a wiring formed in the interlayer insulating film in a chip region of the substrate; a seal ring formed in the interlayer insulating film in a periphery of the chip region and continuously surrounding the chip region; and a first protective film formed on the interlayer insulating film having the wiring and the seal ring formed therein. A first opening is formed in the first protective film in a region located outside the seal ring when viewed from the chip region, and the interlayer insulating film is exposed in the first opening.

Abstract: Input/output cells are formed so as to be peripherally arranged adjacent to a corner cell on a surface of a semiconductor chip, and electrode pads are formed on the respective input/output cells. The electrode pads are configured in a zigzag pad arrangement so as to form inner and outer pad arrays. However, of the electrode pads forming the inner pad array, those electrode pads in predetermined areas adjacent to the two sides of the corner cell are not disposed, such that an interconnect pattern of a carrier which is bump-bonded to the semiconductor chip and vias are prevented from becoming complex.

Abstract: A semiconductor device includes: a circuit region having a function element formed on a semiconductor substrate; a scribe region located between the circuit region and another circuit region formed spaced from the circuit region, the scribe region including a cutting region and non-cutting regions provided at both sides of the cutting region; a first interlayer insulating film formed in the scribe region on the semiconductor substrate; a first dummy pattern made of conductive material and formed in the first interlayer insulating film in the cutting region; and a second dummy pattern made of conductive material and formed in the first interlayer insulating film in each of the non-cutting regions. The ratio, per unit area, of the area of the first dummy pattern to the area of the cutting region is lower than the ratio, per unit area, of the area of the second dummy pattern to the area of the non-cutting regions.

Abstract: In the case where the information data recorded in the recording medium is recorded in a predetermined area of the recording means, detection whether the indentification information for identifying the recording medium is attached, is conducted, when the indentification information is attached, a predetermined area is selected based on the functional structure, physical structure or logical structure of the recording means, and the information recorded in the recording medium is automatically recorded in the selected area.

Abstract: The information recording apparatus is at least provided with an identification means 12 for reading the utilization license information from the recording medium, and for identifying whether the recording medium is a recording medium for which the utilization of the music data is permitted, the music data obtaining means 13 for connecting to the server through the communication network, and for requiring the download of the music data to the server, an input output means 11 for selecting the musical composition or for reproducing the music data, and a data recording means 18 for recording the downloaded music data in the recording medium, and without complicated operation, the music data can simply be recorded in the recording medium.

Abstract: A Ti barrier film and a TiN barrier film are formed between a top-level pad made of copper or an alloy film mainly composed of copper and an Al pad. The Ti barrier film is formed to have a greater thickness than the TiN barrier film.

Abstract: A semiconductor device includes: a semiconductor substrate; a first interlayer insulating film formed over the semiconductor substrate; a pad formed above the first interlayer insulating film; and a plurality of first interconnects spaced apart from each other in a portion of the first interlayer insulating film located below the pad. Below the pad, the first interconnects are formed in quadrangular plan shapes.

Abstract: A semiconductor device includes at least three or more wiring layers stacked in an interlayer insulating film on a semiconductor substrate, a seal ring provided at the outer periphery of a chip region of the semiconductor substrate and a chip strength reinforcement provided in part of the chip region near the seal ring. The chip strength reinforcement is made of a plurality of dummy wiring structures and each of the plurality of dummy wiring structures is formed to extend across and within two or more of the wiring layers including one or none of the bottommost wiring layer and the topmost wiring layer using a via portion.

Abstract: User 2 can obtain first information recording medium 10 in which a copying program is recorded, whereby the copying program copies image data specified by signals from specified image data copy signals, and an image data display program and setting information to display the image data by a predetermined method, into second information recording medium 11, and user 2 can display or process the image data which is previously recorded in said information recording medium by the image display program, as well as the image data in other memory means, and can automatically copy the targeted image data, the image display program and setting information, by clicking buttons which are previously formed on a screen of the image display program.

Abstract: Input/output cells are formed so as to be peripherally arranged adjacent to a corner cell on a surface of a semiconductor chip, and electrode pads are formed on the respective input/output cells. The electrode pads are configured in a zigzag pad arrangement so as to form inner and outer pad arrays. However, of the electrode pads forming the inner pad array, those electrode pads in predetermined areas adjacent to the two sides of the corner cell are not disposed, such that an interconnect pattern of a carrier which is bump-bonded to the semiconductor chip and vias are prevented from becoming complex.

Abstract: Input/output cells are formed so as to be peripherally arranged adjacent to a corner cell on a surface of a semiconductor chip, and electrode pads are formed on the respective input/output cells. The electrode pads are configured in a zigzag pad arrangement so as to form inner and outer pad arrays. However, of the electrode pads forming the inner pad array, those electrode pads in predetermined areas adjacent to the two sides of the corner cell are not disposed, such that an interconnect pattern of a carrier which is bump-bonded to the semiconductor chip and vias are prevented from becoming complex.

Abstract: It is possible to prevent fraudulent recording of data because a check is made as to whether or not the information recording medium 9 was purchased correctly at the cash register 5, and because the information recording media 9 in which has been recorded the write disable information indicating that the writing of data in it has been prohibited are stacked on a shop shelf 4, and a section is provided in the cash register 5 for recording in the information recording medium 9 the write disable release information indicating that the disabling of the writing of data has been released, and because in the data recording terminal 3 is provided, at least, a data recording section that prohibits the writing of data in the information recording medium 9 in which the write disable information has been written and also permits the writing of data in the information recording medium 9 in which the write disable release information has been written.

Abstract: A variable capacitance element includes a coplanar line or signal conduction and a movable body, which are vertically displaced through a supporting bar and which are provided on a substrate. A movable electrode is provided between a first driving electrode and second and third driving electrodes which are movable electrodes. Voltage is applied between the movable electrodes, such that one of the movable electrodes is pressed against the coplanar line through a dielectric film. Thus, high frequency signals conducting through the coplanar line are shut off. When voltage is applied between the other electrodes, the movable electrode and the dielectric film are moved apart from the coplanar line. Thus, high frequency signals are conducted through the coplanar line.

Abstract: The present invention concerns a method for producing prints, on which a specific image is printed based on a specific information set when a captured image is printed as a visible image on the print, based on image data of the captured image. The method includes the steps of: reading a plurality of specific information sets and a plurality of associate information sets, both of which are stored in a server, installed on a network, in such a manner that each of the specific information sets relates to each of the associate information sets in regard to a date and time and/or each of the associate information sets for identifying or classifying the specific information sets; selecting a part of specific information sets out of a plurality of the specific information sets read from the server, based on the associate information sets; and printing the specific image, based on the specific information set, on the print on which the captured image is also printed.

Abstract: A variable capacitance element includes a coplanar line or signal conduction and a movable body, which are vertically displaced through a supporting bar and which are provided on a substrate. A movable electrode is provided between a first driving electrode and second and third driving electrodes which are movable electrodes. Voltage is applied between the movable electrodes, such that one of the movable electrodes is pressed against the coplanar line through a dielectric film. Thus, high frequency signals conducting through the coplanar line are shut off. When voltage is applied between the other electrodes, the movable electrode and the dielectric film are moved apart from the coplanar line. Thus, high frequency signals are conducted through the coplanar line.

Abstract: According to the invention, in input/output circuit portions positioned around a semiconductor chip, electrode pads are arranged above each of a plurality of input/output cells arranged in a line. The width of the electrode pads is greater than the width of the input/output cells, and thus the electrode pads cannot be arranged in a single line and are instead arranged staggered in two lines. The electrode pads of one row are arranged shifted so that they do not overlap with the internal terminals of the input/output cells, but are disposed near these internal terminals. The spacing between the electrode pads is set to a distance that is at least a set distance determined by the isolation rules of the design.