Abstract: A certain embodiment includes: first wiring layers extended in a first direction arranged in a second direction crossing the first direction; second wiring layers, including two layers having mutually different materials, extended in the second direction arranged in the first direction above the first wiring layers; third wiring layers extended in the first direction arranged in the second direction above the second wiring layers; a first memory cell disposed between one second wiring layer and one first wiring layer between the second and first wiring layers; a second memory cell disposed between one third wiring layer and the one second wiring layer between the third and second wiring layers; a third memory cell disposed between the one second wiring layer and another closest first wiring layer adjacent to the first wiring layer having the first memory cell; and an insulation layer disposed between the first and third memory cells.

Abstract: According to one embodiment, a semiconductor memory device includes a stacked body which is provided on a substrate and in which an insulating film and an electrode film are alternately stacked. The semiconductor memory device also includes an insulating member which penetrates the stacked body in a stacking direction of the insulating film and the electrode film to thereby separate the stacked body. The semiconductor memory device also includes a semiconductor pillar which penetrates the stacked body in the stacking direction. A maximum portion of the insulating member where a first distance from a side surface of the insulating member to a central plane of the insulating member becomes maximum and a maximum portion of the semiconductor pillar where a second distance from a side surface of the semiconductor pillar to a center line of the semiconductor pillar becomes maximum being provided in different positions in the stacking direction.

Abstract: A certain embodiment includes: first wiring layers extended in a first direction and arranged in a second direction; second wiring layers provided above the first wiring layer of a third direction and arranged in the first direction and extended in the second direction; first stacked structures comprising a first memory cell disposed between the second and first wiring layers at a crossing portion between the second and first wiring layers; first conductive layers provided in the same layer as the first wiring layers, adjacent to the first wiring layer in the second direction, and not connected to other than the second wiring layer; second stacked structures disposed at crossing portions between the second wiring layers and the first conductive layers; and an insulation layer provided between the first stacked structures and between the second stacked structures having a Young's modulus larger than that of the insulation layer.

Abstract: According to one embodiment, a semiconductor memory device includes a stacked body which is provided on a substrate and in which an insulating film and an electrode film are alternately stacked. The semiconductor memory device also includes an insulating member which penetrates the stacked body in a stacking direction of the insulating film and the electrode film to thereby separate the stacked body. The semiconductor memory device also includes a semiconductor pillar which penetrates the stacked body in the stacking direction. A maximum portion of the insulating member where a first distance from a side surface of the insulating member to a central plane of the insulating member becomes maximum and a maximum portion of the semiconductor pillar where a second distance from a side surface of the semiconductor pillar to a center line of the semiconductor pillar becomes maximum being provided in different positions in the stacking direction.

Abstract: According to one embodiment, a semiconductor memory device includes a stacked body which is provided on a substrate and in which an insulating film and an electrode film are alternately stacked. The semiconductor memory device also includes an insulating member which penetrates the stacked body in a stacking direction of the insulating film and the electrode film to thereby separate the stacked body. The semiconductor memory device also includes a semiconductor pillar which penetrates the stacked body in the stacking direction. A maximum portion of the insulating member where a first distance from a side surface of the insulating member to a central plane of the insulating member becomes maximum and a maximum portion of the semiconductor pillar where a second distance from a side surface of the semiconductor pillar to a center line of the semiconductor pillar becomes maximum being provided in different positions in the stacking direction.

Abstract: A storage device including a transistor portion including a transistor, a plurality of interlayer insulating films provided above the transistor portion, a plurality of first conductive layers provided respectively between the plurality of interlayer insulating films, and a second conductive layer extending through the plurality of interlayer insulating films and the plurality of first conductive layers, the second conductive layer having one end electrically connected to the transistor portion, and a part that extends beyond a portion of the transistor portion.

Abstract: According to one embodiment, a semiconductor memory device includes a stacked body which is provided on a substrate and in which an insulating film and an electrode film are alternately stacked. The semiconductor memory device also includes an insulating member which penetrates the stacked body in a stacking direction of the insulating film and the electrode film to thereby separate the stacked body. The semiconductor memory device also includes a semiconductor pillar which penetrates the stacked body in the stacking direction. A maximum portion of the insulating member where a first distance from a side surface of the insulating member to a central plane of the insulating member becomes maximum and a maximum portion of the semiconductor pillar where a second distance from a side surface of the semiconductor pillar to a center line of the semiconductor pillar becomes maximum being provided in different positions in the stacking direction.

Abstract: According to one embodiment, a semiconductor memory device includes a plurality of first interconnects extending in a first direction, a plurality of second interconnects extending in a second direction, a plurality of stacked films respectively provided between the first interconnects and the second interconnects, each of the plurality of stacked films including a variable resistance film, a first inter-layer insulating film provided in a first region between the stacked films, and a second inter-layer insulating film provided in a second region having a wider width than the first region. The second inter-layer insulating film includes a plurality of protrusions configured to support one portion of the plurality of second interconnects on the second region. A protruding length of the protrusions is less than a stacking height of the stacked films.

Abstract: According to one embodiment, a semiconductor memory device includes a plurality of first interconnects extending in a first direction, a plurality of second interconnects extending in a second direction, a plurality of stacked films respectively provided between the first interconnects and the second interconnects, each of the plurality of stacked films including a variable resistance film, a first inter-layer insulating film provided in a first region between the stacked films, and a second inter-layer insulating film provided in a second region having a wider width than the first region. The second inter-layer insulating film includes a plurality of protrusions configured to support one portion of the plurality of second interconnects on the second region. A protruding length of the protrusions is less than a stacking height of the stacked films.

Abstract: A semiconductor memory device according to an embodiment comprises: when three directions intersecting each other are assumed to be first through third directions, and two directions intersecting each other in a plane extending in the first and second directions are assumed to be fourth and fifth directions, a memory cell array including: a conductive layer stacked in the third direction above a semiconductor substrate and having a first region; and a first columnar body penetrating the first region of the conductive layer in the third direction and including a semiconductor film, the first columnar body having a cross-section along the first and second directions in which, at a first position which is a certain position in the third direction, a length in the fourth direction is shorter than a length in the fifth direction.

Abstract: A memory device includes a first interconnect extending in a first direction, semiconductor members extending in a second direction, a second interconnect provided between the semiconductor members and extending in a third direction, a first insulating film provided between the semiconductor member and the second interconnect, third interconnects extending in the second direction, fourth interconnects provided between the third interconnects and arranged along the second direction, a resistance change film provided between the third interconnect and the fourth interconnects, and a first film. The first film is provided between the second interconnect and the fourth interconnect, interposes between the semiconductor member and the resistance change film, and not interpose between the semiconductor member and the third interconnect connected to each other. A first end of the semiconductor member is connected to the first interconnect.

Abstract: A semiconductor memory device according to an embodiment comprises: conductive layers stacked in a vertical direction on a semiconductor substrate; and first and columnar bodies that extend in the vertical direction, the first and second columnar bodies each comprising: a first film; a second film disposed on the first film; and a semiconductor film, and the first film of the second columnar body having an upper end positioned higher than a first position lower than a first conductive layer and lower than a second position higher than the first conductive layer and a lower end positioned at or lower than the first position, and the second film of the second columnar body having an upper end positioned higher than the second position and a lower end positioned lower than the first position.

Abstract: According to one embodiment, a semiconductor memory device includes a plurality of first interconnects extending in a first direction, a plurality of second interconnects extending in a second direction, a plurality of stacked films respectively provided between the first interconnects and the second interconnects, each of the plurality of stacked films including a variable resistance film, a first inter-layer insulating film provided in a first region between the stacked films, and a second inter-layer insulating film provided in a second region having a wider width than the first region. The second inter-layer insulating film includes a plurality of protrusions configured to support one portion of the plurality of second interconnects on the second region. A protruding length of the protrusions is less than a stacking height of the stacked films.

Abstract: A storage device including a transistor portion including a transistor, a plurality of interlayer insulating films provided above the transistor portion, a plurality of first conductive layers provided respectively between the plurality of interlayer insulating films, and a second conductive layer extending through the plurality of interlayer insulating films and the plurality of first conductive layers, the second conductive layer having one end electrically connected to the transistor portion, and a part that extends beyond a portion of the transistor portion.

Abstract: According to one embodiment, a semiconductor memory device includes a stacked body which is provided on a substrate and in which an insulating film and an electrode film are alternately stacked. The semiconductor memory device also includes an insulating member which penetrates the stacked body in a stacking direction of the insulating film and the electrode film to thereby separate the stacked body. The semiconductor memory device also includes a semiconductor pillar which penetrates the stacked body in the stacking direction. A maximum portion of the insulating member where a first distance from a side surface of the insulating member to a central plane of the insulating member becomes maximum and a maximum portion of the semiconductor pillar where a second distance from a side surface of the semiconductor pillar to a center line of the semiconductor pillar becomes maximum being provided in different positions in the stacking direction.

Abstract: According to one embodiment, a semiconductor memory device includes a plurality of first interconnects extending in a first direction, a plurality of second interconnects extending in a second direction, a plurality of stacked films respectively provided between the first interconnects and the second interconnects, each of the plurality of stacked films including a variable resistance film, a first inter-layer insulating film provided in a first region between the stacked films, and a second inter-layer insulating film provided in a second region having a wider width than the first region. The second inter-layer insulating film includes a plurality of protrusions configured to support one portion of the plurality of second interconnects on the second region. A protruding length of the protrusions is less than a stacking height of the stacked films.

Abstract: According to one embodiment, a semiconductor memory device includes a stacked body which is provided on a substrate and in which an insulating film and an electrode film are alternately stacked. The semiconductor memory device also includes an insulating member which penetrates the stacked body in a stacking direction of the insulating film and the electrode film to thereby separate the stacked body. The semiconductor memory device also includes a semiconductor pillar which penetrates the stacked body in the stacking direction. A maximum portion of the insulating member where a first distance from a side surface of the insulating member to a central plane of the insulating member becomes maximum and a maximum portion of the semiconductor pillar where a second distance from a side surface of the semiconductor pillar to a center line of the semiconductor pillar becomes maximum being provided in different positions in the stacking direction.

Abstract: A semiconductor device includes a semiconductor pillar and a control electrode. The semiconductor pillar extends in a first direction, and includes a first region, a second region and an intermediate region provided along the first direction. The intermediate region is positioned between the first region and the second region. The control electrode is disposed at a position so that the control electrode faces the intermediate region via an insulating film. The semiconductor pillar is provided so that a minimum width of the intermediate region in a second direction perpendicular to the first direction is narrower than a first width of the first region in the second direction and a second width of the second region in the second direction.

Abstract: According to one embodiment, a semiconductor memory device includes a substrate, a stacked body, a semiconductor pillar, a charge storage film, and at least one columnar member. The stacked body is provided on the substrate. In the stacked body, a plurality of insulating films and a plurality of electrode films are layered together alternately. The semiconductor pillar is provided in the stacked body and extends in a stacking direction of the stacked body. The charge storage film is provided between the semiconductor pillar and the stacked body. The columnar member is provided in the stacked body and extends in the stacking direction. A lower portion of the columnar member is provided in the substrate.

Abstract: A semiconductor memory device according to an embodiment comprises: when three directions intersecting each other are assumed to be first through third directions, and two directions intersecting each other in a plane extending in the first and second directions are assumed to be fourth and fifth directions, a memory cell array including: a conductive layer stacked in the third direction above a semiconductor substrate and having a first region; and a first columnar body penetrating the first region of the conductive layer in the third direction and including a semiconductor film, the first columnar body having a cross-section along the first and second directions in which, at a first position which is a certain position in the third direction, a length in the fourth direction is shorter than a length in the fifth direction.