Abstract: A thin-film solar cell and a method for manufacturing the same are presented, in which the dopant concentration turns low in a sloping way. The solar cell includes a substrate, a first contact region, a photoelectric conversion layer, and a second contact region. The first contact region a photoelectric conversion layer, and a second contact region are disposed on the substrate. At least one of the first contact region and the second contact region contains an N-type dopant, and the concentration of the N-type dopant is decreased gradually in a direction towards the photoelectric conversion layer. Through the thin-film solar cell and the method for manufacturing the same, the conversion efficiency of the solar cell is improved, and the thin-film solar cell and the manufacturing method are capable of being integrated with an existing manufacturing process of a solar cell, thereby simplifying the manufacturing process and reducing the cost.

Abstract: In one aspect of the present invention, a photovoltaic panel includes a substrate, a reflective layer formed on the substrate, a first conductive layer formed on the reflective layer, an active layer formed on the first conductive layer, and a second conductive layer formed on the active layer. The reflective layer has an index of refraction and a thickness such that the reflectance spectrum of the photovoltaic device for light incident on the substrate has a maximum in a selected wavelength range in the visible spectrum.

Abstract: A photo detector is disclosed. The photo detector has a substrate, a semiconductor layer disposed on the substrate, an insulating layer covered on the semiconductor layer, an interlayer dielectric layer covered on the insulating layer, and two electrodes formed on a portion of the interlayer dielectric layer. The semiconductor layer has a first doping region, a second doping region, and an intrinsic region located between the first doping region and the second doping region. The interlayer dielectric layer has at least three holes to expose a portion of the insulating layer, a portion of the first doping region, and the second doping region. The electrodes are connected to the first doping region and the second doping region through two of the holes.

Abstract: A solar cell module includes a substrate having a thin-film layer patterned in a manner to form with a split window and a solar cell disposed on the substrate. The solar cell includes plurality of material layers and a plurality of split ways corresponding to the material layers. The scope of the split window is constituted by at least one of the split ways.

Abstract: A touch detecting device for a capacitive touch sensor that includes a plurality of sensing units aligned along a predetermined direction, includes a differential detecting module and a processing module. The differential detecting module is configured to detect a capacitance variation between each two adjacent ones of the sensing units so as to generate a sequence of capacitance variations. The processing module is configured to determine a number of transitions corresponding to a number of touched areas on the capacitive touch sensor, where the number of transitions is one or greater. Each of the transitions represents a change from one of a set of the capacitance variations that is positive to one of a succeeding set of the capacitance variations that is negative. A touch detecting method is also disclosed.

Abstract: A capacitance difference detecting circuit, which comprises: a control circuit, for generating a control signal according to a first voltage and a second voltage; a first capacitor to be detected; a second capacitor to be detected; a first constant capacitor, having a terminal coupled to the first terminal of the first capacitor to be detected and the first input terminal; a second constant capacitor, having a terminal coupled to the first terminal of the second capacitor to be detected and the second input terminal; a voltage control unit, cooperating with the first capacitor to be detected, the second capacitor to be detected, the first constant capacitor and the second constant capacitor to control the first voltage and the second voltage. The voltage control unit is an adjustable capacitor and a capacitance value of the adjustable capacitor is controlled by the control signal.

Abstract: A method of forming an optical sensor includes the following steps. A substrate is provided, and a read-out device is formed on the substrate. a first electrode electrically connected to the read-out device is formed on the substrate. a photosensitive silicon-rich dielectric layer is formed on the first electrode, wherein the photosensitive silicon-rich dielectric layer comprises a plurality of nanocrystalline silicon crystals. A second electrode is formed on the photosensitive silicon-rich dielectric layer.

Abstract: A photo detector has a sensing TFT (thin film transistor) and a photodiode. The sensing TFT has a gate and a base. The photodiode has an intrinsic semiconductor region electrically connected to the gate and the base of the sensing TFT. The sensing TFT and the photodiode both have a structure comprising low temperature poly-silicon. A display panel contains the photo detector is also disclosed.

Abstract: An optical sensor includes a silicon-rich dielectric photosensitive device and a read-out device. The silicon-rich dielectric photosensitive device includes a first electrode, a second electrode, and a photosensitive silicon-rich dielectric layer disposed therebetween. The photosensitive silicon-rich dielectric layer includes a plurality of nanocrystalline silicon crystals therein. The read-out device is electrically connected to the first electrode of the silicon-rich dielectric photosensitive device for reading out opto-electronic signals transmitted from the photo-sensitive silicon-rich dielectric layer.

Abstract: A method for fabricating a photo sensor on an amorphous silicon thin film transistor panel includes forming a photo sensor with a bottom electrode, a silicon-rich dielectric layer, and a top electrode, such that the light sensor has a high reliability. The fabrication method is compatible with the fabrication process of a thin film transistor.

Abstract: A forming method of the present invention includes forming a first patterned conductive layer, which includes a transparent conductive layer and a metal layer stacked together on a substrate, where the first patterned conductive layer functions as gate lines, gate electrodes, common lines and predetermined transparent pixel electrode structures; and forming a second patterned conductive layer on the substrate. The second patterned conductive layer includes data lines and reflective pixel electrodes, and be directly connected to doping regions, such as source regions/drain regions. According to the forming method of the present invention, pixel structures of a transflective liquid crystal display device can be formed through five mask processes. Therefore, the manufacturing process of the transflective liquid crystal display device is effectively simplified, so the product yield is improved and the cost can be reduced.

Abstract: A forming method of the present invention includes forming a first patterned conductive layer, which includes a transparent conductive layer and a metal layer stacked together on a substrate, where the first patterned conductive layer functions as gate lines, gate electrodes, common lines and predetermined transparent pixel electrode structures; and forming a second patterned conductive layer on the substrate. The second patterned conductive layer includes data lines and reflective pixel electrodes, and be directly connected to doping regions, such as source regions/drain regions. According to the forming method of the present invention, pixel structures of a transflective liquid crystal display device can be formed through five mask processes. Therefore, the manufacturing process of the transflective liquid crystal display device is effectively simplified, so the product yield is improved and the cost can be reduced.

Abstract: A manufacturing method of a thin film transistor array substrate is provided. In the method, a substrate having a display region and a sensing region is provided. At least a display thin film transistor is formed in the display region, a first sensing electrode is formed in the sensing region, and an inter-layer dielectric layer is disposed on the substrate, covers the display thin film transistor, and exposes the first sensing electrode. A patterned photo sensitive dielectric layer is then formed on the first sensing electrode. A patterned transparent conductive layer is subsequently formed on the substrate, wherein the patterned transparent conductive layer includes a pixel electrode coupled to the corresponding display thin film transistor and includes a second sensing electrode located on the patterned photo sensitive dielectric layer. A manufacturing method of a liquid crystal display panel adopting the aforementioned thin film transistor array substrate is also provided.

Abstract: A manufacturing method of a thin film transistor array substrate incorporating the manufacture of a photo-sensor is provided. In the manufacturing method, a photo-sensing dielectric layer is formed between a transparent conductive layer and a metal electrode for detecting ambient light. Since the transparent conductive layer is adopted as an electrode, the ambient light can pass through the transparent conductive layer and get incident light into the photo-sensing dielectric layer. Therefore, the sensing area of the photo-sensor can be enlarged and the photo-sensing efficiency is improved. In addition, the other side of the photo sensitive dielectric layer may be a metal electrode. The metal electrode can block the backlight from getting incident into the photo-sensing dielectric layer and thus reduce the background noise. A manufacturing method of a liquid crystal display panel adopting the aforementioned thin film transistor array substrate is also provided.

Abstract: A thin film transistor (TFT) formed on a transparent substrate is provided. The thin film transistor includes a patterned semiconductor layer, a gate insulating layer disposed on the patterned semiconductor layer, a gate electrode disposed on the gate insulating layer, and a patterned light-absorbing layer. The patterned semiconductor layer includes a channel region, and a source region and a drain region disposed on two opposite sides of the channel region in the pattern semiconductor layer. The patterned light-absorbing layer is disposed between the transparent substrate and the patterned semiconductor layer.

Abstract: A method for fabricating a TFT array substrate including the following steps is provided. A substrate having a pixel region and a photosensitive region is provided. A first patterned conductive layer is formed on the substrate, wherein the first patterned conductive layer includes a gate electrode disposed in the pixel region and a first electrode disposed in the photosensitive region, and a photosensitive dielectric layer is formed on the first electrode. A gate insulation layer is formed to cover the gate electrode, the photosensitive dielectric layer and the first electrode. A patterned semiconductor layer is formed on the gate insulation layer above the gate electrode. A source electrode and a drain electrode are formed on the patterned semiconductor layer at two sides of the gate electrode, wherein the gate electrode, the source electrode, and the drain electrode constitute a TFT. A second electrode is formed on the photosensitive dielectric layer.

Abstract: A semiconductor device and the method for fabricating the same are disclosed. The fabrication method includes forming a PMOS device and an NMOS device on a substrate, wherein the PMOS device includes a first poly-silicon island, a gate dielectric layer covering the first poly-silicon island, and a first gate on the gate dielectric layer. The method of fabrication the PMOS device includes performing a P-type ion implantation process on the first poly-silicon island to form a plurality of P-type heavily doped regions and a plurality of P-type lightly doped regions. The length of the channel region is substantially less than 3 micron, and the length of at least one of the P-type lightly doped regions substantially is 10%-80% of the length of the channel region. The P-type lightly doped regions are used to improve the short channel effect of the PMOS device.

Abstract: A buffer layer for promoting electron mobility. The buffer layer comprises amorphous silicon layer (a-Si) and an oxide-containing layer. The a-Si has high enough density that the particles in the substrate are prevented by the a-Si buffer layer from diffusing into the active layer. As well, the buffer, having thermal conductivity, provides a good path for thermal diffusion during the amorphous active layer's recrystallization by excimer laser annealing (ELA). Thus, the uniformity of the grain size of the crystallized silicon is improved, and electron mobility of the TFT is enhanced.

Abstract: A thin film transistor (TFT) including a substrate, a buffer layer, a patterned poly-silicon layer, a gate dielectric layer, and a number of gate electrodes is provided. The patterned poly-silicon layer is disposed on the buffer layer and the substrate. The patterned poly-silicon layer includes a number of channel regions, at least one heavily doped region, two lightly doped regions, a source region, and a drain region. The heavily doped region connects two adjacent channel regions. The source region connects one of the two outmost channel regions through one of the lightly doped regions. The drain region connects the other outmost channel region through the other lightly doped region. The gate dielectric layer covers the patterned poly-silicon layer. The gate electrodes are disposed on the gate dielectric layer and electrically connected to one another. Each gate is disposed above each channel region and a part of the heavily doped region.

Abstract: A photo detector is disclosed. The photo detector has a substrate, a semiconductor layer disposed on the substrate, an insulating layer covered on the semiconductor layer, an interlayer dielectric layer covered on the insulating layer, and two electrodes formed on a portion of the interlayer dielectric layer. The semiconductor layer has a first doping region, a second doping region, and an intrinsic region located between the first doping region and the second doping region. The interlayer dielectric layer has at least three holes to expose a portion of the insulating layer, a portion of the first doping region, and the second doping region. The electrodes are connected to the first doping region and the second doping region through two of the holes.