Patents by Inventor Kunihiro Furuya

Kunihiro Furuya has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240019487
    Abstract: A wafer inspection system is provided. The wafer inspection system includes: a transfer region in which a transfer device is arranged; an inspection region in which test heads for inspecting a substrate are arranged; and a maintenance region in which the test heads are maintained. The inspection region is located between the transfer region and the maintenance region, a plurality of inspection rooms accommodating the test heads are adjacent to each other in the inspection region, and the test heads are configured to be unloaded from the inspection region to the maintenance region.
    Type: Application
    Filed: August 9, 2023
    Publication date: January 18, 2024
    Inventors: Junichi Hagihara, Shigekazu Komatsu, Kunihiro Furuya, Tadayoshi Hosaka, Naoki Muramatsu
  • Patent number: 11762012
    Abstract: A wafer inspection system is provided. The wafer inspection system includes: a transfer region in which a transfer device is arranged; an inspection region in which test heads for inspecting a substrate are arranged; and a maintenance region in which the test heads are maintained. The inspection region is located between the transfer region and the maintenance region, a plurality of inspection rooms accommodating the test heads are adjacent to each other in the inspection region, and the test heads are configured to be unloaded from the inspection region to the maintenance region.
    Type: Grant
    Filed: December 28, 2022
    Date of Patent: September 19, 2023
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Junichi Hagihara, Shigekazu Komatsu, Kunihiro Furuya, Tadayoshi Hosaka, Naoki Muramatsu
  • Publication number: 20230134360
    Abstract: A wafer inspection system is provided. The wafer inspection system includes: a transfer region in which a transfer device is arranged; an inspection region in which test heads for inspecting a substrate are arranged; and a maintenance region in which the test heads are maintained. The inspection region is located between the transfer region and the maintenance region, a plurality of inspection rooms accommodating the test heads are adjacent to each other in the inspection region, and the test heads are configured to be unloaded from the inspection region to the maintenance region.
    Type: Application
    Filed: December 28, 2022
    Publication date: May 4, 2023
    Inventors: Junichi Hagihara, Shigekazu Komatsu, Kunihiro Furuya, Tadayoshi Hosaka, Naoki Muramatsu
  • Patent number: 11567123
    Abstract: A wafer inspection system is provided. The wafer inspection system comprises: a transfer region in which a transfer device is arranged; an inspection region in which test heads for inspecting a substrate are arranged; and a maintenance region in which the test heads are maintained. The inspection region is located between the transfer region and the maintenance region, a plurality of inspection rooms accommodating the test heads are adjacent to each other in the inspection region, and the test heads are configured to be unloaded from the inspection region to the maintenance region.
    Type: Grant
    Filed: March 10, 2021
    Date of Patent: January 31, 2023
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Junichi Hagihara, Shigekazu Komatsu, Kunihiro Furuya, Tadayoshi Hosaka, Naoki Muramatsu
  • Patent number: 11119122
    Abstract: There is provided a method for correcting a relative position between a probe card having a plurality of cantilever-type probes and an object to be inspected having a plurality of electrode pads, including: arranging a first group of cantilever-type probes among the plurality of cantilever-type probes in a first region and a second region; arranging a second group of cantilever-type probes among the plurality of cantilever-type probes in a third region and a fourth region; obtaining needle traces formed on the plurality of electrode pads, which are generated when the first group of cantilever-type probes and the second group of cantilever-type probes that are arranged in the first region, the second region, the third region, and the fourth region, are brought into contact with the plurality of electrode pads; and correcting the relative position between the probe card and the object to be inspected based on the obtained needle traces.
    Type: Grant
    Filed: March 1, 2019
    Date of Patent: September 14, 2021
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Kunihiro Furuya, Shingo Ishida
  • Patent number: 11061071
    Abstract: A wafer inspection system is provided. The wafer inspection system includes: a transfer region in which a transfer device is arranged; an inspection region in which test heads for inspecting a substrate are arranged; and a maintenance region in which the test heads are maintained. The inspection region is located between the transfer region and the maintenance region, a plurality of inspection rooms accommodating the test heads are adjacent to each other in the inspection region, and the test heads are configured to be unloaded from the inspection region to the maintenance region.
    Type: Grant
    Filed: August 31, 2020
    Date of Patent: July 13, 2021
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Junichi Hagihara, Shigekazu Komatsu, Kunihiro Furuya, Tadayoshi Hosaka, Naoki Muramatsu
  • Publication number: 20210190861
    Abstract: A wafer inspection system is provided. The wafer inspection system comprises: a transfer region in which a transfer device is arranged; an inspection region in which test heads for inspecting a substrate are arranged; and a maintenance region in which the test heads are maintained. The inspection region is located between the transfer region and the maintenance region, a plurality of inspection rooms accommodating the test heads are adjacent to each other in the inspection region, and the test heads are configured to be unloaded from the inspection region to the maintenance region.
    Type: Application
    Filed: March 10, 2021
    Publication date: June 24, 2021
    Inventors: Junichi Hagihara, Shigekazu Komatsu, Kunihiro Furuya, Tadayoshi Hosaka, Naoki Muramatsu
  • Patent number: 10976364
    Abstract: A wafer inspection system is provided. The wafer inspection system comprises: a transfer region in which a transfer device is arranged; an inspection region in which test heads for inspecting a substrate are arranged; and a maintenance region in which the test heads are maintained. The inspection region is located between the transfer region and the maintenance region, a plurality of inspection rooms accommodating the test heads are adjacent to each other in the inspection region, and the test heads are configured to be unloaded from the inspection region to the maintenance region.
    Type: Grant
    Filed: July 16, 2020
    Date of Patent: April 13, 2021
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Junichi Hagihara, Shigekazu Komatsu, Kunihiro Furuya, Tadayoshi Hosaka, Naoki Muramatsu
  • Publication number: 20200400743
    Abstract: A wafer inspection system is provided. The wafer inspection system includes: a transfer region in which a transfer device is arranged; an inspection region in which test heads for inspecting a substrate are arranged; and a maintenance region in which the test heads are maintained. The inspection region is located between the transfer region and the maintenance region, a plurality of inspection rooms accommodating the test heads are adjacent to each other in the inspection region, and the test heads are configured to be unloaded from the inspection region to the maintenance region.
    Type: Application
    Filed: August 31, 2020
    Publication date: December 24, 2020
    Inventors: Junichi Hagihara, Shigekazu Komatsu, Kunihiro Furuya, Tadayoshi Hosaka, Naoki Muramatsu
  • Publication number: 20200348358
    Abstract: A wafer inspection system is provided. The wafer inspection system comprises: a transfer region in which a transfer device is arranged; an inspection region in which test heads for inspecting a substrate are arranged; and a maintenance region in which the test heads are maintained. The inspection region is located between the transfer region and the maintenance region, a plurality of inspection rooms accommodating the test heads are adjacent to each other in the inspection region, and the test heads are configured to be unloaded from the inspection region to the maintenance region.
    Type: Application
    Filed: July 16, 2020
    Publication date: November 5, 2020
    Inventors: Junichi Hagihara, Shigekazu Komatsu, Kunihiro Furuya, Tadayoshi Hosaka, Naoki Muramatsu
  • Patent number: 10753972
    Abstract: A wafer inspection system is provided. The wafer inspection system comprises: a transfer region in which a transfer device is arranged; an inspection region in which test heads for inspecting a substrate are arranged; and a maintenance region in which the test heads are maintained. The inspection region is located between the transfer region and the maintenance region, a plurality of inspection rooms accommodating the test heads are adjacent to each other in the inspection region, and the test heads are configured to be unloaded from the inspection region to the maintenance region.
    Type: Grant
    Filed: May 1, 2017
    Date of Patent: August 25, 2020
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Junichi Hagihara, Shigekazu Komatsu, Kunihiro Furuya, Tadayoshi Hosaka, Naoki Muramatsu
  • Publication number: 20200064400
    Abstract: A wafer inspection system is provided. The wafer inspection system comprises: a transfer region in which a transfer device is arranged; an inspection region in which test heads for inspecting a substrate are arranged; and a maintenance region in which the test heads are maintained. The inspection region is located between the transfer region and the maintenance region, a plurality of inspection rooms accommodating the test heads are adjacent to each other in the inspection region, and the test heads are configured to be unloaded from the inspection region to the maintenance region.
    Type: Application
    Filed: November 1, 2019
    Publication date: February 27, 2020
    Inventors: Junichi Hagihara, Shigekazu Komatsu, Kunihiro Furuya, Tadayoshi Hosaka, Naoki Muramatsu
  • Publication number: 20190277884
    Abstract: There is provided a method for correcting a relative position between a probe card having a plurality of cantilever-type probes and an object to be inspected having a plurality of electrode pads, including: arranging a first group of cantilever-type probes among the plurality of cantilever-type probes in a first region and a second region; arranging a second group of cantilever-type probes among the plurality of cantilever-type probes in a third region and a fourth region; obtaining needle traces formed on the plurality of electrode pads, which are generated when the first group of cantilever-type probes and the second group of cantilever-type probes that are arranged in the first region, the second region, the third region, and the fourth region, are brought into contact with the plurality of electrode pads; and correcting the relative position between the probe card and the object to be inspected based on the obtained needle traces.
    Type: Application
    Filed: March 1, 2019
    Publication date: September 12, 2019
    Inventors: Kunihiro FURUYA, Shingo ISHIDA
  • Patent number: 9863977
    Abstract: A method of contacting a substrate with a probe card in a substrate inspection apparatus can inspect electrical characteristics of semiconductor devices on the substrate. A wafer W is transferred to a position facing a probe card 36 while being mounted on a chuck member 22 with a wafer plate 37 therebetween, and electrodes of semiconductor devices on the wafer W are contacted with probes of the probe card 36 by moving the wafer W and the wafer plate 37 toward the probe card 36 through an elevating device 43. Then, the wafer W is overdriven toward the probe card 36 and a contact state between the electrodes of the semiconductor devices and the probes of the probe card 36 is maintained by decompressing a space S between the probe card 36 and the wafer plate 37. Then, the chuck member 22 is separated from the wafer plate 37.
    Type: Grant
    Filed: July 18, 2013
    Date of Patent: January 9, 2018
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Kunihiro Furuya, Hiroshi Yamada, Takanori Hyakudomi, Jun Mochizuki
  • Publication number: 20170234924
    Abstract: A wafer inspection system is provided. The wafer inspection system comprises: a transfer region in which a transfer device is arranged; an inspection region in which test heads for inspecting a substrate are arranged; and a maintenance region in which the test heads are maintained. The inspection region is located between the transfer region and the maintenance region, a plurality of inspection rooms accommodating the test heads are adjacent to each other in the inspection region, and the test heads are configured to be unloaded from the inspection region to the maintenance region.
    Type: Application
    Filed: May 1, 2017
    Publication date: August 17, 2017
    Inventors: Junichi Hagihara, Shigekazu Komatsu, Kunihiro Furuya, Tadayoshi Hosaka, Naoki Muramatsu
  • Patent number: 9671459
    Abstract: A maintenance carriage of a wafer inspection apparatus can easily unload a test head. A wafer inspection apparatus 10 includes a cell tower 12 in which cells 11 are arranged at four levels, and each of the cells 11 accommodates a test head 15. At an outside of the cell tower 12, a maintenance carriage 27 is arranged. The maintenance carriage 27 includes a carriage base 29 configured to be moved through rollers 28; a test head case 31 configured to accommodate the test head 15; a lift device 30 provided uprightly from the carriage base 29 and configured to move up and down the test head case 31; and a horizontal position adjusting stage 35 provided between a lifter 34 of the lift device 30 and the test head case 31 and configured to move the test head case 31 horizontally with respect to the lifter 34.
    Type: Grant
    Filed: October 28, 2014
    Date of Patent: June 6, 2017
    Assignees: TOKYO ELECTRON LIMITED, NIPPO PRECISION CO., LTD
    Inventors: Junichi Hagihara, Shigekazu Komatsu, Kunihiro Furuya, Tadayoshi Hosaka, Naoki Muramatsu
  • Patent number: 9140726
    Abstract: A support body for a plurality of contact terminals included in a probe card for inspecting semiconductor devices formed in a semiconductor substrate is provided. The support body includes a main body formed by stacking a plurality of plate-shaped members, a plurality of contact terminal holes formed through the main body in a thickness direction of the plate-shaped members, and one or more coolant paths provided in the main body. Further, the contact terminals respectively are inserted into the contact terminal holes.
    Type: Grant
    Filed: October 16, 2012
    Date of Patent: September 22, 2015
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Jun Mochizuki, Kunihiro Furuya
  • Publication number: 20150219687
    Abstract: A method of contacting a substrate with a probe card in a substrate inspection apparatus can inspect electrical characteristics of semiconductor devices on the substrate. A wafer W is transferred to a position facing a probe card 36 while being mounted on a chuck member 22 with a wafer plate 37 therebetween, and electrodes of semiconductor devices on the wafer W are contacted with probes of the probe card 36 by moving the wafer W and the wafer plate 37 toward the probe card 36 through an elevating device 43. Then, the wafer W is overdriven toward the probe card 36 and a contact state between the electrodes of the semiconductor devices and the probes of the probe card 36 is maintained by decompressing a space S between the probe card 36 and the wafer plate 37. Then, the chuck member 22 is separated from the wafer plate 37.
    Type: Application
    Filed: July 18, 2013
    Publication date: August 6, 2015
    Inventors: Kunihiro Furuya, Hiroshi Yamada, Takanori Hyakudomi, Jun Mochizuki
  • Publication number: 20150115991
    Abstract: A maintenance carriage of a wafer inspection apparatus can easily unload a test head. A wafer inspection apparatus 10 includes a cell tower 12 in which cells 11 are arranged at four levels, and each of the cells 11 accommodates a test head 15. At an outside of the cell tower 12, a maintenance carriage 27 is arranged. The maintenance carriage 27 includes a carriage base 29 configured to be moved through rollers 28; a test head case 31 configured to accommodate the test head 15; a lift device 30 provided uprightly from the carriage base 29 and configured to move up and down the test head case 31; and a horizontal position adjusting stage 35 provided between a lifter 34 of the lift device 30 and the test head case 31 and configured to move the test head case 31 horizontally with respect to the lifter 34.
    Type: Application
    Filed: October 28, 2014
    Publication date: April 30, 2015
    Inventors: Junichi Hagihara, Shigekazu Komatsu, Kunihiro Furuya, Tadayoshi Hosaka, Naoki Muramatsu
  • Patent number: 8310257
    Abstract: A plurality of metal plates and an insulating plate having a polished surface are laminated in a probe supporting plate. Through-holes into which probes are to be inserted are respectively formed in the metal plates and the insulating plate. Diameters of the through-holes are greater than diameters of the through-holes, and the through-holes pass through the probe supporting plate in a thickness direction of the probe supporting plate. Hollow portions passing through the probe supporting plate in the thickness direction of the probe supporting plate are formed in the probe supporting plate. Each of the hollow portions is formed by connecting each of holes formed in each of the metal plates and each of holes formed in the insulating plate. Diameters of holes of a metal plate that is an uppermost layer, holes of a metal plate that is a lowermost player, and holes of a metal plate that is one of intermediate layers are less than diameters of holes of metal plates 30d that are the other intermediate layers.
    Type: Grant
    Filed: August 4, 2010
    Date of Patent: November 13, 2012
    Assignee: Tokyo Electron Limited
    Inventors: Shinichiro Takase, Kunihiro Furuya, Jun Mochizuki