Abstract: Provided are a transparent nonvolatile memory thin film transistor (TFT) and a method of manufacturing the same. The memory TFT includes source and drain electrodes disposed on a transparent substrate. A transparent semiconductor thin layer is disposed on the source and drain electrodes and the transparent substrate interposed between the source and drain electrodes. An organic ferroelectric thin layer is disposed on the transparent semiconductor thin layer. A gate electrode is disposed on the organic ferroelectric thin layer in alignment with the transparent semiconductor thin layer. Thus, the transparent nonvolatile memory TFT employs the organic ferroelectric thin layer, the oxide semiconductor thin layer, and auxiliary insulating layers disposed above and below the organic ferroelectric thin layer, thereby enabling low-cost manufacture of a transparent nonvolatile memory device capable of a low-temperature process.

Abstract: A thin film transistor substrate. The thin film transistor substrate includes a substrate, an adhesive layer on the substrate, and a semiconductor layer having a first doped region, a second doped region and a channel region on the adhesive layer. The thin film transistor substrate further includes a first dielectric layer on the semiconductor layer, a gate electrode overlapping the channel region, a second dielectric layer on the first dielectric layer and the gate electrode, a source electrode disposed on the second insulating layer, and a drain electrode spaced apart from the source electrode on the source electrode. The channel region is disposed between the first doped region and the second doped region, and has a transmittance higher than those of the first doped region and the second doped region.

Abstract: Provided are a transparent nonvolatile memory thin film transistor (TFT) and a method of manufacturing the same. The memory TFT includes source and drain electrodes disposed on a transparent substrate. A transparent semiconductor thin layer is disposed on the source and drain electrodes and the transparent substrate interposed between the source and drain electrodes. An organic ferroelectric thin layer is disposed on the transparent semiconductor thin layer. A gate electrode is disposed on the organic ferroelectric thin layer in alignment with the transparent semiconductor thin layer. Thus, the transparent nonvolatile memory TFT employs the organic ferroelectric thin layer, the oxide semiconductor thin layer, and auxiliary insulating layers disposed above and below the organic ferroelectric thin layer, thereby enabling low-cost manufacture of a transparent nonvolatile memory device capable of a low-temperature process.

Abstract: Provided is a memory cell including: a ferroelectric transistor; a plurality of switching elements electrically connected to the ferroelectric transistor; and a plurality of control lines for transmitting individual control signals to each of the plurality of switching element for separately controlling the plurality of switching elements. The plurality of switching elements are configured to be separately controlled on the basis of the individual control signals so as to prevent each electrode of the ferroelectric transistor from being floated.

Abstract: Provided is a method of manufacturing a thin film transistor that can improve self-alignment. In this method, a semiconductor layer comprising a first doped region, a second doped region and a channel region is formed on a sacrificial layer on a first substrate. Next, the semiconductor layer is separated from the first substrate and is then coupled on a second substrate. Next, a dielectric layer is formed on the second substrate and the semiconductor layer, and a first photoresist layer is formed on the dielectric layer. Thereafter, the first photoresist layer is exposed to light from a rear surface of the second substrate by using the first doped region and the second doped region as a mask, to form a first mask pattern.

Abstract: Provided are a memory cell and a memory device using the same, particularly, a nonvolatile non-destructive readable random access memory cell including a ferroelectric transistor as a storage unit and a memory device using the same. The memory cell includes a ferroelectric transistor having a drain to which a reference voltage is applied, a first switch configured to allow a source of the ferroelectric transistor to be connected to a first line in response to a scan signal, and a second switch configured to allow a gate of the ferroelectric transistor to be connected to a second line in response to the scan signal. The memory device enables random access and performs non-destructive read-out (NDRO) operations.

Abstract: Provided are a semiconductor device including a dual gate transistor and a method of fabricating the same. The semiconductor device includes a lower gate electrode, an upper gate electrode on the lower gate electrode, a contact plug interposed between the lower gate electrode and the upper gate electrode, and connecting the lower gate electrode to the upper gate electrode, and a functional electrode spaced apart from the upper gate electrode and formed at the same height as the upper gate electrode. The dual gate transistor exhibiting high field effect mobility is applied to the semiconductor device, so that characteristics of the semiconductor device can be improved. In particular, since no additional mask or deposition process is necessary, a large-area high-definition semiconductor device can be mass-produced with neither an increase in process cost nor a decrease in yield.

Abstract: Provided is a composition for an oxide semiconductor thin film and a field effect transistor (FET) using the composition. The composition includes from about 50 to about 99 mol % of a zinc oxide (ZnO); from about 0.5 to 49.5 mol % of a tin oxide (SnOx); and remaining molar percentage of an aluminum oxide (AlOx). The thin film formed of the composition remains in amorphous phase at a temperature of 400° C. or less. The FET includes an active layer formed of the composition and has improved electrical characteristics. The FET can be fabricated using a low-temperature process without expensive raw materials, such as In and Ga.

Abstract: Provided are a transferred thin film transistor and a method of manufacturing the same. The method includes: forming a source region and a drain region that extend in a first direction in a first substrate and a channel region between the source region and the drain region; forming trenches that extend in a second direction in the first substrate to define an active layer between the trenches, the second direction intersecting the first direction; separating the active layer between the trenches from the first substrate by performing an anisotropic etching process on the first substrate inside the trenches; attaching the active layer on a second substrate; and forming a gate electrode in the first direction on the channel region of the active layer.

Abstract: Provided are an NMOS device, a PMOS device and a SiGe HBT device which are implemented on an SOI substrate and a method of fabricating the same. In manufacturing a Si-based high speed device, a SiGe HBT and a CMOS are mounted on a single SOI substrate. In particular, a source and a drain of the CMOS are formed of SiGe and metal, and thus leakage current is prevented and low power consumption is achieved. Also, heat generation in a chip is suppressed, and a wide operation range may be obtained even at a low voltage.

Abstract: Provided is a solid type heat dissipation device for electronic communication appliances. The solid type heat dissipation device includes a graphite thin plate horizontally transferring heat, a plurality of metal fillers passing through the graphite thin plate to vertically transfer heat, and a plurality of metal thin plates attached to upper and lower surfaces of the graphite thin plate and connected to the metal fillers.

Abstract: Provided are a transparent nonvolatile memory thin film transistor (TFT) and a method of manufacturing the same. The memory TFT includes source and drain electrodes disposed on a transparent substrate. A transparent semiconductor thin layer is disposed on the source and drain electrodes and the transparent substrate interposed between the source and drain electrodes. An organic ferroelectric thin layer is disposed on the transparent semiconductor thin layer. A gate electrode is disposed on the organic ferroelectric thin layer in alignment with the transparent semiconductor thin layer. Thus, the transparent nonvolatile memory TFT employs the organic ferroelectric thin layer, the oxide semiconductor thin layer, and auxiliary insulating layers disposed above and below the organic ferroelectric thin layer, thereby enabling low-cost manufacture of a transparent nonvolatile memory device capable of a low-temperature process.

Abstract: Provided is a transparent organic light emitting diode (OLED) lighting device in which opaque metal reflectors are formed to adjust light emitting directions. The transparent OLED lighting device includes a transparent substrate, a transparent anode formed on a predetermined region of the transparent substrate, a reflective anode formed adjacent to the transparent anode on another region of the transparent substrate, an organic layer formed on the transparent and reflective anodes, and a transparent cathode and an encapsulation substrate sequentially stacked on the organic layer. Directions of light emitted from the organic layer vary depending on the current applied to the transparent and reflective anodes.

Abstract: Provided is an input/output (I/O) expansion device for a portable electronic apparatus having a port to which an external expansion device can be connected. The I/O expansion device includes: a display body having at least one display portion; and at least one I/O connector formed at a portion of the display body to be electrically and physically attached to and separated from the port of the portable electronic apparatus. Therefore, it is possible to provide a multi-function I/O expansion device that can be electrically and physically attached and separated.

Abstract: Provided are a non-volatile memory device and a method of forming the non-volatile memory device. The non-volatile memory device includes a substrate, a lower electrode on the substrate, a diffusion barrier preventing the diffusion of a space charge on the lower electrode, a charge storage layer having a space charge limited characteristic on the diffusion barrier, and an upper electrode on the charge storage layer.

Abstract: Provided are a touch screen and a method of operating the same. The touch screen includes a detecting part, a control part, and a tactile feedback part. The detecting part detects object's approach or contact. The control part receives a signal of the detecting part to output a feedback signal. The tactile feedback part receives the feedback signal of the control part to provide a tactile feedback to a contact position using a magnetic force. The tactile feedback uses the magnetic force of a magnetic dipole.

Abstract: Provided is a method for forming a metal oxide. A method for forming a metal oxide according to embodiments of the present invention includes preparing a metal oxide precursor solution including a dopant chemical species, preparing an alcohol-based solution including a basic chemical species, reacting the alcohol-based solution with the metal oxide precursor solution to form a reactant, and purifying the reactant to form a metal oxide.

Abstract: Provided is a method of manufacturing a thin film transistor that can improve self-alignment. In this method, a semiconductor layer comprising a first doped region, a second doped region and a channel region is formed on a sacrificial layer on a first substrate. Next, the semiconductor layer is separated from the first substrate and is then coupled on a second substrate. Next, a dielectric layer is formed on the second substrate and the semiconductor layer, and a first photoresist layer is formed on the dielectric layer. Thereafter, the first photoresist layer is exposed to light from a rear surface of the second substrate by using the first doped region and the second doped region as a mask, to form a first mask pattern.

Abstract: Provided is a vapor-liquid phase change cooling device, which may be manufactured with no limitation of thickness. The cooling device includes a first thin plate including a groove-shaped capillary region, an evaporator section for evaporating a working fluid injected from outside, and a condenser section having a vapor condensation space for condensing the evaporated working fluid, a second thin plate having a vapor pathway for transporting the evaporated working fluid to the condenser section, and a third thin plate having a liquid pathway for transporting the working fluid condensed in the condenser section to the evaporator section.

Abstract: Provided is a dielectric waveguide filter. The filter includes: a multi-layered structure of dielectric substrates having first and second ground planes at its top and bottom; first, second, and third waveguide resonators disposed at multiple layers within the multi-layered structure; converters for signal transition between input/output ports and the first and third waveguide resonators; first vias for forming the first, second, and third waveguide resonators; and second vias disposed at a boundary surface of the first waveguide resonator and the third waveguide resonator.