Patents by Inventor Larry D. Seiler
Larry D. Seiler has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7978194Abstract: A method and apparatus for hierarchical Z buffering stenciling includes comparing an input tile Z value range with a hierarchical Z value range and a stencil code. The method and apparatus also updates the hierarchical Z value range and stencil code in response the comparison and determines whether to render a plurality of pixels within the input tile based on the comparison of the input tile Z value range with the hierarchical Z value range and stencil code. In determining whether to render the tile, a stencil test and a hierarchical Z value test is performed. If one of the test fails, the tile is killed as it is determined that the pixels are not visible in the graphical output. If the stencil test passes and the hierarchical Z test passes, the pixels within the tile are rendered, as it is determined that the pixels may be visible.Type: GrantFiled: March 2, 2004Date of Patent: July 12, 2011Assignee: ATI Technologies ULCInventors: Larry D. Seiler, Stephen L. Morein
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Patent number: 7924281Abstract: A graphics processing circuit includes a pixel shader operative to provide pixel color information in response to image data representing a scene to be rendered; a texture circuit, coupled to the pixel shader, operative to determine a luminance value to be applied to a pixel of interest based on the luminance values of the pixels that define a plane including the pixel of interest; and a render back end circuit, coupled to the texture circuit, operative to compute the luminance values from a shadow map that specifies the distance from the light source of the nearest object at a plurality of locations.Type: GrantFiled: March 9, 2005Date of Patent: April 12, 2011Assignee: ATI Technologies ULCInventors: Stephen L. Morein, Larry D. Seiler, Michael Doggett, Jocelyn Houle
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Patent number: 7656417Abstract: A method for determining the appearance of a pixel includes receiving fragment data for a pixel to be rendered; storing the fragment data; and determining an appearance value for the pixel based on the stored fragment data, wherein a portion of the stored fragment data is dropped when the number of fragment data per pixel exceeds a threshold value enabling large savings in memory footprint without impacting perceivably on the image quality. A graphics processor includes a rasterizer operative to generate fragment data for a pixel to be rendered in response to primitive information; and a render back end circuit, coupled to the rasterizer, operative to determine a pixel appearance value based on the fragment data by dropping the fragment data having the least effect on pixel appearance.Type: GrantFiled: February 12, 2004Date of Patent: February 2, 2010Assignee: ATI Technologies ULCInventors: Larry D. Seiler, Laurent Lefebvre
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Patent number: 7538765Abstract: A method and apparatus for generating hierarchical depth culling characteristics includes determining a first minimum depth value and a first maximum depth value for a first graphical element. The graphical element may be a primitive. The first minimum depth value may be a minimum Z-plane depth of a pixel within the primitive and a first maximum depth value is a maximum Z-plane value for a pixel within the primitive. The method and apparatus further includes determining a second minimum depth value and a second maximum depth value for a second graphical element, which may be a tile. The method and apparatus further includes calculating an intersection depth range having an intersection minimum depth value and an intersection maximum depth value based on the intersection of the first minimum depth value and the first maximum depth value and the second minimum depth value and the second maximum depth value.Type: GrantFiled: August 10, 2004Date of Patent: May 26, 2009Assignee: ATI International SRLInventors: Larry D. Seiler, Laurent Lefebvre, Stephen L. Morein
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Patent number: 6680735Abstract: A volume data set composed of voxels is rendered onto an image plane composed of pixels by casting a ray through each pixel of the image plane. A surface of the volume data set is selected as a base plane. Sample points are defined along each ray so that the sample points lie in planes parallel to the base plane. Voxels adjacent to each sample point are sampled to determine a sample value for each sample point, and the sample values of each ray are combined to determine a pixel value for each pixel.Type: GrantFiled: November 17, 2000Date of Patent: January 20, 2004Assignee: TeraRecon, Inc.Inventors: Larry D. Seiler, Yin Wu, Hugh C. Lauer, Vishal C. Bhatia, Jeffrey Lussier
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Patent number: 6654012Abstract: A method renders a volume data set as an image in a volume rendering system. The volume data set includes a plurality of voxels stored in a memory. The volume rendering system includes a plurality of parallel processing pipelines. The image includes a plurality of pixels stored in the memory. A set of rays are cast through the volume data set. The volume data set is partitioned into a plurality of sections aligned with the sets of rays. Voxels along each ray of each set are sequentially interpolated voxels in only one of the plurality of pipelines to generate samples only as long as the samples contribute to the image.Type: GrantFiled: October 1, 1999Date of Patent: November 25, 2003Assignee: TeraRecon, Inc.Inventors: Hugh C. Lauer, Larry D. Seiler, Charidimos E. Gasparakis, Vikram Simha, Kenneth W. Correll
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Patent number: 6614447Abstract: A method corrects opacity values of samples in a rendering pipeline. The method partitions a range of uncorrected alpha values into a plurality of segments in a low to high order. Corrected alpha values for uncorrected alpha values in the highest segment are determined by direct table look-up. Corrected alpha values for uncorrected alpha values in all but the highest segment are determined by linear interpolation.Type: GrantFiled: October 4, 2000Date of Patent: September 2, 2003Assignee: TeraRecon, Inc.Inventors: Vishal C. Bhatia, Charidimos E. Gasparakis, Larry D. Seiler
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Publication number: 20020190984Abstract: A method renders a volume data set as an image in a volume rendering system. The volume data set includes a plurality of voxels stored in a memory. The volume rendering system includes a plurality of parallel processing pipelines. The image includes a plurality of pixels stored in an image buffer. A determination is made whether a particular voxel of the volume data set will contribute to the image. The voxel is read into one of the plurality of pipelines only if the particular voxel contributes to a particular pixel of the image.Type: ApplicationFiled: October 1, 1999Publication date: December 19, 2002Inventors: LARRY D. SEILER, KENNETH W. CORRELL, HUGH C. LAUER, VISHAL C. BHATIA
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Patent number: 6424346Abstract: A method maps samples in a rendering pipelines. The samples are stored in a sample memory. Each sample has a plurality of fields. A descriptor is stored for each field in a field format register. Each sample is read from the memory into a mapping unit. The fields are extracted from each sample according to the corresponding descriptor, and forwarded in parallel to the rendering pipeline.Type: GrantFiled: July 15, 1999Date of Patent: July 23, 2002Assignee: Tera Recon, Inc.Inventors: Kenneth W. Correll, Larry D. Seiler, Vikram Simha, Charidimos E. Gasparakis, Hugh C. Lauer
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Patent number: 6421057Abstract: A volume rendering pipeline includes a plurality of processing stages such as a gradient estimation stage, an interpolation stage, a classification stage, an illumination stage, and a compositing stage. The stages are connected to each other by multiplexers. A first multiplexer connects an output of a first stage to an input of a second stage. A second multiplexer connects an output of the second stage to an input of the first stage. A third multiplexer has inputs connected to the output of the first stage and the output of the second stage, the first, second, and third multiplexers are responsive to a select signal to configure the stages of the rendering pipeline for processing the volume data set.Type: GrantFiled: July 15, 1999Date of Patent: July 16, 2002Assignee: Terarecon, Inc.Inventors: Hugh C. Lauer, Larry D. Seiler, James M. Knittel, Kenneth W. Correll, Charidimos E. Gasparakis, Vikram Simha, Vishal C. Bhatia
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Patent number: 6369816Abstract: A method modulates samples in a volume rendering pipeline by storing modulation values as entries in a table. Also stored are a grain and a base for the entries of the table to specify an index range. A magnitude of a gradient vector of a sample is determined. The table is indexed using the magnitude to determine two modulation values corresponding to the magnitude. The two modulation values are interpolated using the grain and the base to determine a modulation factor to modulate the sample with a linear function.Type: GrantFiled: May 20, 1999Date of Patent: April 9, 2002Assignee: Terarecon, Inc.Inventors: James M. Knittel, Larry D. Seiler, Charidimos E. Gasparakis
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Patent number: 6359619Abstract: In a method for rendering an evolving three-dimensional scene description as a series of two-dimensional images (frames), the evolving scene description includes object geometries G and their associated shader procedures S. Each shader procedure S is factored into a static procedure Ss and a dynamic procedure Sd such that S(A,I)=Sd(Ss(A,R),I), where A denotes the appearance parameters required to shade objects, I denotes an instance of the control parameters, and R denotes a range of control parameters which include I. Similarly, the rendering procedure TSI (transform, sample, and interpolate) for object geometry is factored into a static procedure TSIs and a dynamic procedure TSId such that TSI(G,I)=TSId(TSIs(G,R),I). The factorization of both S and TSI is chosen to significantly reduce the overall rendering time for the evolving scene.Type: GrantFiled: June 18, 1999Date of Patent: March 19, 2002Assignee: Mitsubishi Electric Research Laboratories, INCInventors: Richard C. Waters, Thouis R. Jones, Ronald N. Perry, Larry D. Seiler
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Patent number: 6329977Abstract: A computer graphics system renders an image on a display device using improved pre-filtering techniques that minimize aliasing artifacts in the image, particularly at the endpoints of lines. To anti-alias the image, a plurality of edges are placed near a line in the image. An edge function represents the edge. This edge function is multiplied by a scale factor to produce a distance function. This scale factor is the reciprocal of the Euclidean length of the line. The distance function is evaluated to determine the distance of selected pixels from each edge in units of pixels. These distances determine the intensity value for each selected pixel. Pixels on or beyond an edge, with respect to the line, are given a minimum intensity value; pixels inside all edges are given intensity values corresponding to their distances from the edge. An intensity function describing a relationship between pixel distances from the edges and their corresponding intensity values is developed.Type: GrantFiled: March 10, 1998Date of Patent: December 11, 2001Assignee: Compaq Computer CorporationInventors: Robert S. McNamara, Joel J. McCormack, Norman P. Jouppi, James T. Claffey, James M. Knittel, Larry D. Seiler
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Patent number: 6310620Abstract: A method for rendering a three-dimensional volume onto a two-dimensional image plane partitions translucent portions of the volume as defined by polygons into layers. The layers are sorted in a front-to-back order. A near color buffer is set to a transparent color, and a near depth buffer is set to a near clip surface. Then, the layers are processed in the sorted order by initializing a far color buffer to a background color, initializing a far depth buffer to a far clip surface, drawing a current layer into the far color and depth buffers, and rendering the volume, from the near clip surface to the far clip surface, into the near color and depth buffers. After all of the layers have been processed the far color buffer is reinitialized to the background color, the far depth buffer is reinitialized to the far clip surface, and the volume, from the near clip surface to the far clip surface, is rendered into the near color and depth buffers.Type: GrantFiled: December 22, 1998Date of Patent: October 30, 2001Assignee: Terarecon, Inc.Inventors: Hugh C. Lauer, Larry D. Seiler
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Patent number: 6112318Abstract: An apparatus and method for counting event signals generated by a computer system is described. The event signals are indicative of the performance of the computer system. Programmable logic enhances the functionality of performance counters by enabling the system user to specify, during the execution of an application program, which event signals to count. The system user can dynamically configure the programmable logic to select a subset of the event signals generated by the computer system, and to combine the selected subset of event signals to generate a new event signal that can be counted. Other new event signals can be generated by the programmable logic from the selected subset of event signals. A user of the computer system can dynamically make the selection of any one of the new event signals for counting.Type: GrantFiled: August 11, 1997Date of Patent: August 29, 2000Assignee: Digital Equipment CorporationInventors: Norman P. Jouppi, Joel J. McCormack, Larry D. Seiler, Mark O. Yeager
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Patent number: 5870109Abstract: A graphics system for storing and editing graphic images represented by digital data, includes a frame memory for storing pixel data representing graphic images including first and second graphic objects. The pixel data is stored at addresses, each being associated with one or more graphic fragment forming the first and second graphic objects. First and second addresses are respectively associated with those of the graphic fragments forming the first and second graphic objects. A memory controller controls writing and reading the pixel data to and from the frame memory. A fragment editor is provided to receive the pixel data read from the first address and modify the associated fragment with the received pixel data so as to form modified pixel data. An address detector detects the first address responsive to a request to read the pixel data from the first address and the second address responsive to a subsequent request to read pixel data from the second address.Type: GrantFiled: June 6, 1997Date of Patent: February 9, 1999Assignee: Digital Equipment CorporationInventors: Joel J. McCormack, Christopher C. Gianos, Andrew V. Hoar, Larry D. Seiler, Norman P. Jouppi, James T. Claffey
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Patent number: 5781201Abstract: A method for improving the performance of a graphics system includes the steps of allocating appropriate pixels to slices of memory such that corresponding subsets of bits of neighboring pixels are allocated to different slices of memory, where `neighboring pixels` includes both consecutive pixels in a scan line, or pixels in consecutive scan lines. In addition, hardware is provided that allows for the individual memory slices to be independently accessed, thus allowed each slice to access data from a different 64 bit word in video memory during one video access period. Controllers which independently access the memory slices are advantageously totally time independent, to allow the most flexibility in the starting and finishing of the access of the memory slice. Performance is further gained by buffering of both the read and write requests to the video memory.Type: GrantFiled: May 1, 1996Date of Patent: July 14, 1998Assignee: Digital Equipment CorporationInventors: Joel J. McCormack, Robert S. McNamara, Larry D. Seiler, Christopher C. Gianos
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Patent number: 5696945Abstract: A video subsystem of a computer processor is shown to include a graphics controller coupled to a video memory. A method for improving graphics performance for applications which use fewer bits per pixel than provided in the graphics subsystem includes the steps of rearranging the pixel and byte data in video memory such that corresponding bytes of different pixels are stored in different, simultaneously accessible locations of the video memory. With such an arrangement, accesses to video memory may be provided which utilize all of the available bytes of the video memory bus, thereby increasing the performance of the graphics operation. In addition, a graphics system having a plurality of independently operating memory controllers is shown to further improve graphics performance by ensuring that the video memory bus operates at full capacity.Type: GrantFiled: January 6, 1997Date of Patent: December 9, 1997Assignee: Digital Equipment CorporationInventors: Larry D. Seiler, Robert S. McNamara, Christopher C. Gianos, Joel J. McCormack
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Patent number: 5559953Abstract: An apparatus and method for storing pixel data in a video memory having a plurality of slices increases the performance of line drawing by ensuring that for a given pixel, neighboring pixels in neighboring scan lines are stored in separate slices of video memory. One embodiment of the invention includes the step of appending a number of offset bits to the end of each scan line, where the number of offset bits is less than the total number of bits contained in the plurality of slices. Another embodiment of the invention rearranges the pixels of every other scan line. Another embodiment adds an offset number of pixels which is equal to the number of pixels per slice times the number of slices, then alternates ordered pixels with rearranged pixels throughout successive scan lines. Performance is further increased by providing a plurality of memory controllers corresponding to the plurality of slices of memory which may operate asynchronously to interleave memory access commands.Type: GrantFiled: July 1, 1994Date of Patent: September 24, 1996Assignee: Digital Equipment CorporationInventors: Larry D. Seiler, Robert S. McNamara, Christopher C. Gianos, Joel J. McCormack
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Patent number: 5396263Abstract: This invention allows each of a plurality of windows to use its own distinct datatype and format while more than one window is being displayed on a monitor screen of a computer video graphics system. Different windows can use full color or pseudocolor frame buffer organizations, can use overlay planes or not, and can have other differences in the interpretation of the pixel values without affecting each other. Window dependent pixel datatypes are provided by means of a lookup table that is contained in logic between the frame buffer and the colormap/DAC that drives the monitor. This lookup table contains descriptors for pixel datatypes. It is indexed by a window number that is specified for each pixel. The pixel datatype descriptor accessed at each pixel is then used to control logic that processes that pixel value to create an index for the colormap. This allows each window to specify its own pixel datatype and format, that is used to interpret the pixels contained in the window.Type: GrantFiled: March 10, 1992Date of Patent: March 7, 1995Assignee: Digital Equipment CorporationInventors: Larry D. Seiler, James L. Pappas, Robert C. Rose