Abstract: A method and a device for distinguishing which pixels are to be displayed in a set of overlapping, rectangular windows in video graphics display are provided. Windows are specified as a priority ordered list of rectangles or other shapes, so that each window is computed as being visible at those pixels that are inside its rectangle but outside the rectangles of all higher priority windows. The number of rectangles required is equal to the number of rectangular windows, irrespective of the degree of overlap.

Abstract: A circuit for generating an N by M pixel sprite cursor having edge extension features which are clipped to only appear in preselected windows on a video display. The circuit provides edge extension by extending the pattern appearing in the pixels located along the four edges of the sprite cursor towards the corresponding boundaries of the display. The circuit clips the cursor to preselected windows by determining on a pixel-by pixel basis which window owns the pixel to be displayed and whether the window will permit a cursor to appear in it.

Abstract: A display arrangement in a digital data processing system having an interface for controlling the display of hierarchically arranged display objects, each having associated display criteria, in response to a hierarchically-arranged layer control arrangement. The interface comprises a display criteria testing portion for determining the display criteria for each object, and a layer hierarchy control portion for controlling the creation of said layer control arrangement in response to the display criteria determined by the display criteria testing portion.

Abstract: Pixel formats and a pixel mapping unit for use in a computer graphics terminal which provides an address input to a color look-up table. The disclosed pixel formats can be used to conserve frame buffer memory, color table memory, or both. For example, the formats support pseudo color or full color mapping, overlay planes, and color table bank select while using a minimum amount of memory. A valid plane feature is also supported, which can be used to enable rapid clearing of a window. The pixel mapping unit is especially handy in supporting multiple windows, because a unique mapping configuration word, which specifies how pixels are to be interpreted, may be specified for each window.

Abstract: A method and apparatus for updating the copies of state table values of a video data path chip set for a computer graphics system is provided. The apparatus uses off screen bitmap memory or other dual-ported memory in a frame buffer to store a shadow copy of the state that is stored in the video data path chips. The state tables include such things as color lookup tables, window definitions and cursors. A semaphore is used to prevent screen glitches caused by updating state tables from the copy of state table values that are partially modified. The state tables are loaded into the chips during vertical retrace, when the screen is being blanked. Before the CPU begins to update the shadow copy in the frame buffer, it claims the semaphore. If a vertical retrace occurs before the CPU has completed updating the frame buffer, the chips are not loaded during that vertical retrace. Before the chips start loading, a system timing chip claims the semaphore.

Abstract: A video display system for a computer graphics workstation expands the color look-up table external to the video digital-to-analog (DAC) chip by providing, for each color, a bank of one or more color look-up table extender chips. The extender chips for a given color are connected in series and the banks are connected in parallel between the frame buffer and the video DAC chip. On a pixel-by-pixel basis, and for each color channel, one of the look-up tables afforded by the extender chips or the video DAC chip is accessed using an index from the frame buffer.

Abstract: This invention adds a window dependent base value to the pixel values read from a frame buffer or other source of pixel values. The base value points to the base of the colormap for that window, which is allocated within a larger, physical colormap. Each window can access physical colormap entries starting at its base value and extending up to the base value plus the maximum pixel value used in that window. Adding a window dependent base value to the pixel values for each window allows different windows to use different colormaps, each of which can be allocated to any contiguous set of entries in the physical colormap. Each window's virtual colormap need only use as many entries in the physical colormap as there are entries in the virtual colormap. Finally, virtual colormaps can be compacted or otherwise reallocated in the physical colormap without requiring changes in the pixel values stored in the frame buffer. Only the colormap base values stored for each window need be changed.

Abstract: An image generator (38) in a workstation draws its image data from a pair of frame buffers (32 and 34). The selection between the frame buffers is made by a multiplexer circuit (42) that can switch between frame buffers (32 and 34) on a pixel-by-pixel basis, i.e., different frame buffers can be used during different parts of the same scan frame of a monitor (18) in the image generator (38). A selection-signal source (46), which provides the selection signals for the multiplexer circuit (42), includes a window detector (56), which compares the outputs of counters (72 and 74) that represent the monitor scan position with the outputs of registers (62, 64, 66, and 68) that represent the boundaries of windows used by respective applications that the workstation is running. The source (46) thereby identifies the windows in which the pixel currently being displayed is located, and it employs a priority circuit (76) to identify the one such window having the highest priority.

Abstract: A system and method for testing nodes, or test points, of an integrated circuit are presented. The invention includes a test/load bus which is used to sequentially load test data and other data onto the integrated circuit chip, to sample test points and to read data previously loaded onto the chip. The test/load bus and its control logic are used for both testing the chip and for loading and dumping data from the chip so that the test capability adds little to the area of the chip.