Abstract: A baseband signal converter device for an impulse radio receiver combines multiple converter circuits and an RF amplifier in a single integrated circuit package. Each converter circuit includes an integrator circuit that integrates a portion of each RF pulse during a sampling period triggered by a timing pulse generator. The integrator capacitor is isolated by a pair of Schottky diodes connected to a pair of load resistors. A current equalizer circuit equalizes the current flowing through the load resistors when the integrator is not sampling. Current steering logic transfers load current between the diodes and a constant bias circuit depending on whether a sampling pulse is present.

Abstract: A frame reference signal is produced as a function of a clock signal. A first timing generator generates a coarse timing signal having a nominal period and a transition occurring at a precise temporal position with respect to the nominal period. The nominal period is a function of the frame reference signal. The temporal position is a function of a first input timing command and the clock signal. A second timing generator generates at least one fine timing transition as a function of a second input timing command and the clock signal. A combiner circuit uses the coarse timing signal to select one of the at least one fine timing transitions to output a precise timing signal, wherein the precise timing signal has a high temporal precision with respect to the frame reference signal.

Abstract: A precision timing generator includes a combiner that provides a timing signal by combining a coarse timing signal and a fine timing signal derived from a phase-shifted sinusoidal signal that has a desired phase shift. The coarse timing generator generates the coarse timing signal from a clock signal and a timing command input. The fine timing generator includes a sinusoidal-signal generator that receives the clock signal and generates a sinusoidal signal. The fine timing generator also includes a phase shifter that receives the sinusoidal signal and the timing command input and shifts the phase of the sinusoidal signal based on the timing input to generate the phase shifted sinusoidal signal.

Abstract: In a low-heightened power, low-heightened noise dual gain amplifier, first and second, transistors have their emitter-collector circuits connected in series between the ground and a bus voltage. A radio frequency input terminal is coupled to the bases of both transistors. The first transistor is connected across the ground and an output terminal and operated in the common emitter mode. The first transistor operates as a high gain amplifier. A second transistor is connected across the output terminal and a bus voltage. First and second switching transistors switch first and second biasing sources to render first and second amplifier transistors conducted for operation in the high gain or low gain mode. Additionally, a third switching transistor is ac coupled across the input terminals of the first and second amplifier transistors. The third switching transistor is biased along with the first switching transistor for selectively coupling the RF input to the high gain or low gain amplifying transistor.

Abstract: A chaotic carrier pulse position modulation communication system and method is disclosed. The system includes a transmitter and receiver having matched chaotic pulse regenerators. The chaotic pulse regenerator in the receiver produces a synchronized replica of a chaotic pulse train generated by the regenerator in the transmitter. The pulse train from the transmitter can therefore act as a carrier signal. Data is encoded by the transmitter through selectively altering the interpulse timing between pulses in the chaotic pulse train. The altered pulse train is transmitted as a pulse signal. The receiver can detect whether a particular interpulse interval in the pulse signal has been altered by reference to the synchronized replica it generates, and can therefore detect the data transmitted by the receiver. Preferably, the receiver predicts the earliest moment in time it can expect a next pulse after observation of at least two consecutive pulses.

Abstract: A frame reference signal is produced as a function of a clock signal. A first timing generator generates a coarse timing signal having a nominal period and a transition occurring at a precise temporal position with respect to the nominal period. The nominal period is a function of the frame reference signal. The temporal position is a function of a first input timing command and the clock signal. A second timing generator generates at least one fine timing transition as a function of a second input timing command and the clock signal. A combiner circuit uses the coarse timing signal to select one of the at least one fine timing transitions to output a precise timing signal, wherein the precise timing signal has a high temporal precision with respect to the frame reference signal.

Abstract: A microwave/millimeter wave circuit structure supports discrete circuit elements by flip-chip mounting to an interconnection network on a low cost non-ceramic and non-semiconductor dielectric substrate, preferably Duroid. The necessary precise alignment of the circuit elements with contact pads on the substrate network required for the high operating frequencies is facilitated by oxidizing the interconnection network, but providing the contact pads from a non-oxidizable material to establish a preferential solder bump wetting for the pads. Alternately, the contact bumps on the flip-chips can be precisely positioned through corresponding openings in a passivation layer over the interconnection network. For thin circuit substrates that are too soft for successful flip-chip mounting, stiffening substrates are laminated to the circuit substrates.

Abstract: A microwave/millimeter wave circuit structure supports discrete circuit elements by flip-chip mounting to an interconnection network on a low cost non-ceramic and non-semiconductor dielectric substrate, preferably Duroid. The necessary precise alignment of the circuit elements with contact pads on the substrate network required for the high operating frequencies is facilitated by oxidizing the interconnection network, but providing the contact pads from a non-oxidizable material to establish a preferential solder bump wetting for the pads. Alternately, the contact bumps on the flip-chips can be precisely positioned through corresponding openings in a passivation layer over the interconnection network. For thin circuit substrates that are too soft for successful flip-chip mounting, stiffening substrates are laminated to the circuit substrates.

Abstract: A T/R switch/LNA for a radar's active array antenna includes dissimilar semiconductor devices in a monolithic microwave integrated circuit (MMIC). The devices are selected to best meet the functional requirements of the T/R switch/LNA. In particular, the LNA is realized with a HEMT and the T/R switch is realized with HBTs. The dissimilar devices are adapted from first and second heterostructures that are arranged to be coplanar and separated by an isolation layer.

Abstract: A monolithic microwave integrated circuit is formed by positioning a distributed, transmission-line network over a microwave-device structure. The ground plane of the transmission-line network adjoins an interconnect system of the microwave-device structure and signal lines of the transmission-line network are adapted to communicate with the microwave-device structure through orifices of the ground plane. The invention facilitates the use of low-cost silicon-based transistors in monolithic microwave integrated circuits.

Abstract: High speed Group III-Sb materials are n-doped in a molecular beam epitaxy process by forming a superlattice with n-doped strained layers of a Group III-V compound upon Group III-Sb base layers. The base layers have lower conduction band energy levels than the strained layers, and allow doping electrons from the strained layers to flow into the base layers. The base layers preferably comprise Al.sub.x Ga.sub.1-x Sb, while the strained layers preferably comprise a binary or ternary compound such as Al.sub.y Ga.sub.1-y As having a single Group V component, where x and y are each from 0 to 1.0. The strained layers can be n-doped with silicon or tin, which would produce p-type doping if added directly to the base layers.

Abstract: High speed Group III-Sb materials are n-doped in a molecular beam epitaxy process by forming a superlattice with n-doped strained layers of a Group III-V compound upon Group III-Sb base layers. The base layers have lower conduction band energy levels than the strained layers, and allow doping electrons from the strained layers to flow into the base layers. The base layers preferably comprise Al.sub.x Ga.sub.1-x Sb, while the strained layers preferably comprise a binary or ternary compound such as Al.sub.y Ga.sub.1-y As having a single Group V component, where x and y are each from 0 to 1.0. The strained layers can be n-doped with silicon or tin, which would produce p-type doping if added directly to the base layers.

Abstract: A hybrid power transistor (40) includes a vertical PNP bipolar transistor (42) having a floating base (46). A junction-gate type field-effect transistor (FET) (62) has a lateral N-type channel (64,66) and a vertical electron injection path (54) from the channel (64,66) into the base (46) of the bipolar transistor (42). The FET channel current and thereby the electron injection current are controlled by the FET gate voltage. The injection current conductivity modulates the base (46) and thereby controls the collector current of the bipolar transistor (42). The FET (62) may have a high electron mobility transistor (HEMT), junction-gate field-effect transistor (JFET) or metal-semiconductor field-effect transistor (MESFET) structure. The FET (62) does not require a gate insulating layer, enabling fabrication of the hybrid transistor (40) in the group III-V material system.

Abstract: A translator suitable for use in a computer system provides an interpreter and a translation table defining a state machine. The interpreter steps through the states of the state machine defined in the translation table to perform translation of input characters or codes into output characters or codes. The interpreter is fixed, and does not affect the translation to be performed. The translation function is defined entirely within the translation table, and selecting a different translation table for use by the interpreter selects a different translation function. All of the required actions are defined in the translation table with no additional external procedures being required.

Abstract: A miniature, electrostatically actuated, variable impedance circuit element which is operably tunable in response to control signals. With integrated circuit, thin film processing a fixed circuit member is fabricated on a substrate and a movable circuit member is fabricated over the substrate and is movable relative to the fixed circuit member in response to electrostatic fields produced at armature tabs when the control signals are selectively applied to rows of control electrodes. Embodiments include a variable capacitor and a variable ring resonator.

Abstract: A channel layer, donor layer, Schottky layer, and cap layer are formed on a substrate. A source and drain are formed on the cap layer. A gate is formed on the cap layer, or at the bottom of a recess which is formed through the cap layer and partially extends into the Schottky layer. The donor and Schottky layers are formed of a semiconductive material which includes an oxidizable component such as aluminum. A passivation or stop layer of a lattice-matched, non-oxidizable material is formed underlying the source, drain, and gate, and sealingly overlying the donor layer. The stop layer may be formed between the Schottky layer and the donor layer, or constitute a superlattice in combination with the Schottky layer consisting of alternating stop and Schottky sublayers. Alternatively, the stop layer may sealingly overlie the Schottky layer, and further constitute the cap layer.

Abstract: A miniature, electrostatically actuated, dynamically tunable circuit which is operable to tune a transmission line in response to control signals. This circuit is micromachined with the use of integrated circuit processes such that a fixed transmission line is fabricated on a substrate and a movable signal line is fabricated over the substrate and is movable relative to the fixed transmission line in response to electrostatic fields produced when the control signals are selectively applied to an array of air bridge stator control electrodes which span the transmission line.

Abstract: A miniature, electrostatically actuated, stub tuner which is operable to dynamically tune a transmission line in response to control signals. With the use of integrated circuit processing the transmission line is fabricated on a substrate and at least one stub tuner is fabricated over the substrate and is movable relative to the transmission line in response to electrostatic fields produced when the control signals are selectively applied to rows of control electrodes.

Abstract: A plurality of field effect transistors (FETS) (Q.sub.0 A to Q.sub.n-1 A, and Q.sub.0 B to Q.sub.n-1 B) are arranged in a structure (10) to normally perform a first logic function such as NAND. Selectively implanting the channel region (38) of at least one of the FETs (30) with sufficient ions of a predetermined ion species such that the respective FET (30) maintains a constant logic state (constantly turned ON or OFF) for all logical values of applied gate voltage converts the structure (10) to perform a second logic function such as NOR. Alternatively, one of the logic states may be "stuck high" (constant logical high output) or "stuck low" (constant logical low output). The channel implants are substantially undetectable, rendering the structure (10) highly resistant to reverse engineering.

Abstract: A miniature electrostatically actuated switch and process for fabricating it in which the switch is operable to connect and disconnect one or more transmission lines laid down on a dielectric substrate of an integrated circuit wafer. The switch is fabricated on the integrated circuit wafer using integrated circuit fabrication processes including thin films of conductive materials and photoresist and selective removal of these films. the switch includes a rotating switch blade which rotates about a hub formed on the dielectric substrate under the influence of electrostatic fields created by control pads and other switch elements formed on the dielectric substrate, whereupon a microwave signal can be switchably transmitted along the transmission line formed on the substrate.