Patents by Inventor Le Li

Le Li has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240078168
    Abstract: A method comprises obtaining a test specification document of a user, wherein the test specification document comprises a test scheme based on a natural language; recommending, to the user and based on a first test step in the test scheme, a test interface set comprising a plurality of test interfaces for implementing a second test step, performing, by the user, a selection operation on the test interfaces in the test interface set; and generating, based on the selection operation, one or more test cases.
    Type: Application
    Filed: November 10, 2023
    Publication date: March 7, 2024
    Inventors: Ruiyuan Wan, Le Zhou, Maogui Li, Liping Xu, Shunbin Wang, Ji Wu, Kaiqi Liu
  • Publication number: 20240077621
    Abstract: A target device receives a plurality of pieces of first data, where each piece of the plurality of pieces of first data includes first ephemeris information and/or first almanac information. The target device identifies abnormal first data among the plurality of pieces of first data, where the plurality of pieces of first data include the abnormal first data, and the plurality of pieces of first data are obtained by the target device from a plurality of access network devices. A plurality of pieces of first ephemeris information and/or a plurality of pieces of first almanac information in the plurality of pieces of first data correspond to a first satellite. The target device may determine, by using the plurality of pieces of first ephemeris information and/or the plurality of pieces of first almanac information, that a piece of first ephemeris information and/or a piece of first almanac information is abnormal.
    Type: Application
    Filed: April 27, 2023
    Publication date: March 7, 2024
    Applicant: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Jihong LI, Le GE, Zhaogen YIN, Yang GU
  • Patent number: 11921228
    Abstract: This document describes techniques and systems of a radar system with modified orthogonal linear antenna subarrays and an angle-finding module. The described radar system includes a first one-dimensional (1D) (e.g., linear) subarray; a second 1D subarray positioned orthogonal to the first 1D subarray; and a two-dimensional (2D) subarray. Using electromagnetic energy received by the first 1D subarray and the second 2D subarray, azimuth angles and elevation angles associated with one or more objects can be determined. The radar system associates, using electromagnetic energy received by the 2D subarray, pairs of an azimuth angle and an elevation angle to the respective objects. In this way, the described systems and techniques can reduce the number of antenna elements while maintaining the angular resolution of a rectangular 2D array with similar aperture sizing.
    Type: Grant
    Filed: February 23, 2023
    Date of Patent: March 5, 2024
    Assignee: Aptiv Technologies Limited
    Inventors: Yu Zhang, Le Zheng, Zhengzheng Li, Xin Zhang
  • Publication number: 20240067745
    Abstract: The invention provides an anti-C5 humanized monoclonal antibody with low immunogenicity and low ADCC/CDC function and its application. By modifying the amino acid sequence of the framework region of Eculizumab monoclonal antibody, the immunogenicity was reduced, and the antibody was replaced from IgG2 subtype to IgG1 subtype, and a flexible amino acid sequence was inserted between the CDR3 and CH2 regions of the heavy chain of the IgG1 antibody to reduce the immunogenicity. The purpose of ADCC/CDC function is to improve the stability of the antibody and prolong its half-life. The binding affinity of the monoclonal antibody of the invention to human C5 is similar to that of the original Eculizumab antibody, it can specifically block the complement hemolytic activity of C5 and the production of C5a and can be used for the preparation of C5-targeted paroxysmal nocturnal hemoglobinuria and atypical the drug for the treatment of hemolytic uremic syndrome has excellent clinical therapeutic value.
    Type: Application
    Filed: July 9, 2020
    Publication date: February 29, 2024
    Inventors: Le SUN, Maohua LI, Wenlin REN
  • Publication number: 20240065332
    Abstract: A low-oxygen heating-type cigarette assembly, comprising a low-oxygen heating-type smoking set (B) and a low-oxygen heating-type cigarette (A). The low-oxygen heating-type smoking set (B) comprises a heating section (4) and a smoke extracting member (2) detachably arranged with the heating section (4), wherein the heating section (4) is provided with a cigarette receiving chamber (4-1), and the smoke extracting member (2) comprises a hollow smoke extracting cone (2-1) and a smoke transmission tube (2-2).
    Type: Application
    Filed: December 25, 2020
    Publication date: February 29, 2024
    Inventors: Bin LI, Shuang WANG, Ke ZHANG, Nan DENG, Le WANG, Feng HUANG, Mingjian ZHANG, Bing WANG
  • Patent number: 11906577
    Abstract: The present disclosure provides a pad structure and a testkey structure and a testing method for a semiconductor device. The pad structure includes: an insulating dielectric layer formed on a substrate; a metal interconnection structure formed in the insulating dielectric layer, the metal interconnection structure comprising a first section and a second section, which are insulated from each other; and a pad formed on the top of the insulating dielectric layer so as to be exposed therefrom at least at its top surface, electrically connected to the first section, and insulated from the second section. With this disclosure, reduced capture of plasma is achievable, mitigating adverse impact of plasma on the semiconductor device.
    Type: Grant
    Filed: December 20, 2021
    Date of Patent: February 20, 2024
    Assignee: WUHAN XINXIN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Linzhi Lu, Le Li, Jiwei He
  • Patent number: 11869935
    Abstract: A semiconductor device and a method of fabricating same are disclosed. The semiconductor device includes: an SOI substrate including, stacked from the bottom upward, a lower substrate, a buried insulator layer and a semiconductor layer, wherein active regions surrounded by trench isolation structures are formed in the semiconductor layer; a gate electrode layer formed over the semiconductor layer, the gate electrode layer extending from active regions to trench isolation structures; and a source region and a drain region formed in the active regions that are on opposing sides of the gate electrode layer, wherein at least one end portion of the gate electrode layer laterally spans over interfaces of the active regions and the trench isolation structures toward the source region and/or the drain region. Thereby leakage at the interfaces of the active regions and the trench isolation structures can be reduced, resulting in improved performance of the semiconductor device.
    Type: Grant
    Filed: December 17, 2021
    Date of Patent: January 9, 2024
    Assignee: WUHAN XINXIN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventor: Le Li
  • Patent number: 11854247
    Abstract: A computer device obtains a first face image (IMA) and a second face image (IFA). The device obtains M first image blocks corresponding to facial features from the first face image (IMA), and obtains N second image blocks corresponding to facial features from the second face image (IFA). The device transforms the M first image blocks and the N second image blocks to a feature space to generate M first feature blocks and N second feature blocks. The device selects a subset of the first feature blocks and a subset of the second feature blocks according to a specified control vector. The device generates a first composite feature map based the selected subset of the first feature blocks and the selected subset of the second feature blocks. The device inversely transforms the first composite feature map back to an image space to generate a third face image.
    Type: Grant
    Filed: May 24, 2021
    Date of Patent: December 26, 2023
    Assignee: TENCENT TECHNOLOGY (SHENZHEN) COMPANY LIMITED
    Inventors: Yong Zhang, Le Li, Zhilei Liu, Baoyuan Wu, Yanbo Fan, Zhifeng Li, Wei Liu
  • Publication number: 20230412636
    Abstract: A risk measurement method for a user account, a related apparatus, and an electronic device are applied to a zero trust architecture, to improve security of the zero trust architecture. The method includes: obtaining a user behavior log of a terminal device, determining a behavior feature of a first behavior type to which a user behavior recorded in the user behavior log belongs, and determining a first danger degree value of a user account based on the behavior feature of the first behavior type. In the method, a risk degree of the user account can be evaluated in time directly based on the behavior feature reflected in the user behavior log, and the risk degree does not need to be evaluated until a threat event is generated.
    Type: Application
    Filed: September 1, 2023
    Publication date: December 21, 2023
    Inventors: Jing CUI, Huajia WU, Le LI, Qingrong RUI, Zhihua LI
  • Publication number: 20230399362
    Abstract: The present disclosure relates to cyclic oligopeptides that bind to interleukin-13 (IL-13) which are useful therapeutically in methods of treating or preventing IL-13-associated skin disorders or conditions. The present disclosure also provides methods to treat or prevent IL-13-associated skin disorders or conditions with the IL-13-binding cyclic oligopeptides. The present disclosure further provides methods to produce the IL-13-binding cyclic oligopeptides.
    Type: Application
    Filed: June 13, 2023
    Publication date: December 14, 2023
    Inventors: Xuefei Bai, Sheng Lin, Le Li
  • Publication number: 20230362202
    Abstract: A method for determining a trusted terminal and a related apparatus, which are applied to a zero trust network security architecture, improves security of the zero trust architecture. The method includes: a terminal sends an access request when the terminal accesses an application server. A policy control apparatus sends an HTTPS connection request to the terminal based on the access request from the terminal. The terminal sends verification information to the policy control apparatus based on the HTTPS connection request. The policy control apparatus performs verification on the verification information. After the verification on the verification information succeeds, the terminal successfully establishes an HTTPS connection to the policy control apparatus. The HTTPS connection indicates that the terminal is a trusted terminal.
    Type: Application
    Filed: July 11, 2023
    Publication date: November 9, 2023
    Inventors: Le LI, Huajia WU, Yongqiang XU, Xiaolei CHENG
  • Publication number: 20230328063
    Abstract: A policy control apparatus performs identity authentication on a terminal. After the identity authentication on the terminal succeeds, the policy control apparatus generates a trust identifier and sends the trust identifier to the terminal. The terminal saves the trust identifier. When the terminal needs to access an application server, an environment awareness client installed in the terminal obtains the trust identifier from a location at which the trust identifier is saved in the terminal. The terminal sends an access request that carries a trust identifier to the policy control apparatus. The policy control apparatus determines, based on the trust identifier, that the terminal is a trusted terminal.
    Type: Application
    Filed: May 18, 2023
    Publication date: October 12, 2023
    Inventors: Le Li, Huajia Wu, Yongqiang Xu, Xiaolei Cheng
  • Publication number: 20230326501
    Abstract: A memory device includes a memory array, a first latch and a first logic element. The memory array is configured to operate according to a first global write signal. The first latch is configured to generate a first latch write data based on a clock signal. The first logic element is configured to generate the first global write signal based on the clock signal and the first latch write data.
    Type: Application
    Filed: June 16, 2023
    Publication date: October 12, 2023
    Applicants: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., TSMC Nanjing Company Limited, TSMC China Company Limited
    Inventors: He-Zhou WAN, Xiu-Li YANG, Pei-Le LI, Ching-Wei WU
  • Patent number: 11761801
    Abstract: The present disclosure provides a multi-layer open channel portable flow measuring device based on a water impulse principle and a flow measuring method; an instantaneous water head height of a water-carrying section, namely, a water level H is measured through a pressure sensor at a bottom of a U-shaped hollow tube; at the same time, layered multi-point velocity measuring components in equidistant layout include a series of position “current meters” composed of tension sensors, hollow punching lightweight steel balls and lightweight elastic steel ropes to measure velocities V1-n of different points, n depends on the layer decided to be arranged according to a channel depth, an instantaneous flow value of the whole water-carrying section is further acquired through multi-layer flow accumulation, and with a simple structure, intelligent control, easy operation and convenient carrying, the present disclosure may further improve the flow measuring precision.
    Type: Grant
    Filed: December 28, 2022
    Date of Patent: September 19, 2023
    Assignee: Soil and Water Conservation Monitoring Center of Pearl River Basin, Pearl River Water Resources Commission of the Ministry of Water Resources
    Inventors: Hao Li, Le Li, Bin Liu, Pingwei Jin, Jun Huang, Xuebing Jiang, Xinyue Kou, Liping Lin, Zhou Xu, Guangyan Wu, Bin Yin, Xiaolin Liu
  • Publication number: 20230258485
    Abstract: The present disclosure provides a multi-layer open channel portable flow measuring device based on a water impulse principle and a flow measuring method; an instantaneous water head height of a water-carrying section, namely, a water level H is measured through a pressure sensor at a bottom of a U-shaped hollow tube; at the same time, layered multi-point velocity measuring components in equidistant layout include a series of position “current meters” composed of tension sensors, hollow punching lightweight steel balls and lightweight elastic steel ropes to measure velocities V1-n of different points, n depends on the layer decided to be arranged according to a channel depth, an instantaneous flow value of the whole water-carrying section is further acquired through multi-layer flow accumulation, and with a simple structure, intelligent control, easy operation and convenient carrying, the present disclosure may further improve the flow measuring precision.
    Type: Application
    Filed: December 28, 2022
    Publication date: August 17, 2023
    Inventors: Hao Li, Le Li, Bin Liu, Pingwei Jin, Jun Huang, Xuebing Jiang, Xinyue Kou, Liping Lin, Zhou Xu, Guangyan Wu, Bin Yin, Xiaolin Liu
  • Patent number: 11721374
    Abstract: A memory device includes a local input/output circuit and a main input/output circuit. The local input/output circuit is configured to generate a first local write signal based on a first global write signal and a second global write signal, and configured to transmit the first local write signal to a plurality of first bit lines. The main input/output circuit include a first latch and logic elements. The first latch is configured to generate a first bit write mask signal based on a clock signal. The logic elements are configured to generate the first global write signal and the second global write signal based on the clock signal and the first bit write mask signal.
    Type: Grant
    Filed: June 29, 2022
    Date of Patent: August 8, 2023
    Assignees: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., TSMC NANJING COMPANY LIMITED, TSMC CHINA COMPANY LIMITED
    Inventors: He-Zhou Wan, Xiu-Li Yang, Pei-Le Li, Ching-Wei Wu
  • Patent number: 11675082
    Abstract: A device for optical distance measurement includes a light emitter configured to emit light to a target object; a light receiver configured to receive reflected light obtained after the light is emitted to the target object, wherein the light receiver comprises a lens and an array image sensor containing a photosensitive area which is divided into one or more photosensitive sub-areas configured to collect one or more light spots of the reflected light; and the light receiver is further configured to generate a response signal comprising position information of the one or more light spots of the reflected light; and a processor configured to receive the response signal generated by the light receiver and calculate, according to the position information of the light spots of the reflected light, a distance from the target object to the device for optical distance measurement by triangulation method.
    Type: Grant
    Filed: March 23, 2020
    Date of Patent: June 13, 2023
    Assignee: SHENZHEN CAMSENSE TECHNOLOGIES CO., LTD
    Inventors: Kun Zhou, Le Li, Lei Yuan, Guangxi Zeng
  • Patent number: 11625132
    Abstract: A touch pad includes a first conductive pattern layer, a second conductive pattern layer, a first trace, a second trace, a first bonding pad, and a second bonding pad. The first conductive pattern layer includes a first touch electrode extending in a first direction. The second conductive pattern layer includes a second touch electrode extending in a second direction. A first end of the first trace is coupled to the first touch electrode, and a second end of the first trace is coupled to the first bonding pad. A first end of the second trace is coupled to the second touch electrode, and a second end of the second trace is coupled to the second bonding pad. The first direction intersects the second direction.
    Type: Grant
    Filed: September 30, 2021
    Date of Patent: April 11, 2023
    Assignees: HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Zhao Dong, Bisheng Li, Baoran Li, Le Li, Qidi Wu
  • Patent number: 11587848
    Abstract: Semiconductor structure and its fabrication method are provided. The method includes providing a substrate, where the substrate includes a first region having a first metal structure and a second region having a second metal structure; forming a device layer on each of top surfaces of the substrate, the first metal structure and the second metal structure; forming a first through hole in the device layer at the first region, where the first through hole exposes at least a portion of surfaces of the first metal structure, and forming a second through hole in the device layer at the second region, where the second through hole passes through the first device and exposes at least a portion of surfaces of the second metal structure; and using a selective metal growth process, forming a first plug in the first through hole and forming a second plug in the second through hole.
    Type: Grant
    Filed: September 29, 2020
    Date of Patent: February 21, 2023
    Assignees: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION, SEMICONDUCTOR MANUFACTURING INTERNATIONAL (BEIJING) CORPORATION
    Inventors: Yi Lu, Xiaohui Zhuang, Yihui Lin, Liang Wang, Le Li, Kaige Gao, Wenjie Zhu, Jialin Zhao
  • Publication number: 20220415644
    Abstract: A semiconductor device and a method of fabricating the semiconductor device are disclosed. The method includes: providing a device wafer and a carrier wafer, the device wafer including an SOI substrate comprising, stacked from the bottom upward, a lower substrate, a buried insulator layer and a semiconductor layer; bonding the device wafer at a front side thereof to the carrier wafer; removing at least the lower substrate through thinning the device wafer from a backside thereof, wherein the backside of the device wafer opposes the front side thereof; and providing a high-resistance substrate and bonding the device wafer at the backside thereof to the high-resistance substrate, the high-resistance substrate having a resistivity higher than that of the lower substrate. With the present disclosure, lower signal loss and improved signal linearity can be achieved while avoiding a significant cost increase.
    Type: Application
    Filed: December 30, 2021
    Publication date: December 29, 2022
    Inventors: Le LI, Jun ZHOU, Sheng HU