Patents by Inventor Lee Chen

Lee Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11988706
    Abstract: A voltage sensor system for determining an abnormal circuit condition in a multi-layer printed circuit board is disclosed. The printed circuit board has a plurality of layers. One of the layers includes a trace network and a sensor circuit. The sensor circuit includes the trace network and a sensing point. The sensor circuit is coupled between a voltage supply and a ground. A controller is coupled to the sensing point. The controller is operable to determine a voltage of the sensing point and compare the voltage to a threshold value to determine an abnormal circuit condition in the printed circuit board.
    Type: Grant
    Filed: December 29, 2021
    Date of Patent: May 21, 2024
    Assignee: QUANTA COMPUTER INC.
    Inventors: Yangtzu Lee, Wei-Chih Chen, Pin-Hao Hung
  • Patent number: 11990182
    Abstract: An operation method for a memory device is provided. The memory device includes a two-terminal selector and a resistance variable storage element coupled to the two-terminal selector. The method includes providing a voltage pulse to the memory device. A voltage applied across the two-terminal selector during a falling part of the voltage pulse falls below a holding voltage of the two-terminal selector. A voltage falling rate of the falling part at which the voltage applied across the two-terminal selector reaches the holding voltage is raised for reducing threshold voltage drift of the two-terminal selector.
    Type: Grant
    Filed: January 18, 2022
    Date of Patent: May 21, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hengyuan Lee, Cheng-Hsien Wu, Yu-Sheng Chen, Elia Ambrosi, Chien-Min Lee, Xinyu Bao
  • Publication number: 20240158404
    Abstract: Novel compounds, compositions, and methods of using and preparing the same, which may be useful for treating alpha-1 antitrypsin deficiency (AATD).
    Type: Application
    Filed: September 8, 2023
    Publication date: May 16, 2024
    Inventors: Ronald Lee Grey, JR., Emily Elizabeth Allen, Michael J. Boyd, Robert F. Fimognari, JR., Simon Giroux, Michelle Lai-Chen, Ales Medek, Mengqi Li, Christopher David Poff, Daniel Tyler Richter, Tony Z. Scott, Kathleen Paige Sokolowsky, Jeffrey Braden Sperry, Charlene Tsay, Xiaoxu Wang, Mariam Zaky, Chenlong Zhang
  • Publication number: 20240160372
    Abstract: Provided is a method for managing a data migration operation, including creating, by a storage device, a read submission queue entry indicating a location of data at a source storage of the storage device to be copied from the source storage to a target storage, the read submission queue entry including a field including metadata including information for reading the data from the source storage.
    Type: Application
    Filed: January 13, 2023
    Publication date: May 16, 2024
    Inventors: Daniel Lee HELMICK, Chun-Chu Chen-Jhy Archie WU
  • Publication number: 20240150183
    Abstract: A silica aerogel having a mean pore size less than 5 nm with a standard deviation of 3 nm. The silica aerogel may have greater than 95% solar-weighted transmittance at a thickness of 8 mm for wavelengths in the range of 250 nm to 2500 nm, and a 400° C. black-body weighted specific extinction coefficient of greater than 8 m2/kg for wavelengths of 1.5 ?m to 15 ?m. Silica aerogel synthesis methods are described. A solar thermal aerogel receiver (STAR) may include an opaque frame defining an opening, an aerogel layer disposed in the opaque frame, with at least a portion of the aerogel layer being proximate the opening, and a heat transfer fluid pipe in thermal contact with and proximate the aerogel layer. A concentrating solar energy system may include a STAR and at least one reflector to direct sunlight to an opening in the STAR.
    Type: Application
    Filed: November 14, 2023
    Publication date: May 9, 2024
    Inventors: Gang Chen, Evelyn N. Wang, Svetlana Boriskina, Lee A. Weinstein, Sungwoo Yang, Bikramjit S. Bhatia, Lin Zhao, Elise M. Strobach, Thomas A. Cooper, David M. Bierman, Xiaopeng Huang, James Loomis
  • Publication number: 20240144999
    Abstract: A memory circuit and a method for reading a memory circuit are provided. The memory circuit includes reference memory cells and operation memory cells. The method includes reading a selected reference memory cell at a first time to get a first voltage; reading the selected reference memory cell at a second time after the first time to get a second voltage; adjusting a read voltage of the memory cell to be an adjusted read voltage of the memory cell according to the voltage difference between the first voltage and the second voltage; applying the adjusted read voltage on a selected operation memory cell corresponding to the selected reference memory cell; and applying the adjusted read voltage on other selected operation memory cells in a same row of the memory array corresponding to the selected reference memory cell.
    Type: Application
    Filed: February 2, 2023
    Publication date: May 2, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hengyuan Lee, Yu-Sheng Chen, Xinyu BAO
  • Publication number: 20240147825
    Abstract: Examples disclosed herein relate to device. The device includes a substrate, a plurality of adjacent pixel-defining layer (PDL structures disposed over the substrate, and a plurality of sub-pixels. The PDL structure have a top surface coupled to adjacent sidewalls of the PDL structure. The plurality of sub-pixels are defined by the PDL structures. Each sub-pixel includes an anode, an organic light emitting diode (OLED), a cathode, and an encapsulation layer. The organic light emitting diode (OLED) material disposed over the anode. The OLED material extends over the top surface of the PDL structure past the adjacent sidewalls. The cathode is disposed over the OLED material. The cathode extends over the top surface of the PDL structure past the adjacent sidewalls. The encapsulation layer is disposed over the cathode. The encapsulation layer has a first sidewall and a second sidewall.
    Type: Application
    Filed: October 26, 2022
    Publication date: May 2, 2024
    Inventors: Chung-chia CHEN, Yu-Hsin LIN, Ji Young CHOUNG, Jungmin LEE, Wen-Hao WU, Dieter HAAS
  • Publication number: 20240144904
    Abstract: Described herein are window retrofits including a monolithic silica aerogel slab having (i) an average haze value of <5% as calculated in accordance with ASTM standard D1003-13 and (ii) a U-factor of <0.5 BTU/sf/hr/° F., and a transparent polymer envelope sealed at an internal pressure of ?1 atmosphere, wherein the monolithic silica aerogel slab is encapsulated in the transparent polymer envelope. The monolithic aerogel slab can have a transmittance>94% at 8 mm thickness. The window retrofit can be bonded to a glass sheet.
    Type: Application
    Filed: June 27, 2023
    Publication date: May 2, 2024
    Inventors: Evelyn N. Wang, Gang Chen, Xuanhe Zhao, Elise M. Strobach, Bikramjit S. Bhatia, Lin Zhao, Sungwoo Yang, Lee A. Weinstein, Thomas A. Cooper, Shaoting Lin
  • Publication number: 20240131029
    Abstract: The present disclosure provides methods and compositions for treating a condition associated with impaired lymphatic drainage.
    Type: Application
    Filed: February 3, 2022
    Publication date: April 25, 2024
    Applicants: President and Fellows of Harvard College, Trustees of Boston University
    Inventors: Esak Lee, Christopher S. Chen
  • Publication number: 20240135859
    Abstract: A gamma tap circuit includes: (i) a first gamma division circuit configured to generate a first gamma tap voltage by performing voltage division of an upper gamma tap voltage and a lower gamma tap voltage, in-sync with a first clock signal CK1 and a first complementary clock signal CK1b, which is 180° out-of-phase relative to CK1, (ii) a second gamma division circuit configured to generate a second gamma tap voltage by performing voltage division of the upper gamma tap voltage and the first gamma tap voltage, in-sync with a second clock signal CK2 and a second complementary clock signal CK2b, which is 180° out-of-phase relative to CK2, and (iii) a third gamma division circuit configured to generate a third gamma tap voltage by performing voltage division of the first gamma tap voltage and the lower gamma tap voltage, in response to CK2 and CK2b, which have a lower frequency relative to CK1 and CK1b.
    Type: Application
    Filed: September 13, 2023
    Publication date: April 25, 2024
    Inventors: Ying-Da Chang, Chulho Choi, Yu-Chieh Huang, Ching-Chieh Wu, Hajoon Shin, Zhen-Guo Ding, Jia-Way Chen, Kyunlyeol Lee, Yongjoo Song
  • Publication number: 20240127987
    Abstract: An integrated over-current protection device includes a positive temperature coefficient (PTC) component, a first conductive unit, a second conductive unit, a first conductive via, and a second conductive via. The PTC component includes a first PTC body, and has opposing first and second surfaces. The first conductive unit is disposed on the first surface, and includes a first electrode and a first conductive pad electrically insulated from the first electrode. The second conductive unit is disposed on the second surface, and includes a second electrode and a second conductive pad electrically insulated from the second electrode. The first conductive via extends through the first conductive unit and the PTC component to electrically connect the first electrode to the second conductive pad. The second conductive via extends through the second conductive unit and the PTC component to electrically connect the second electrode to the first conductive pad.
    Type: Application
    Filed: October 17, 2022
    Publication date: April 18, 2024
    Inventors: Jack Jih-Sang CHEN, Chang-Hung JIANG, Ching-Chiang YEH, Ming-Chun LEE
  • Publication number: 20240129305
    Abstract: An apparatus may include a device comprising a controller configured to perform, using a first namespace identifier, a first access of a namespace of the device, wherein the device may be configured to perform, using a second namespace identifier, a second access of the namespace of the device, and wherein the second namespace identifier may include first information to determine the first namespace identifier, and second information to identify the controller. The first information may include the first namespace identifier, and the second information may include a controller identifier for the controller. The second namespace identifier may include the first namespace identifier concatenated with the controller identifier. The controller may include at least a portion of a communication endpoint. The device may further include a second controller configured to perform the second access. The first controller may include a child controller, and the second controller may include a parent controller.
    Type: Application
    Filed: July 19, 2023
    Publication date: April 18, 2024
    Inventors: Sang Young YE, Daniel Lee HELMICK, Chun-Chu Chen-Jhy Archie WU
  • Publication number: 20240129766
    Abstract: A throttle control method for a mobile device include collecting input data, generating a first set of user experience indices according to the input data, and checking whether a user experience index of the first set of user experience indices satisfies a UEI threshold. The input data includes common information data, current configuration data and a plurality of throttle control parameters. Each user experience index of the first set of user experience indices is corresponding to at least one of throttle control parameter of the plurality of throttle control parameters.
    Type: Application
    Filed: April 10, 2023
    Publication date: April 18, 2024
    Applicant: MediaTek Singapore Pte. Ltd.
    Inventors: Hung-Yueh Chen, Byeng Hyun Kim, JUNG SHUP SHIN, Shih-Hsin Chen, Chih-Chieh Lai, Chung-Pi Lee, JUNGWOO LEE, Yu-Lun Chang
  • Publication number: 20240121995
    Abstract: Embodiments described herein relate to a sub-pixel. The sub-pixel includes an anode, overhang structures, separation structures, an organic light emitting diode (OLED) material, and a cathode. The anode is defined by adjacent first pixel isolation structures (PIS) and adjacent second PIS. The overhang structures are disposed on the first PIS. The overhang structures include a second structure disposed over the first structure and an intermediate structure disposed between the second structure and the first structure. A bottom surface of the second structure extends laterally past an upper surface of the first structure. The first structure is disposed over the first PIS. Separation structures are disposed over the second PIS. The OLED material is disposed over the anode and an upper surface of the separation structures. The cathode disposed over the OLED material and an upper surface of the separation structures.
    Type: Application
    Filed: December 19, 2023
    Publication date: April 11, 2024
    Inventors: Jungmin LEE, Chung-chia CHEN, Ji Young CHOUNG, Yu-hsin LIN
  • Publication number: 20240114727
    Abstract: Embodiments described herein relate to a sub-pixel. The sub-pixel includes an anode, overhang structures, separation structures, an organic light emitting diode (OLED) material, and a cathode. The anode is defined by adjacent first pixel isolation structures (PIS) and adjacent second PIS. The overhang structures are disposed on the first PIS. The overhang structures include a second structure disposed over the first structure and an intermediate structure disposed between the second structure and the first structure. A bottom surface of the second structure extends laterally past an upper surface of the first structure. The first structure is disposed over the first PIS. Separation structures are disposed over the second PIS. The OLED material is disposed over the anode and an upper surface of the separation structures. The cathode disposed over the OLED material and an upper surface of the separation structures.
    Type: Application
    Filed: December 5, 2023
    Publication date: April 4, 2024
    Inventors: Jungmin LEE, Chung-chia CHEN, Ji Young CHOUNG, Yu-hsin LIN
  • Publication number: 20240101602
    Abstract: Provided is a peptide and method in preventing or treating infections caused by a wide spectrum of pathogens, including bacteria and fungus in hosts such as plants and animals. Methods of preventing or treating plant diseases and infection in animals are also provided.
    Type: Application
    Filed: November 24, 2021
    Publication date: March 28, 2024
    Inventors: Rita P.Y. Chen, Chiu-Ping CHENG, Chien-Chih YANG, Kung-Ta LEE, Ying-Lien CHEN, Li-Hang Hsu, Hsin-Liang CHEN, Sung CHEN
  • Publication number: 20240107819
    Abstract: Embodiments described herein relate to a sub-pixel. The sub-pixel includes an anode, overhang structures, separation structures, an organic light emitting diode (OLED) material, and a cathode. The anode is defined by adjacent first pixel isolation structures (PIS) and adjacent second PIS. The overhang structures are disposed on the first PIS. The overhang structures include a second structure disposed over the first structure and an intermediate structure disposed between the second structure and the first structure. A bottom surface of the second structure extends laterally past an upper surface of the first structure. The first structure is disposed over the first PIS. Separation structures are disposed over the second PIS. The OLED material is disposed over the anode and an upper surface of the separation structures. The cathode disposed over the OLED material and an upper surface of the separation structures.
    Type: Application
    Filed: December 5, 2023
    Publication date: March 28, 2024
    Inventors: Jungmin LEE, Chung-chia CHEN, Ji Young CHOUNG, Yu-hsin LIN
  • Patent number: 11935826
    Abstract: A method includes depositing a first passivation layer over a conductive feature, wherein the first passivation layer has a first dielectric constant, forming a capacitor over the first passivation layer, and depositing a second passivation layer over the capacitor, wherein the second passivation layer has a second dielectric constant greater than the first dielectric constant. The method further includes forming a redistribution line over and electrically connecting to the capacitor, depositing a third passivation layer over the redistribution line, and forming an Under-Bump-Metallurgy (UBM) penetrating through the third passivation layer to electrically connect to the redistribution line.
    Type: Grant
    Filed: March 10, 2021
    Date of Patent: March 19, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chia-Ming Huang, Ming-Da Cheng, Songbor Lee, Jung-You Chen, Ching-Hua Kuan, Tzy-Kuang Lee
  • Patent number: 11935894
    Abstract: An integrated circuit device includes a device layer having devices spaced in accordance with a predetermined device pitch, a first metal interconnection layer disposed above the device layer and coupled to the device layer, and a second metal interconnection layer disposed above the first metal interconnection layer and coupled to the first metal interconnection layer through a first via layer. The second metal interconnection layer has metal lines spaced in accordance with a predetermined metal line pitch, and a ratio of the predetermined metal line pitch to predetermined device pitch is less than 1.
    Type: Grant
    Filed: November 4, 2022
    Date of Patent: March 19, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Fong-yuan Chang, Chun-Chen Chen, Po-Hsiang Huang, Lee-Chung Lu, Chung-Te Lin, Jerry Chang Jui Kao, Sheng-Hsiung Chen, Chin-Chou Liu
  • Patent number: 11921325
    Abstract: A semiconductor device is provided. The semiconductor device includes a waveguide over a substrate. The semiconductor device includes a first dielectric structure over the substrate, wherein a portion of the waveguide is in the first dielectric structure. The semiconductor device includes a second dielectric structure under the waveguide, wherein a first sidewall of the second dielectric structure is adjacent a first sidewall of the substrate.
    Type: Grant
    Filed: February 27, 2020
    Date of Patent: March 5, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LIMITED
    Inventors: Yi-Chen Chen, Lee-Chuan Tseng, Shih-Wei Lin