Abstract: A semiconductor structure and a method for forming the same are provided. The semiconductor structure comprises a substrate, a gate structure over a first surface of the substrate, and a source region and a drain region in the substrate adjacent to the gate structure. The semiconductor structure further comprises a channel region interposing the source and drain regions and underlying the gate structure. The semiconductor structure further comprises a first layer over a second surface of the substrate opposite to the first surface, and a second layer over the first layer. The semiconductor structure further comprises a sensing film over the channel region and at least a portion of the first and second layers, and a well over the sensing film and cutting off the first layer and the second layer.

Abstract: A method and apparatus for etching a wafer are provided. The method includes placing a first wafer with a first target material into a first chamber, and placing a second wafer with a second target material into a second chamber. The second chamber is connected to the first chamber by a first pipe. The method also includes applying a first Xe-containing gaseous etchant into the first chamber to etch the first target material. A portion of the first Xe-containing gaseous etchant in the first chamber is unreacted during the etching of the first target material. The method further includes applying the unreacted portion of the first Xe-containing gaseous etchant from the first chamber into the second chamber through the first pipe to etch the second target material of the second wafer.

Abstract: Structures and formation methods of a MEMS device structure are provided. The MEMS device structure includes a semiconductor substrate having a first region and a second region, and a MEMS layer over the semiconductor substrate. The MEMS layer has a first through hole positioned in the first region and a second through hole positioned in the second region. The MEMS device structure also includes a cap layer over the MEMS layer, a first cavity between the semiconductor substrate and the cap layer and in the first region, and a second cavity between the semiconductor substrate and the cap layer and in the second region. The MEMS device structure further includes a carbon-based degradation product in the first cavity.

Abstract: A semiconductor structure includes a substrate, a hole which includes a top hole and a bottom hole in communication with each other in the substrate, and a filler in the top hole and the bottom hole, wherein the top hole tapers toward the bottom hole, and a side surface of the top hole and a side surface of the bottom hole form an obtuse angle.

Abstract: A microelectromechanical systems (MEMS) structure with a cavity hermetically sealed using a mask layer is provided. A capping substrate is arranged over a MEMS substrate, which includes a movable element. The capping substrate includes the cavity arranged over and opening to the movable element, and includes a seal opening in fluid communication with the cavity. The mask layer is arranged over the capping substrate. The mask layer overhangs the seal opening and laterally surrounds a mask opening arranged over the seal opening. A seal layer is arranged over the mask layer and the mask opening. The seal layer is configured to hermetically seal the cavity. A method for manufacturing the MEMS structure is also provided.

Abstract: The present disclosure involves forming a method of fabricating a Micro-Electro-Mechanical System (MEMS) device. A plurality of openings is formed in a first side of a first substrate. A dielectric layer is formed over the first side of the substrate. A plurality of segments of the dielectric layer fills the openings. The first side of the first substrate is bonded to a second substrate that contains a cavity. The bonding is performed such that the segments of the dielectric layer are disposed over the cavity. A portion of the first substrate disposed over the cavity is transformed into a plurality of movable components of a MEMS device. The movable components are in physical contact with the dielectric the layer. Thereafter, a portion of the dielectric layer is removed without using liquid chemicals.

Abstract: A method for performing a high aspect ratio etch is provided. A semiconductor substrate is provided with a hard mask layer arranged over the semiconductor substrate. A first etch is performed into the hard mask layer to form a hard mask opening exposing the semiconductor substrate. The hard mask opening has a bottom width. A second etch is performed into the semiconductor substrate, through the hard mask opening, to form a substrate opening with a top width that is about equal to the bottom width of the hard mask opening. A protective layer is formed lining a sidewall of the substrate opening. A third etch is performed into the semiconductor substrate, through the hard mask opening, to increase a height of the substrate opening. The top width of the substrate opening remains substantially unchanged during the third etch. A semiconductor structure with a high aspect ratio opening is also provided.

Abstract: Some embodiments relate to an integrated circuit (IC) disposed on a silicon substrate, which includes a well region having a first conductivity type. A dielectric layer is arranged over an upper surface of the silicon substrate, and extends over outer edges of the well region and includes an opening that leaves an inner portion of the well region exposed. An epitaxial pillar of SiGe or Ge extends upward from the inner portion of the well region. The epitaxial pillar includes a lower epitaxial region having the first conductivity type and an upper epitaxial region having a second conductivity type, which is opposite the first conductivity type. A dielectric sidewall structure surrounds the epitaxial pillar and has a bottom surface that rests on an upper surface of the dielectric layer.

Abstract: The present disclosure involves forming a method of fabricating a Micro-Electro-Mechanical System (MEMS) device. A plurality of openings is formed in a first side of a first substrate. A dielectric layer is formed over the first side of the substrate. A plurality of segments of the dielectric layer fills the openings. The first side of the first substrate is bonded to a second substrate that contains a cavity. The bonding is performed such that the segments of the dielectric layer are disposed over the cavity. A portion of the first substrate disposed over the cavity is transformed into a plurality of movable components of a MEMS device. The movable components are in physical contact with the dielectric the layer. Thereafter, a portion of the dielectric layer is removed without using liquid chemicals.

Abstract: A semiconductor arrangement and methods of formation are provided. The semiconductor arrangement includes a micro-electro mechanical system (MEMS). A via opening is formed through a substrate, first dielectric layer and a first plug of the MEMS. The first plug comprises a first material, where the first material has an etch selectivity different than an etch selectivity of the first dielectric layer. The different etch selectivity of first plug allows the via opening to be formed relatively quickly and with a relatively high aspect ratio and desired a profile, as compared to forming the via opening without using the first plug.

Abstract: A bio-sensing semiconductor structure is provided. A transistor includes a channel region and a gate underlying the channel region. A first dielectric layer overlies the transistor. A first opening extends through the first dielectric layer to expose the channel region. A bio-sensing layer lines the first opening and covers an upper surface of the channel region. A second dielectric layer lines the first opening over the bio-sensing layer. A second opening within the first opening extends to the bio-sensing layer, through a region of the second dielectric layer overlying the channel region. A method for manufacturing the bio-sensing semiconductor structure is also provided.

Abstract: The present disclosure provides a method for manufacturing a CMOS-MEMS structure. The method includes etching a cavity on a first surface of a cap substrate; bonding the first surface of the cap substrate with a sensing substrate; thinning a second surface of the sensing substrate, the second surface being opposite to a third surface of the sensing substrate bonded to the cap substrate; etching the second surface of the sensing substrate; patterning a portion of the second surface of the sensing substrate to form a plurality of bonding regions; depositing an eutectic metal layer on the plurality of bonding regions; etching a portion of the sensing substrate under the cavity to form a movable element; and bonding the sensing substrate to a CMOS substrate through the eutectic metal layer.

Abstract: A semiconductor arrangement and methods of formation are provided. The semiconductor arrangement includes a micro-electro mechanical system (MEMS). A via opening is formed through a substrate, first dielectric layer and a first plug of the MEMS. The first plug comprises a first material, where the first material has an etch selectivity different than an etch selectivity of the first dielectric layer. The different etch selectivity of first plug allows the via opening to be formed relatively quickly and with a relatively high aspect ratio and desired a profile, as compared to forming the via opening without using the first plug.

Abstract: The present disclosure provides a method for manufacturing a CMOS-MEMS structure. The method includes etching a cavity on a first surface of a cap substrate; bonding the first surface of the cap substrate with a sensing substrate; thinning a second surface of the sensing substrate, the second surface being opposite to a third surface of the sensing substrate bonded to the cap substrate; etching the second surface of the sensing substrate; patterning a portion of the second surface of the sensing substrate to form a plurality of bonding regions; depositing an eutectic metal layer on the plurality of bonding regions; etching a portion of the sensing substrate under the cavity to form a movable element; and bonding the sensing substrate to a CMOS substrate through the eutectic metal layer.

Abstract: The present disclosure relates to an integrated chip having an integrated bio-sensor with a sensing well having one or more sensing well spacers that reduce a size of the sensing well after its formation. In some embodiments, the integrated bio-sensor has a sensing device disposed within a semiconductor substrate. A dielectric structure is disposed onto a first side of the semiconductor substrate. The dielectric structure has an opening with a first width, which is exposed to an ambient environment and that overlies the sensing device. One or more sensing well spacers are arranged on sidewalls of the opening. The one or more sensing well spacers expose a bottom surface of the opening to define a sensing well having a second width that is smaller than the first width.

Abstract: A bio-sensing semiconductor structure is provided. A transistor includes a channel region and a gate underlying the channel region. A first dielectric layer overlies the transistor. A first opening extends through the first dielectric layer to expose the channel region. A bio-sensing layer lines the first opening and covers an upper surface of the channel region. A second dielectric layer lines the first opening over the bio-sensing layer. A second opening within the first opening extends to the bio-sensing layer, through a region of the second dielectric layer overlying the channel region. A method for manufacturing the bio-sensing semiconductor structure is also provided.

Abstract: A method of manufacturing a semiconductor device is provided. The method includes the following operations. (a) A substrate is patterned. (b) A polymer layer is formed on the patterned substrate. (c) The polymer layer is patterned. Steps (a), (b) and (c) are repeated alternatingly. An intensity of an emission light generated by a reaction of a plasma and a product produced in steps (a), (b) and (c) is detected. An endpoint in patterning the substrate is determined according to the intensity of the emission light generated by the reaction of the plasma and the product produced in only one step of steps (a), (b) and (c). A sampling rate of the intensity is ranged from 1 pt/20 ms to 1 pt/100 ms. A smooth function is used to process the intensity of the emission light generated by the reaction of the plasma and the product.

Abstract: A semiconductor structure includes: a first device; a second device contacted with the first device, wherein a chamber is formed between the first device and the second device; a first hole disposed in the second device and defined between a first end with a first circumference and a second end with a second circumference; a second hole disposed in the second device and aligned to the first hole; and a sealing object for sealing the second hole. The first end links with the chamber, and the first circumference is different from the second circumference, the second hole is defined between the second end and a third end with a third circumference, and the second circumference and the third circumference are smaller than the first circumference.

Abstract: The present disclosure relates to a method of gettering that provides for a high efficiency gettering process by increasing an area in which a getter layer is deposited, and an associated apparatus. In some embodiments, the method is performed by providing a substrate into a processing chamber having one or more residual gases. A cavity is formed within a top surface of the substrate. The cavity has a bottom surface and sidewalls extending from the bottom surface to the top surface. A getter layer, which absorbs the one or more residual gases, is deposited over the substrate at a position extending from the bottom surface of the cavity to a location on the sidewalls. By depositing the getter layer to extend to a location on the sidewalls of the cavity, the area of the substrate that is able to absorb the one or more residual gases is increased.

Abstract: A semiconductor structure and a method for forming the same are provided. The semiconductor structure comprises a substrate, a gate structure over a first surface of the substrate, and a source region and a drain region in the substrate adjacent to the gate structure. The semiconductor structure further comprises a channel region interposing the source and drain regions and underlying the gate structure. The semiconductor structure further comprises a first layer over a second surface of the substrate opposite to the first surface, and a second layer over the first layer. The semiconductor structure further comprises a sensing film over the channel region and at least a portion of the first and second layers, and a well over the sensing film and cutting off the first layer and the second layer.