Abstract: A control method and a related device, applied to the field of autonomous driving, advanced driver assistance, or automatic control. The method includes: receiving at least one piece of first information from at least one first apparatus, where the first apparatus may include a roadside device, a network device, or a first vehicle; and determining, by a device, a first state of a second apparatus based on the received at least one piece of first information, where the second apparatus may be a vehicle light, an exterior horn, an interior signal lamp, an interior horn, an interior vibration apparatus, or the like. The first information may indicate a status such as on/off, blinking, and luminance of the vehicle light, or the interior horn plays a specific voice prompt.

Abstract: Methods and arrangements are described for Multi User Multiple-Input-Multiple-Output (MU-MIMO) signaling via Multiple-Input-Multiple-Output (MIMO) antennas between a base station and one of a plurality of mobile terminals supporting both Single User and Multi User Multiple-Input-Multiple-Output (SU-MIMO and MU-MIMO) signaling modes. Switching between the modes is supported, and the modes have partly shared signaling. SU-MIMO mode signaling which is not needed for MU-MIMO mode signaling is identified. Data bits of the identified signaling is interpreted to comprise signaling information associated with MU-MIMO mode.

Abstract: A memory device includes a cross-point array of magnetoresistive memory cells. Each magnetoresistive memory cell includes a vertical stack of a selector-containing pillar structure and a magnetic tunnel junction pillar structure. The lateral spacing between neighboring pairs of magnetoresistive memory cells may be smaller along a first horizontal direction than along a second horizontal direction, and a dielectric spacer or a tapered etch process may be used to provide a pattern of an etch mask for patterning first electrically conductive lines underneath the magnetoresistive memory cells. Alternatively, a resist layer may be employed to pattern first electrically conductive lines underneath the cross-point array. Alternatively, a protective dielectric liner may be provided to protect selector-containing pillar structures during formation of the magnetic tunnel junction pillar structures.

Abstract: A memory device includes a cross-point array of magnetoresistive memory cells. Each magnetoresistive memory cell includes a vertical stack of a selector-containing pillar structure and a magnetic tunnel junction pillar structure. The lateral spacing between neighboring pairs of magnetoresistive memory cells may be smaller along a first horizontal direction than along a second horizontal direction, and a dielectric spacer or a tapered etch process may be used to provide a pattern of an etch mask for patterning first electrically conductive lines underneath the magnetoresistive memory cells. Alternatively, a resist layer may be employed to pattern first electrically conductive lines underneath the cross-point array. Alternatively, a protective dielectric liner may be provided to protect selector-containing pillar structures during formation of the magnetic tunnel junction pillar structures.

Abstract: Embodiments of the present disclosure disclose a plasma process apparatus with low particle contamination and a method of operating the same, wherein the plasma process apparatus comprises a chamber body and a liner, wherein a dielectric window is provided above the liner; the chamber body, the liner, and the dielectric window enclose a reaction space; a base for placing a wafer is provided at a bottom portion inside the reaction space; a vacuum pump device for pumping a gas out of the reaction space and maintaining a low pressure therein is provided below the base; a shutter for shuttering between an opening on a chamber body sidewall and an opening on a liner sidewall is provided inside the chamber body, for blocking contamination particles in the gas from flowing from a transfer module to the reaction space; a groove is provided at a lower portion of the liner, wherein a flowing space enclosed by a liner outer wall below the shutter and a chamber body inner wall is in communication with an inner space of t

Abstract: A memory device includes a cross-point array of magnetoresistive memory cells. Each magnetoresistive memory cell includes a vertical stack of a selector-containing pillar structure and a magnetic tunnel junction pillar structure. The lateral spacing between neighboring pairs of magnetoresistive memory cells may be smaller along a first horizontal direction than along a second horizontal direction, and a dielectric spacer or a tapered etch process may be used to provide a pattern of an etch mask for patterning first electrically conductive lines underneath the magnetoresistive memory cells. Alternatively, a resist layer may be employed to pattern first electrically conductive lines underneath the cross-point array. Alternatively, a protective dielectric liner may be provided to protect selector-containing pillar structures during formation of the magnetic tunnel junction pillar structures.

Abstract: A memory device includes a cross-point array of magnetoresistive memory cells. Each magnetoresistive memory cell includes a vertical stack of a selector-containing pillar structure and a magnetic tunnel junction pillar structure. The lateral spacing between neighboring pairs of magnetoresistive memory cells may be smaller along a first horizontal direction than along a second horizontal direction, and a dielectric spacer or a tapered etch process may be used to provide a pattern of an etch mask for patterning first electrically conductive lines underneath the magnetoresistive memory cells. Alternatively, a resist layer may be employed to pattern first electrically conductive lines underneath the cross-point array. Alternatively, a protective dielectric liner may be provided to protect selector-containing pillar structures during formation of the magnetic tunnel junction pillar structures.

Abstract: A spin-orbit-torque (SOT) magnetoresistive random access memory (MRAM) device includes a SOT MRAM cell containing a first two terminal selector element, a nonmagnetic metallic assist plate, and a magnetic tunnel junction located between the first two terminal selector element and the nonmagnetic metallic assist plate, and a circuit selection element selected from a transistor or a second two terminal selector element electrically connected to the nonmagnetic metallic assist plate of the SOT MRAM cell.

Abstract: A communication method and an apparatus are provided. The method includes: receiving, by a terminal device, downlink control information (DCI) from a network device on a first downlink carrier; and determining a first uplink carrier or a second uplink carrier based on the DCI, where the DCI indicates an uplink carrier to be used by the terminal device to send an uplink signal to the network device is the first uplink carrier or the second uplink carrier; the DCI for indicating the first uplink carrier and the DCI for indicating the second uplink carrier having equal bit quantity; and the first downlink carrier, the first uplink carrier, and the second uplink carrier belong to a same cell.

Abstract: Methods and arrangements are described for Multi User Multiple-Input-Multiple-Output (MU-MIMO) signaling via Multiple-Input-Multiple-Output (MIMO) antennas between a base station and one of a plurality of mobile terminals supporting both Single User and Multi User Multiple-Input-Multiple-Output (SU-MIMO and MU-MIMO) signaling modes. Switching between the modes is supported, and the modes have partly shared signaling. SU-MIMO mode signaling which is not needed for MU-MIMO mode signaling is identified. Data bits of the identified signaling is interpreted to comprise signaling information associated with MU-MIMO mode.

Abstract: A spin-orbit-torque (SOT) magnetoresistive random access memory (MRAM) device includes a SOT MRAM cell containing a first two terminal selector element, a nonmagnetic metallic assist plate, and a magnetic tunnel junction located between the first two terminal selector element and the nonmagnetic metallic assist plate, and a circuit selection element selected from a transistor or a second two terminal selector element electrically connected to the nonmagnetic metallic assist plate of the SOT MRAM cell.

Abstract: A method includes: reporting, by a UE, a CQI value to an eNB; receiving, by the UE, an MCS value sent by the eNB, where the MCS value is determined by the eNB according to the CQI value; and receiving, by the UE, PDSCH data according to the MCS value, where the CQI value and the MCS value are determined according to a second set of tables, where a modulation scheme that can be supported by the second set of tables is higher than 64QAM.

Abstract: An electrical connector includes an insulating body accommodating multiple first terminals. The first terminals include first and second differential signal pairs. No ground terminal is provided at one side of the first differential signal pair. Both sides of the second differential signal pair have ground terminals. The impedance of the first differential signal pair is adjusted by having a distance between the first differential signal pair and the first ground terminal less than a distance between the second differential signal pair and the first ground terminal, or by having a width of a portion of the first differential signal pair exposed out of the insulating body greater than a width of a portion of the second differential signal pair exposed out of the insulating body, or by having a distance between terminals of the first differential signal pair less than a distance between terminals of the second differential signal pair.

Abstract: A memory device includes a cross-point array of spin-torque transfer MRAM cells. First rail structures laterally extend along a first horizontal direction. Each of the first rail structures includes a vertical stack including, from bottom to top, a first electrically conductive line, a reference layer having a fixed magnetization direction, and a tunnel barrier layer. Second rail structures laterally extend along a second horizontal direction. Each of the second rail structures includes a second electrically conductive line that overlies the first rail structures. A two-dimensional array of pillar structures is located between a respective one of the first rail structures and a respective one of the second rail structures. Each of the pillar structures includes a free layer having energetically stable magnetization orientations that are parallel or antiparallel to the fixed magnetization direction.

Abstract: A data processing method applied to a data processing apparatus is provided. The data processing apparatus includes a central processing unit and a sensor processing unit set, and the sensor processing unit set includes at least one sensor processing unit. This solution resolves problems such as high costs and high function requirements, or overload and frequent system breakdown caused by massive data processing tasks in an existing data processing architecture. A data processing apparatus and a computer-readable storage medium are also provided.

Abstract: Embodiments of the present disclosure provide a backoff window adjustment method, and an apparatus. In downlink transmission, a base station obtains a trigger condition for adjusting a length of a backoff window on a first channel, and adjusts the length of the backoff window of the base station on the first channel according to the obtained trigger condition for adjusting the length of the backoff window on the first channel. In uplink transmission, a user equipment (UE) obtains a trigger condition for adjusting a length of a backoff window on a first channel, and adjusts the length of the backoff window of the UE on the first channel according to the obtained trigger condition for adjusting the length of the backoff window on the first channel.

Abstract: A method and an apparatus for detecting an abnormality of a caller are provided. The method includes at the beginning of a call, acquiring, by a terminal device, real voice/video data of a call object who needs abnormality detection and a corresponding pre-trained multi-stage neural network detection model, during the call, collecting, by the terminal device, call data according to a preset data collection policy, for each call object, inputting the currently collected call data and the real voice/video data of the call object into the model of the call object, and determining whether the call object is abnormal according to a detection result output by the model, in which the call data includes image data and/or voice data, and an identification manner adopted by the model includes face identification, voiceprint identification, limb movement identification, and/or lip language identification.

Abstract: A memory device includes a cross-point array of spin-torque transfer MRAM cells. First rail structures laterally extend along a first horizontal direction. Each of the first rail structures includes a vertical stack including, from bottom to top, a first electrically conductive line, a reference layer having a fixed magnetization direction, and a tunnel barrier layer. Second rail structures laterally extend along a second horizontal direction. Each of the second rail structures includes a second electrically conductive line that overlies the first rail structures. A two-dimensional array of pillar structures is located between a respective one of the first rail structures and a respective one of the second rail structures. Each of the pillar structures includes a free layer having energetically stable magnetization orientations that are parallel or antiparallel to the fixed magnetization direction.

Abstract: A memory array is provided that includes a plurality of word lines and a plurality of bit lines, and a plurality of memory cells each including a corresponding magnetic memory element coupled in series with a corresponding selector element. Each memory cell is coupled between one of the word lines and one of the bit lines. Each memory cell has a half-pitch F, and comprises an area between 2F2 and 4F2.

Abstract: The available transmission resources on a downlink-shared channel are divided into resource blocks, each resource block comprising a predetermined number of sub-carriers during a predetermined time period. The resource blocks are subdivided into localized resource blocks and distributed resource blocks. A user requiring sufficient resources can be allocated a plurality of said localized resource blocks. A user who would require only a small number of said localized resource blocks can instead be allocated subunits of a plurality of said distributed resource blocks.