Patents by Inventor Li-Che Chen

Li-Che Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8193640
    Abstract: A protection structure of a pad is provided. The pad is disposed in a dielectric layer on a semiconductor substrate and the pad includes a connection region and a peripheral region which encompasses the connection region. The protection structure includes at least a barrier, an insulation layer and a mask layer. The barrier is disposed in the dielectric layer in the peripheral region. The insulation layer is disposed on the dielectric layer. The mask layer is disposed on the dielectric layer and covers the insulation layer and the mask layer includes an opening to expose the connection region of the pad.
    Type: Grant
    Filed: August 10, 2009
    Date of Patent: June 5, 2012
    Assignee: United Microelectronics Corp.
    Inventors: Bang-Chiang Lan, Ming-I Wang, Hui-Min Wu, Min Chen, Chien-Hsin Huang, Tzung-I Su, Chao-An Su, Tzung-Han Tan, Li-Che Chen, Meng-Jia Lin
  • Publication number: 20110248364
    Abstract: A wafer level package of micro electromechanical system (MEMS) microphone includes a substrate, a number of dielectric layers stacked on the substrate, a MEMS diaphragm, a number of supporting rings and a protective layer. The MEMS diaphragm is disposed between two adjacent dielectric layers. A first chamber is between the MEMS diaphragm and the substrate. The supporting rings are disposed in some dielectric layers and stacked with each other. An inner diameter of the lower supporting ring is greater than that of the upper supporting ring. The protective layer is disposed on the upmost supporting ring and covers the MEMS diaphragm. A second chamber is between the MEMS diaphragm and the protective layer. The protective layer defines a number of first through holes for exposing the MEMS diaphragm. The wafer level package of MEMS microphone has an advantage of low cost.
    Type: Application
    Filed: April 8, 2010
    Publication date: October 13, 2011
    Inventors: Chien-Hsin Huang, Li-Che Chen, Ming-I Wang, Bang-Chiang Lan, Hui-Min Wu, Tzung-I Su
  • Publication number: 20110241137
    Abstract: A fabricating method of integrated circuit is provided. During the fabricating process of an interconnecting structure of the integrated circuit, a micro electromechanical system (MENS) diaphragm is formed between two adjacent dielectric layers of the interconnecting structure. The method of forming the MENS diaphragm includes the following steps. Firstly, a plurality of first openings is formed within any dielectric layer to expose corresponding conductive materials of the interconnecting structure. Secondly, a bottom insulating layer is formed on the dielectric layer and filling into the first openings. Third, portions of the bottom insulating layer located in the first openings are removed to form at least a first trench for exposing the corresponding conductive materials. Then, a first electrode layer and a top insulating layer are sequentially formed on the bottom insulating layer, and the first electrode layer filled into the first trench and is electrically connected to the conductive materials.
    Type: Application
    Filed: April 6, 2010
    Publication date: October 6, 2011
    Inventors: Chien-Hsin HUANG, Li-Che Chen, Ming-I Wang, Bang-Chiang Lan, Tzung-Han Tan, Hui-Min Wu, Tzung-I Su
  • Publication number: 20100067728
    Abstract: A microelectromechanical system microphone structure including a substrate, a first device and at least one second device is provided. The first device is disposed on the substrate and including a first upper electrode and a first lower electrode disposed between the first upper electrode and the substrate. The second device is disposed on the substrate, surrounding the first device and including a second upper electrode and a second lower electrode disposed between the second upper electrode and the substrate. The second upper electrode includes a plurality of first conductive layers and first plugs. The first conductive layers are arranged in steps, and the first plug is disposed between the adjacent first conductive layers. The second lower electrode includes a plurality of second conductive layers and a plurality of second plugs. The second conductive layers are arranged in steps, and the second plug is disposed between the adjacent second conductive layers.
    Type: Application
    Filed: September 16, 2008
    Publication date: March 18, 2010
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventor: Li-Che Chen
  • Patent number: 7659501
    Abstract: An image-sensing module is provided. The image-sensing module includes a substrate, a plurality of image-sensing units, a plurality of micro lenses and a focusing unit. The image-sensing units are disposed on the substrate and the micro lenses are respectively disposed on one of the image-sensing units. The focusing unit is disposed on the substrate and covers the micro lenses. A top surface of the focusing unit is a curved surface. Furthermore, a method of manufacturing the image-sensing module and an image capture apparatus are provided.
    Type: Grant
    Filed: March 30, 2007
    Date of Patent: February 9, 2010
    Assignee: United Microelectronics Corp.
    Inventors: Min-Chih Hsuan, Tsung-Hsi Ko, Li-Che Chen
  • Publication number: 20100020991
    Abstract: A diaphragm of an MEMS electroacoustic transducer including a first axis-symmetrical pattern layer is provided. Because the layout of the first axis-symmetrical pattern layer can match the pattern of the sound wave, the vibration uniformity of the diaphragm can be improved.
    Type: Application
    Filed: July 25, 2008
    Publication date: January 28, 2010
    Applicant: United Microelectronics Corp.
    Inventor: Li-Che Chen
  • Publication number: 20090305451
    Abstract: A manufacturing method of a wafer level chip scale package of an image-sensing module is provided. The method includes providing. a wafer having a plurality of die regions, and a plurality of sensing units is formed on a surface of the wafer in each die region. A plurality of lens units is formed on the sensing units, wherein each lens unit includes a lens and an edge wall that are integrally formed. A light-shielding film is also formed on a surface of at least one edge wall of at least one lens units. A dicing process is then performed on the wafer to form a plurality of image sensor chips.
    Type: Application
    Filed: August 13, 2009
    Publication date: December 10, 2009
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Min-Chih Hsuan, Tsung-Hsi Ko, Li-Che Chen
  • Publication number: 20080239120
    Abstract: An image-sensing module is provided. The image-sensing module includes a substrate, a plurality of image-sensing units, a plurality of micro lenses and a focusing unit. The image-sensing units are disposed on the substrate and the micro lenses are respectively disposed on one of the image-sensing units. The focusing unit is disposed on the substrate and covers the micro lenses. A top surface of the focusing unit is a curved surface. Furthermore, a method of manufacturing the image-sensing module and an image capture apparatus are provided.
    Type: Application
    Filed: March 30, 2007
    Publication date: October 2, 2008
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Min-Chih Hsuan, Tsung-Hsi Ko, Li-Che Chen
  • Patent number: 7368785
    Abstract: A metal-oxide-semiconductor transistor device for high voltage (HV MOS) and a method of manufacturing the same are disclosed. The HV MOS transistor device comprises a field oxide region with an indented lower surface combined with a plurality of field plates to elongate the path for disturbing the lateral electric field, therefore the transistor device has a relatively small size.
    Type: Grant
    Filed: May 24, 2006
    Date of Patent: May 6, 2008
    Assignee: United Microelectronics Corp.
    Inventors: Li-Che Chen, Chih-Chong Wang
  • Publication number: 20080070369
    Abstract: A metal-oxide-semiconductor transistor device for high voltage (HV MOS) and a method of manufacturing the same are disclosed. The HV MOS transistor device comprises a field oxide region with an indented lower surface combined with a plurality of field plates to elongate the path for disturbing the lateral electric field; therefore the transistor device has a relatively small size.
    Type: Application
    Filed: November 27, 2007
    Publication date: March 20, 2008
    Inventors: Li-Che Chen, Chih-Chong Wang
  • Publication number: 20060270171
    Abstract: A metal-oxide-semiconductor transistor device for high voltage (HV MOS) and a method of manufacturing the same are disclosed. The HV MOS transistor device comprises a field oxide region with an indented lower surface combined with a plurality of field plates to elongate the path for disturbing the lateral electric field, therefore the transistor device has a relatively small size.
    Type: Application
    Filed: May 24, 2006
    Publication date: November 30, 2006
    Inventors: Li-Che Chen, Chih-Chong Wang