Abstract: Techniques and examples of determination of receiver (RX) beam for radio link monitoring (RLM) based on available spatial quasi-co-location (QCL) information in New Radio (NR) mobile communications are described. An apparatus receives downlink (DL) signaling from a network. The apparatus determines whether to extend an evaluation period of RLM based on a quasi-co-location (QCL) association provided in at least the DL signaling. The apparatus then executes extension of the evaluation period of the RLM, or not, based on a result of the determining.

Abstract: A plasma thruster has a tunable electron source configured to provide electrons with controllable energy. An entry electrode and an exit electrode permit an air flow to pass from the entry electrode to the exit electrode. The entry electrode and exit electrode receive electrons from the tunable electron source. A controller selectively controls the entry and exit electrodes to accelerate positive and negative ions in the air.

Abstract: A radio frequency (RF) match assembly for a chemical vapor deposition processing chamber. The assembly includes a top electrically insulating column and a bottom electrically insulating column. The assembly further includes a one-piece RF match strap that has a head, a main body and a body extension. The main body of the one-piece RF match strap is configured to extend through the top electrically insulating column and the bottom electrically insulating column. A flexible chamber lid strap connects the processing chamber to the top of the one piece RF match strap.

Abstract: An interconnect structure comprises a first dielectric layer, a first metal layer, a second dielectric layer, a metal via, and a second metal layer. The first dielectric layer is over a substrate. The first metal layer is over the first dielectric layer. The first metal layer comprises a first portion and a second portion spaced apart from the first portion. The second dielectric layer is over the first metal layer. The metal via has an upper portion in the second dielectric layer, a middle portion between the first and second portions of the first metal layer, and a lower portion in the first dielectric layer. The second metal layer is over the metal via. From a top view the second metal layer comprises a metal line having longitudinal sides respectively set back from opposite sides of the first portion of the first metal layer.

Abstract: A cold plate is provided and includes: a housing disposed with a chamber; a base combined with the housing to form a working space separated from the chamber but connected with the chamber through an interconnecting structure to allow a working medium to flow within the chamber and the working space; a heat transfer structure disposed on the inner side of the base; and a pump disposed within the working space to drive the working medium in the working space. As such, the cold plate can provide better heat dissipation performance.

Abstract: An integrated circuit (IC) structure includes a semiconductor substrate, a first gate line, a second gate line, and a first auxiliary gate portion. The semiconductor substrate comprises a semiconductor fin. The semiconductor fin extends substantially along a first direction. The first gate line and the second gate line extend substantially along a second direction different form the first direction from a top view. The first auxiliary gate portion connects the first gate line to the second gate line from the top view.

Abstract: An illumination system provides an illumination beam and includes a red light source, a green light source, a blue light source, a first supplementary light source, a first X-shaped light-splitting assembly, a first light-splitting element, and a light-uniforming element. The red light source provides a red beam. The green light source provides a green beam. The blue light source provides a blue beam. The first supplementary light source provides a first supplementary beam. The first X-shaped light-splitting assembly guides the first supplementary beam and the blue beam to the first light-splitting element. The first light-splitting element guides the red beam, the green beam, the blue beam, and the first supplementary beam to the light-uniforming element. The first supplementary beam is a red supplementary beam or a blue supplementary beam, and the illumination system includes at least five light-emitting elements. A projection apparatus including the above illumination system is also provided.

Abstract: Embodiments are generally directed to a system and method for adapting executable object to a processing unit. An embodiment of a method to adapt an executable object from a first processing unit to a second processing unit, comprises: adapting the executable object optimized for the first processing unit of a first architecture, to the second processing unit of a second architecture, wherein the second architecture is different from the first architecture, wherein the executable object is adapted to perform on the second processing unit based on a plurality of performance metrics collected while the executable object is performed on the first processing unit and the second processing unit.

Abstract: Methods and systems are provided for improving user authentication and access control by a network file system service in a multi-tenant public cloud environment by receiving a request for a connection to a file system from a file system client (client), sending an identification request for identification authentication of the client to a control system, receiving a response from the control system, establishing the connection to the file system upon determining that the connection to the file system is allowed based on cloud tenant information associated with the client, receiving an attempt to access the file system from the client by a sub-user, authenticating the sub-user based on the cloud tenant information, issuing a security token including a globally unique sub-user identifier of the sub-user, and using the security token to determine access rights of the sub-user to the file system for a subsequent request.

Abstract: A system for manufacturing an integrated circuit includes a processor coupled to a non-transitory computer readable medium configured to store executable instructions. The processor is configured to execute the instructions for generating a layout design of the integrated circuit that has a set of design rules. The generating of the layout design includes generating a set of gate layout patterns corresponding to fabricating a set of gate structures of the integrated circuit, generating a cut feature layout pattern corresponding to a cut region of a first gate of the set of gate structures of the integrated circuit, generating a first conductive feature layout pattern corresponding to fabricating a first conductive structure of the integrated circuit, and generating a first via layout pattern corresponding to a first via. The cut feature layout pattern overlaps a first gate layout pattern of the set of gate layout patterns.

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes multiple semiconductor nanostructures, and the semiconductor nanostructures include a first semiconductor material. The semiconductor device structure also includes multiple epitaxial structures extending from edges of the semiconductor nanostructures. The epitaxial structures include a second semiconductor material that is different than the first semiconductor material. The semiconductor device structure further includes a gate stack wrapped around the semiconductor nanostructures.

Abstract: A wireless station (STA) for parameterized spatial reuse (PSR) operation. The STA may receive, from a first access point (AP) that the STA is not associated with, a trigger frame. The trigger frame includes a signal (SIG) field that includes a PSR field. The PSR field includes a plurality of subfields each corresponding to a respective subchannel associated with the trigger frame. This information includes transmission power level information. The STA may then determine, for each subchannel, using the transmission power level information, transmission power upper bounds for each of the subchannels.

Abstract: A method of performing beam failure recovery (BFR) procedure in primary cell and secondary cells with reduced UE complexity is proposed. A UE is configured to operate in one or multiple frequency bands under carrier aggregation or dual connectivity. The UE performs beam failure recovery (BFR) procedure on one serving cell for one frequency band across FR1 and FR2. The serving cell is an active serving cell including both primary cell (PCell) and secondary cells (SCells). Specifically, for SCell BFR procedure, a sharing factor K is introduced when multiple SCells are configured to perform BFR procedure. In one embodiment, the SCell BFR evaluation period equals to a predefined PCell BFR evaluation period times the sharing factor K.

Abstract: Disclosed herein are an adhesion blocking element, a three-dimensional printing device and a three-dimensional printing method. The adhesion blocking element comprises: one light-transmittable main body comprising a first surface and a second surface which are disposed opposite to each other, and side faces connecting the first surface and the second surface; and a plurality of microstructures arranged on the main body, wherein each microstructure has one cavity formed in the main body and one first open face which is arranged on the first surface of the main body and communicated to the cavity. The present invention decreases the adhesion between the adhesion blocking element and the cured layer by improving the structure of the adhesion blocking element itself, and eliminates the negative pressure adsorption between the cured layer and the adhesion blocking element, so that it is easier to peel the adhesion blocking element off from the cured layer.

Abstract: Disclosed are a display panel and a driving method therefor, and a display device. Two adjacent rows of sub-pixels are taken as a row group, and the row group is provided with a first sub row group and a second sub row group that are arranged in a column direction; a gate electrode of a first transistor in the first sub row group is electrically connected to a first gate line; a gate electrode of a second transistor in the second sub row group is electrically connected to a second gate line; two adjacent sub-pixels in the column direction share one third transistor, and a gate electrode of the third transistor in the row group is electrically connected to a third gate line; and the first transistor and the second transistor in one column of sub-pixels are electrically connected to a data line by means of the shared third transistor.

Abstract: A method includes forming a fin structure over a substrate, wherein the fin structure comprises first semiconductor layers and second semiconductor layers alternately stacked over a substrate; forming a dummy gate structure over the fin structure; removing a portion of the fin structure uncovered by the dummy gate structure; performing a selective etching process to laterally recess the first semiconductor layers, including injecting a hydrogen-containing gas from a first gas source of a processing tool to the first semiconductor layers and the second semiconductor layers; and injecting an F2 gas from a second gas source of the processing tool to the first semiconductor layers and the second semiconductor layers; forming inner spacers on opposite end surfaces of the laterally recessed first semiconductor layers of the fin structure; and replacing the dummy gate structure and the first semiconductor layers with a metal gate structure.

Abstract: The present invention provides a catheter reinforcement layer (100) and a catheter including the same. The catheter reinforcement layer (100) includes a braided component (110) and at least one axial component (120a, 120b, 120c, 120d, 120e, 120f, 120g, 120h, 120j, 120k, 120l, 120m, 120n). The braided component (110) is a mesh tube formed by braiding wires in a crosswise manner, and the axial component (120a, 120b, 120c, 120d, 120e, 120f, 120g, 120h, 120j, 120k, 120l, 120m, 120n) extends along the braided component (110) from a proximal end to a distal end, and has at least one intersection with the braided component (110).

Abstract: An anti-surge resistor and a fabrication method thereof are provided. The current anti-surge resistor includes a substrate made by a varistor material, a resistance layer disposed on the substrate, a first terminal electrode, and a second terminal electrode. In the fabrication method of the current anti-surge resistor, at first, the substrate made by the varistor material is provided. Then, the resistance layer is formed on the substrate to provide a main body, in which the main body includes the substrate and the resistance layer, and has two opposite terminals. Thereafter, the first terminal electrode is formed on one terminal of the main body, and the second terminal electrode is formed on the other terminal of the main body.

Abstract: Photolithography overlay errors are a source of patterning defects, which contribute to low wafer yield. An interconnect formation process that employs a patterning photolithography/etch process with self-aligned interconnects is disclosed herein. The interconnection formation process, among other things, improves a photolithography overlay (OVL) margin since alignment is accomplished on a wider pattern. In addition, the patterning photolithography/etch process supports multi-metal gap fill and low-k dielectric formation with voids.

Abstract: A micro electro mechanical system (MEMS) includes a circuit substrate comprising electronic circuitry, a support substrate having a recess, a bonding layer disposed between the circuit substrate and the support substrate, through holes passing through the circuit substrate to the recess, a first conductive layer disposed on a front side of the circuit substrate, and a second conductive layer disposed on an inner wall of the recess. The first conductive layer extends into the through holes and the second conductive layer extends into the through holes and coupled to the first conductive layer.