Abstract: Methods and structures of a three-dimensional memory device are disclosed. In an example, the disclosed method comprises forming a plurality of dielectric stacks stacked on one another over a substrate to create a multiple-stack staircase structure. Each one of the plurality of dielectric stacks comprises a plurality of dielectric pairs arranged along a direction perpendicular to a top surface of the substrate. The method further comprises forming a filling structure that surrounds the multiple-stack staircase structure, forming a semiconductor channel extending through the multiple-staircase structure, wherein the semiconductor channel comprises unaligned sidewall surfaces, and forming a supporting pillar extending through at least one of the multiple-staircase structure and the filling structure, wherein the supporting pillar comprises aligned sidewall surfaces.

Abstract: The photovoltaic system includes an inverter, a fan, and a controller. A photovoltaic string and a direct current bus capacitor are connected between a positive input end and negative input end of the inverter. The controller receives a fast shutdown instruction and sends a drive signal to a switching transistor in the inverter, so that the switching transistor performs a switching action under the action of the drive signal, and the switching transistor consumes electric energy during the switching action; or the controller turns on the fan after receiving the fast shutdown instruction to consume electric energy by using the fan; or the controller may send the drive signal to the switching transistor and also control the fan to be turned on, so that both the switching transistor and the fan consume electric energy.

Abstract: Disclosed are a target LED chip with a reflective layer and a manufacturing method. The method comprises providing a target substrate to a bottom of an initial LED chip, to obtain a first LED chip; depositing a first target liquid onto a top surface of the first LED chip to form a target protective layer, so as to obtain a second LED chip; etching the second LED chip from the target protective layer, to obtain a third LED chip; treating the third LED chip according to a first target method to form reflective layers, so as to obtain a fourth LED chip; and removing top reflective layers, second side wall reflective layers and first sub-protective layers of the plurality of second LED sub-units, to obtain the target LED chip comprising the plurality of target LED sub-units and the target substrate.

Abstract: The present application provides a semiconductor device and the method of making the same. The method includes recessing a fin extending from a substrate, forming a base epitaxial feature on the recessed fin, forming a bar-like epitaxial feature on the base epitaxial feature, and forming a conformal epitaxial feature on the bar-like epitaxial feature. The forming of the bar-like epitaxial feature includes in-situ doping the bar-like epitaxial feature with an n-type dopant at a first doping concentration. The forming of the conformal epitaxial feature includes in-situ doping the conformal epitaxial feature with a second doping concentration greater than the first doping concentration.

Abstract: Systems and methods of generating a security key for an integrated circuit device include generating a plurality of key bits with a physically unclonable function (PUF) device. The PUF can include a random number generator that can create random bits. The random bits may be stored in a nonvolatile memory. The number of random bits stored in the nonvolatile memory allows for a plurality of challenge and response interactions to obtain a plurality of security keys from the PUF.

Abstract: Gas bubble migration can be managed in liquids. In one example, a system can execute wellbore-simulation software to simulate changes in gas dissolution in a liquid over time. This may involve dividing the wellbore into segments spanning from the well surface to the downhole location, each segment spanning a respective depth increment between the well surface and the downhole location. Next, for each time, the system can determine a respective multiphase-flow regime associated with each segment of the plurality of segments based on a simulated pressure level, a simulated temperature, a simulated pipe eccentricity, and a simulated fluid velocity at the segment. The system can also determine how much of the gas is dissolved in the liquid at each segment based on the respective multiphase-flow regime at the segment. The system can display a graphical user interface representing the gas dissolution in the liquid over time.

Abstract: An electronic component assembly having thermal pads with thermal vias coupling an image sensor and a camera board fab is provided for heat dissipation. The electronic component assembly can include: a circuit board having at least one thermal pad disposed on a top surface of the circuit board; and an image sensor disposed on the top surface of the circuit board, having at least one conductive pad disposed at at least one corner of the image sensor. The at least one thermal pad is coupled to the at least one conductive pad of the image sensor and the at least one thermal pad is formed with a plurality of first thermal vias penetrating the thermal pad and the circuit board for transfer of heat of the image sensor.

Abstract: Methods and systems are provided for improving user authentication and access control by a network file system service in a multi-tenant public cloud environment by receiving a request for a connection to a file system from a file system client (client), sending an identification request for identification authentication of the client to a control system, receiving a response from the control system, establishing the connection to the file system upon determining that the connection to the file system is allowed based on cloud tenant information associated with the client, receiving an attempt to access the file system from the client by a sub-user, authenticating the sub-user based on the cloud tenant information, issuing a security token including a globally unique sub-user identifier of the sub-user, and using the security token to determine access rights of the sub-user to the file system for a subsequent request.

Abstract: This disclosure may provide a system and a method. The method may include obtaining one or more sets of reference signals collected by a coil of a magnetic resonance imaging (MRI) device in a pre-scan. The pre-scan may be performed on a subject before an MRI scan of the subject. The method may also include obtaining a first fault detection model. The first fault detection model may be a trained machine learning model. The method may further include determining whether the coil has a failure based on the one or more sets of reference signals and the first fault detection model.

Abstract: A distributed scheduling system and a distributed scheduling method are provided. The distributed scheduling system includes a master scheduling platform and a slave scheduling platform. The number of the master scheduling platform and the number of the slave scheduling platform may be dynamically expanded respectively. When a back-end operating platform provides a scheduling data maintenance request to the master scheduling platform, the master scheduling platform provides scheduling data maintenance information to the slave scheduling platform according to the scheduling data maintenance request, so that the slave scheduling platform performs maintenance on scheduling data according to the scheduling data maintenance information. When a scheduling task execution condition of the scheduling data is met, the slave scheduling platform initiates a task, and calls a corresponding micro service to execute a business logic of the scheduling data.

Abstract: A method includes forming a first low-dimensional layer over an isolation layer, forming a first insulator over the first low-dimensional layer, forming a second low-dimensional layer over the first insulator, forming a second insulator over the second low-dimensional layer, and patterning the first low-dimensional layer, the first insulator, the second low-dimensional layer, and the second insulator into a protruding fin. Remaining portions of the first low-dimensional layer, the first insulator, the second low-dimensional layer, and the second insulator form a first low-dimensional strip, a first insulator strip, a second low-dimensional strip, and a second insulator strip, respectively. A transistor is then formed based on the protruding fin.

Abstract: Provided is an automatic air-release box lid, including: a box lid body provided with an air hole, the air hole being configured as a through-hole structure, openings at two ends of the air hole being located on an upper surface and a lower surface of the box lid body respectively; and a fastening lug having a rotating shaft part by which the fastening lug is hinged to the upper surface of the box lid body, the rotating shaft part and one opening of the air hole being arranged corresponding to each other and one above the other, the rotating shaft part having a blocking surface. Further provided is a preservation box, including: an automatic air-release box lid and a box body. The box lid is fitted to cover the box body.

Abstract: A semiconductor device includes a substrate, at least one via, a liner layer and a conductive layer. The substrate includes an electronic circuitry. The at least one via passes through the substrate. The at least one via includes a plurality of concave portions on a sidewall thereof. The liner layer fills in the plurality of concave portions of the at least one via. The conductive layer is disposed on the sidewall of the at least one via, covers the liner layer, and extends onto a surface of the substrate. The thickness of the conductive layer on the sidewall of the at least one via is varied.

Abstract: Embodiments of a channel hole plug structure of 3D memory devices and fabricating methods thereof are disclosed. The memory device includes an alternating layer stack disposed on a substrate, an insulating layer disposed on the alternating dielectric stack, a channel hole extending vertically through the alternating dielectric stack and the insulating layer, a channel structure including a channel layer in the channel hole, and a channel hole plug in the insulating layer and above the channel structure. The channel hole plug is electrically connected with the channel layer. A projection of the channel hole plug in a lateral plane covers a projection of the channel hole in the lateral plane.

Abstract: The present invention relates generally to sensing devices. A stacked SPAD sensor device includes a sensor layer and a logic layer. The sensor layer includes a plurality of SPAD pixels and a peripheral region surrounding the SPAD pixels. An insulation region is configured between the SPAD pixels and the peripheral region to provide electrical insulation. The logic layer includes logic circuits coupled to SPAD pixels. The logic circuits are electrically insulated from the SPAD pixels by the insulation region. There are other embodiments as well.

Abstract: Embodiments include semiconductor processing methods to form low-? films on semiconductor substrates are described. The processing methods may include flowing one or more deposition precursors to a semiconductor processing system. The one or more deposition precursors may include a silicon-containing precursor that may be a cyclic compound. The methods may include generating a deposition plasma from the one or more deposition precursors. The methods may include depositing a silicon-and-carbon-containing material on the substrate from plasma effluents of the deposition plasma. The silicon-and-carbon-containing material as-deposited may be characterized by a dielectric constant less than or about 3.0.

Abstract: A micro electro mechanical system (MEMS) includes a circuit substrate comprising electronic circuitry, a support substrate having a recess, a bonding layer disposed between the circuit substrate and the support substrate, through holes passing through the circuit substrate to the recess, a first conductive layer disposed on a front side of the circuit substrate, and a second conductive layer disposed on an inner wall of the recess. The first conductive layer extends into the through holes and the second conductive layer extends into the through holes and coupled to the first conductive layer.

Abstract: The disclosure provides a Sense Amplifier (SA), a memory and a method for controlling the SA, and relates to the technical field of semiconductor memories. The SA includes: an amplifier module; an offset voltage storage unit electrically connected to the amplifier module and configured to store an offset voltage of the amplifier module in an offset elimination stage of the SA; and a load compensation unit electrically connected to the amplifier module and configured to compensate a difference between loads of the amplifier module in an amplification stage of the SA. The disclosure may improve an accuracy of reading data of the SA.

Abstract: A folding device is provided. The folding device includes a bearing and fixing mechanism (1) configured to bear and fix a main body portion (21) of a to-be-folded device (2); a folding mechanism (3) located on at least one side of the bearing and fixing mechanism (1), the folding mechanism (3) being rotatably connected to the bearing and fixing mechanism (1) and configured to bear and fix a to-be-folded portion (22) of the to-be-folded device (2); and a driving mechanism (4) connected to the folding mechanism (3), the driving mechanism (4) being configured to drive the folding mechanism (3) to turn relative to the bearing and fixing mechanism (1), so as to fold the to-be-folded portion (22) to a side in a thickness direction of the main body portion (21). The folding device can fold automatically, and manual folding is avoided.