Abstract: A semiconductor integrated circuit design method and apparatus, and relates to the technical field of semiconductors are provided. The semiconductor integrated circuit design method includes: determining, based on an original layout, an original length of an end of a gate structure extending out of an active region in which the gate structure is located; redetermining, based on a preset rule and the original length, a correction length of the end of the gate structure extending out of the active region in which the gate structure is located; and integrating the original layout and the correction lengths, and forming an updated layout.

Abstract: A method and an apparatus of designing an integrated circuit are provided. The method includes: S1, loading a power fill to a circuit layout with original metal lines; S2, checking whether a current layout includes a region with a spacing error; if yes, performing S3; otherwise, outputting the current layout; and S3, pruning a power fill shape corresponding to the region with a spacing error by a predetermined spacing width delta, and returning to the S2.

Abstract: An apparatus to facilitate large integer multiplication enhancements in a graphics environment is disclosed. The apparatus includes a processor comprising processing resources, the processing resources comprising multiplier circuitry to: receive operands for a multiplication operation, wherein the multiplication operation is part of a chain of multiplication operations for a large integer multiplication; and issue a multiply and add (MAD) instruction for the multiplication operation utilizing at least one of a double precision multiplier or a 48 bit output, wherein the MAD instruction to generate an output in a single clock cycle of the processor.

Abstract: The present disclosure provides compositions and methods for efficient and effective protein delivery in vitro and in vivo. In some aspects, proteins are reversibly crosslinked to each other and/or modified with functional groups and protected from protease degradation by a polymer-based or silica-based nanoshell.

Abstract: The present disclosure relates to new agents useful for anti-cancer therapy such as anti-cancer adoptive T-cell transfer (ACT) immunotherapy or immune check-point blockade therapy and related compositions, uses and methods thereof.

Abstract: The present disclosure discloses a method for identifying a M1 generation plant mutant resulting from physical and chemical mutagenesis, a method for acquiring the plant mutant, a mutant gene, and use thereof. The method for identifying a M1 generation plant mutant resulting from physical and chemical mutagenesis includes: mutagenizing a plant to obtain an M1 generation plant mutant, extracting a mixed pool of DNA from the obtained M1 generation plant mutant, subjecting the mixed pool of DNA to high-depth targeted sequencing for a target gene region, and aligning a sequencing result with the target gene region to identify whether there are target single nucleotide polymorphisms (SNPs) and/or Indel. The method of the present disclosure has high efficiency and high accuracy, involves simple operations, and is of progressive significance for the identification and acquisition of innovative germplasms.

Abstract: A driving circuit includes a gamma chip configured to provide a plurality of initial binding point voltages; the gamma chip including a first type of output terminals and a second type of output terminals, currents corresponding to the initial binding point voltages outputted by the first type of output terminals being less than a preset driving current; and currents corresponding to the initial binding point voltages outputted by the second type of output terminals being greater than the preset driving current; and a data driving chip including a processor and a plurality of operational amplifiers.

Abstract: A data processing circuit and a fault-mitigating method are provided. In the method, multiple sub-sequences are divided from sequence data. A first sub-sequence of the sub-sequences is accessed from a memory for a multiply-accumulate (MAC) operation to obtain a first computed result. The MAC operation is performed on a second sub-sequence of the sub-sequences in the memory to obtain a second computed result. The first and the second computed results are combined, where the combined result of the first and the second computed results is related to the result of the MAC operation on the sequence data directly. Accordingly, the error rate could be reduced, so as to mitigate fault.

Abstract: A data processing circuit and a fault-mitigating method, which are adapted for a memory having a faulty bit, are provided. The memory is configured to store data related to an image, a weight for a multiply-accumulate (MAC) operation of image feature extraction, and/or a value for an activation operation. Sequence data is written into the memory. The bit number of the sequence data equals to the bit number used for storing data in a sequence block of the memory. The sequence data is accessed from the memory, wherein the access of the faulty bit in the memory is ignored. The value of the faulty bit is replaced by the value of a non-faulty bit in the memory to form new sequence data. The new sequence data is used for MAC. Accordingly, the accuracy of image recognition can be improved for the faulty memory.

Abstract: The present application discloses an overhaul method and a driving method for a display device and the display device. A display panel is provided with a first screen gate driving circuit and a second screen gate driving circuit which are respectively controlled by a first frame start signal L_STV and a second frame start signal R_STV which are independent of each other.

Abstract: The present application provides a signal compensation system, which includes a level conversion module, a determination module and a compensation module. The level conversion module is for receiving a timing signal and converting the timing signal into a control signal. The determination module is for detecting a target row number of a gate corresponding to the control signal and determining a compensation coefficient according to the target row number. The compensation module is for compensating an output voltage of the control signal according to the compensation coefficient, thereby voltages at gates are consistent when the control signal is sent to each of the gates. The present application also provides a signal compensation method.

Abstract: A driving circuit and a display device. The driving circuit uses a binding point voltage generation circuit to output first voltages, second voltages and a plurality of first voltage-divided binding point voltages. The two second voltages are voltage divided by a first voltage dividing circuit to generate a plurality of second voltage-divided binding point voltages. Each first data driving circuit outputs first amplified binding point voltages. Each second data driving circuit outputs second amplified binding point voltages. The first voltages, the second voltages, each first amplified binding point voltage, and each second amplified binding point voltage are inputted to each first data driving circuit and each second data driving circuit.

Abstract: A process and system for creating a lithium ion anolyte from lithium alloys. Metal and lithium alloys are processed to remove the metal with lithium from the alloy remaining. A lithium ion anolyte formed may be used in a process to form lithium metal. Alternatively, a process and system for recovering lithium from sources such as lithium alloys and lithium metal oxides and other feedstock such as recycled batteries into a thin lithium metal film via electrodeposition in an organic electrolyte contacting both anode (holder for lithium source) and cathode (substrate for lithium deposition) in a single-compartment electrolysis cell.

Abstract: The present disclosure is directed, in some embodiments, to methods and compositions of comprising a cell having a non-internalizing receptor, and a nanoparticle surface-modified with a ligand that binds to the non-internalizing receptor.

Abstract: A method for torque split arbitration in a vehicle includes identifying at least one route characteristic of a portion of a route being traversed by the vehicle. The method further includes determining a target torque split based on the at least one route characteristics. The method further includes generating a first output torque demand that corresponds to a product of a first portion of a target torque demand to be provided by a first propulsion unit and a ratio of a total propulsion system torque demand and the target torque demand. The method further includes generating a second output torque demand based on the first output torque demand.

Abstract: The present application relates to a layout method and a layout apparatus for an integrated circuit. The layout method for an integrated circuit includes the following steps: providing a layout, the layout including a first element region and a second element region, a spacing region being provided between the first element region and the second element region; and detecting whether a width of the spacing region is less than a preset width, and if yes, marking at least one of the first element region, the second element region and the spacing region, the preset width being a minimum width meeting a requirement, wherein the requirement is to fill the spacing region with at least one dummy pattern.

Abstract: A data processing circuit and a fault-mitigating method, which are adapted for a memory having a faulty bit, are provided. The memory is configured to store data related to an image, a weight for a multiply-accumulate (MAC) operation of image feature extraction, and/or a value for an activation operation. Sequence data is written into the memory. The bit number of the sequence data equals to the bit number used for storing data in a sequence block of the memory. The sequence data is accessed from the memory, wherein the access of the faulty bit in the memory is ignored. The value of the faulty bit is replaced by the value of a non-faulty bit in the memory to form new sequence data. The new sequence data is used for MAC. Accordingly, the accuracy of image recognition can be improved for the faulty memory.

Abstract: A process and system for creating a lithium ion anolyte from lithium alloys. Metal and lithium alloys are processed to remove the metal with lithium from the alloy remaining. A lithium ion anolyte formed may be used in a process to form lithium metal. Alternatively, a process and system for recovering lithium from sources such as lithium alloys and lithium metal oxides and other feedstock such as recycled batteries into a thin lithium metal film via electrodeposition in an organic electrolyte contacting both anode (holder for lithium source) and cathode (substrate for lithium deposition) in a single-compartment electrolysis cell.

Abstract: A driving circuit and a display device. The driving circuit uses a binding point voltage generation circuit to output first voltages, second voltages and a plurality of first voltage-divided binding point voltages. The two second voltages are voltage divided by a first voltage dividing circuit to generate a plurality of second voltage-divided binding point voltages. Each first data driving circuit outputs first amplified binding point voltages. Each second data driving circuit outputs second amplified binding point voltages. The first voltages, the second voltages, each first amplified binding point voltage, and each second amplified binding point voltage are inputted to each first data driving circuit and each second data driving circuit.