Abstract: A digital transceiver is provided. The digital transceiver includes a clock generator configured to generate a first clock signal having a first frequency of a fixed value and a transmitter driven by the first clock signal of the first frequency to transmit data. Additionally, the digital transceiver includes an inverter coupled to the clock generator to generate an inverted first clock signal of the first frequency. Further, it includes a frequency detector configured to compare the first frequency with a second frequency of a feedback signal in a loop of feedback to determine a frequency control word F. Furthermore, it includes a digitally-controlled oscillator driven by the frequency control word F in the loop of feedback to output a second clock signal with a time-average frequency substantially synchronous to the first frequency with a boundary spread and a receiver driven by the second clock signal to receive the data.

Abstract: An information representation method, a multi-value calculation circuit and an electronic system are provided. The information representation method includes: acquiring a switching rate of a signal; and adopting the switching rate of the signal to represent information.

Abstract: A measuring device and a measuring method are provided. The measuring device includes an oscillating circuit, a time average frequency-frequency lock loop, and a digital signal processing circuit. The oscillation circuit includes an element to be measured and is configured to output a signal having an oscillation frequency correlated with an element value of the element to be measured. The time average frequency-frequency lock loop is configured to receive the signal output by the oscillation circuit and output a frequency control word correlated with the oscillation frequency. The digital signal processing circuit is configured to read the frequency control word output by the time average frequency-frequency lock loop and obtain the element value of the element to be measured according to the read frequency control word. The measuring device is easy to integrate, has small volume, low power consumption, and high reliability, and can achieve high-precision measurement.

Abstract: A parameter determination method for a spread spectrum circuit, a clock spread spectrum method, a parameter determination device for a spread spectrum circuit, and a clock spread spectrum device are disclosed. The parameter determination method for the spread spectrum circuit includes: obtaining a base time unit and a target frequency; determining a spread spectrum depth coefficient according to the base time unit and the target frequency; determining whether the spread spectrum depth coefficient is greater than or equal to a base spread spectrum depth coefficient; if yes, determining the spread spectrum depth coefficient as a standard spread spectrum depth coefficient and determining a standard frequency control word according to the standard spread spectrum depth coefficient; and if no, adjusting the base time unit until a corresponding spread spectrum depth coefficient corresponding to the base time unit is greater than or equal to the base spread spectrum depth coefficient.

Abstract: A frequency regulator and a frequency regulating method thereof, and an electronic device are disclosed. The frequency regulator includes: a signal processing circuit configured to generate a frequency control word according to a frequency regulating coefficient and an input frequency; and a frequency regulating circuit configured to receive the frequency control word and to generate and output an output signal having a target frequency according to the frequency control word. The frequency regulating coefficient is an arbitrary positive real number and is expressed as M.m, M is an integer portion of the frequency regulating coefficient and is a natural number, and m is a decimal portion of the frequency regulating coefficient.

Abstract: A parameter determination method for a spread spectrum circuit, a clock spread spectrum method, a parameter determination device for a spread spectrum circuit, and a clock spread spectrum device are disclosed. The parameter determination method for the spread spectrum circuit includes: obtaining a base time unit and a target frequency; determining a spread spectrum depth coefficient according to the base time unit and the target frequency; determining whether the spread spectrum depth coefficient is greater than or equal to a base spread spectrum depth coefficient; if yes, determining the spread spectrum depth coefficient as a standard spread spectrum depth coefficient and determining a standard frequency control word according to the standard spread spectrum depth coefficient; and if no, adjusting the base time unit until a corresponding spread spectrum depth coefficient corresponding to the base time unit is greater than or equal to the base spread spectrum depth coefficient.

Abstract: The present disclosure provides an optical communication drive circuit and method, an optical communication transmitter, an optical communication system, and a vehicle. The optical communication drive circuit includes a clock circuit and a modulation circuit. The clock circuit is configured to output a clock signal with an initial frequency signal as an input under control of information to be transmitted. The clock signal includes alternating first and second frequency signals, the first frequency signal and the second frequency signal having different frequencies and being generated based on the initial frequency signal; and the modulation circuit is configured to modulate an optical signal by the clock signal to obtain a modulated optical signal.

Abstract: The present disclosure relates to aft XIU-accumulating register, aft XIU-accumulating register circuit, and an electronic device. The XIU-accumulating register includes a first accumulating unit and a second accumulating unit. The first accumulating unit includes a first adder and a first register; the first adder is configured to accumulate fractional bit data of an accumulated variable, and the first register is configured to store an accumulated result of the fractional bit data and carry bit data of the accumulated result of the fractional bit data. The second accumulating unit includes a second adder and a second register; the second adder is configured to accumulate integer bit data of the accumulated variable, and the second register is configured to store an accumulated result of the integer bit data.

Abstract: A measuring device and a measuring method are provided. The measuring device includes an oscillating circuit, a time average frequency-frequency lock loop, and a digital signal processing circuit. The oscillation circuit includes an element to be measured and is configured to output a signal having an oscillation frequency correlated with an element value of the element to be measured. The time average frequency-frequency lock loop is configured to receive the signal output by the oscillation circuit and output a frequency control word correlated with the oscillation frequency. The digital signal processing circuit is configured to read the frequency control word output by the time average frequency-frequency lock loop and obtain the element value of the element to be measured according to the read frequency control word. The measuring device is easy to integrate, has small volume, low power consumption, and high reliability, and can achieve high-precision measurement.

Abstract: A digital clock circuit is provided. The digital clock circuit includes a first sub-circuit comprising a first digitally-controlled oscillator driven by a frequency control word to control a first output frequency synthesized from multiple first pulses, and a first frequency divider to generate a trigger signal having a frequency equal to 1/M of the first output frequency. The digital clock circuit also includes a second sub-circuit comprising a loop of feedback including a frequency detector to compare an input frequency with a feedback frequency, a controller to adjust the frequency control word, a second digitally-controlled oscillator driven by the frequency control word plus a constant to control a second output frequency synthesized from multiple second pulses induced by the trigger signal, and a second frequency divider to set the feedback frequency equal to 1/N of the second output frequency in the loop of feedback.

Abstract: A clock spread spectrum circuit, an electronic equipment, and a clock spread spectrum method are disclosed. The clock spread spectrum circuit includes a control circuit and a signal generation circuit. The control circuit is configured to generate a frequency control word according to a modulation parameter, and the frequency control word changes discretely with time; and the signal generation circuit is configured to receive the frequency control word and generate and output a spread spectrum output signal that is spectrum-spread according to the frequency control word, and the spread spectrum output signal corresponds to the frequency control word.

Abstract: A frequency locked loop, an electronic device, and a frequency generation method are provided. The frequency locked loop includes: a control circuit, configured to judge a size relationship between an input frequency and a feedback frequency to obtain a control signal, and determine a frequency control word according to the control signal, in which the control signal includes a first sub-control signal and a second sub-control signal, the control circuit is configured to generate the first sub-control signal in a case where the input frequency is greater than the feedback frequency, and the control circuit is configured to generate the second sub-control signal different from the first sub-control signal in a case where the input frequency is less than the feedback frequency; and a digital control oscillation circuit, configured to generate and output an output signal having a target frequency according to the frequency control word.

Abstract: A digital clock circuit is provided. The digital clock circuit includes a first sub-circuit comprising a first digitally-controlled oscillator driven by a frequency control word to control a first output frequency synthesized from multiple first pulses, and a first frequency divider to generate a trigger signal having a frequency equal to 1/M of the first output frequency. The digital clock circuit also includes a second sub-circuit comprising a loop of feedback including a frequency detector to compare an input frequency with a feedback frequency, a controller to adjust the frequency control word, a second digitally-controlled oscillator driven by the frequency control word plus a constant to control a second output frequency synthesized from multiple second pulses induced by the trigger signal, and a second frequency divider to set the feedback frequency equal to 1/N of the second output frequency in the loop of feedback.

Abstract: A digital transceiver is provided. The digital transceiver includes a clock generator configured to generate a first clock signal having a first frequency of a fixed value and a transmitter driven by the first clock signal of the first frequency to transmit data. Additionally, the digital transceiver includes an inverter coupled to the clock generator to generate an inverted first clock signal of the first frequency. Further, it includes a frequency detector configured to compare the first frequency with a second frequency of a feedback signal in a loop of feedback to determine a frequency control word F. Furthermore, it includes a digitally-controlled oscillator driven by the frequency control word F in the loop of feedback to output a second clock signal with a time-average frequency substantially synchronous to the first frequency with a boundary spread and a receiver driven by the second clock signal to receive the data.

Abstract: An information representation method, a multi-value calculation circuit and an electronic system are provided. The information representation method includes: acquiring a switching rate of a signal (S102); and adopting the switching rate of the signal to represent information (S104).

Abstract: A frequency regulator and a frequency regulating method thereof, and an electronic device are disclosed. The frequency regulator includes: a signal processing circuit configured to generate a frequency control word according to a frequency regulating coefficient and an input frequency; and a frequency regulating circuit configured to receive the frequency control word and to generate and output an output signal having a target frequency according to the frequency control word. The frequency regulating coefficient is an arbitrary positive real number and is expressed as M.m, M is an integer portion of the frequency regulating coefficient and is a natural number, and m is a decimal portion of the frequency regulating coefficient.

Abstract: A calculation method of a machine entropy, a calculation circuit of a machine entropy, a method for implementing time cognition, and an electronic system for implementing time cognition are disclosed. The calculation method of a machine entropy includes: monitoring electrical signals of the electronic system; and calculating the machine entropy, the machine entropy being a sum of change times of characteristic parameters of the electrical signals.

Abstract: A digitally controlled oscillator, including: a frequency divider chain, configured to perform frequency division on an input clock signal to produce K basic clock signals, wherein frequencies and periods of the K basic dock signals are the same and a time difference between two adjacent basic clock signals is a basic time unit; and a frequency synthesizer, configured to receive the K basic clock signals from the frequency divider chain, determine a first period and a second period according to the basic time unit and a frequency control word, and generate a synthetic clock signal based on the K basic clock signals, wherein the synthetic clock signal uses the first period and the second period in an alternate manner.

Abstract: A TAF-DPS based circuits and methods to improve electronic system's frequency accuracy and enhance its frequency stability is disclosed in this application. Present invention creates a circuit architecture and a calculation scheme for compensating frequency source's frequency error. Present invention further discloses a method of incorporating said scheme into functional chip built in either ASIC or FPGA fashion. Present invention further presents a method of using TAF-DPS-frequency-compensation-scheme-equipped-chips as nodes in electronic network. As a result, the circuit and apparatus disclosed in present invention can improve electronic system's performance from the time synchronization perspective.

Abstract: A signal generating circuit and a signal generating method, a driving circuit of a light emitting device and a display device. The signal generating circuit includes: a control circuit, configured to calculate at least one of frequency control word information or duty-cycle control word information according to an instruction; and a pulse-width adjusting circuit, configured to generate a pulse signal according to the at least one of the frequency control word information or the duty-cycle control word information.