Abstract: A ferroelectric memory cell (FeRAM) is disclosed that includes an active device (e.g., a transistor) and a passive device (e.g., a ferroelectric capacitor) integrated in a substrate. The transistor and its gate contacts are formed on a front side of the substrate. A carrier wafer can be bonded to the active device to allow the active device to be inverted so that the passive device and associated contacts can be electrically coupled from a back side of the substrate.

Abstract: The structure of a semiconductor device with different gate structures configured to provide ultra-low threshold voltages and a method of fabricating the semiconductor device are disclosed. The method includes forming first and second nanostructured channel regions in first and second nanostructured layers, respectively, and forming first and second gate-all-around (GAA) structures surrounding the first and second nanostructured channel regions, respectively. The forming the first and second GAA structures includes selectively forming an Al-based n-type work function metal layer and a Si-based capping layer on the first nanostructured channel regions, depositing a bi-layer of Al-free p-type work function metal layers on the first and second nanostructured channel regions, depositing a fluorine blocking layer on the bi-layer of Al-free p-type work function layers, and depositing a gate metal fill layer on the fluorine blocking layer.

Abstract: The present disclosure provides a method for forming an integrated circuit (IC) structure. The method comprises providing a substrate including a conductive feature; forming aluminum (Al)-containing dielectric layer on the conductive feature; forming a low-k dielectric layer on the Al-containing dielectric layer; and etching the low-k dielectric layer to form a contact trench aligned with the conductive feature. A bottom of the contact trench is on a surface of the Al-containing dielectric layer.

Abstract: Methods and systems for budgeted and simplified training of deep neural networks (DNNs) are disclosed. In one example, a trainer is to train a DNN using a plurality of training sub-images derived from a down-sampled training image. A tester is to test the trained DNN using a plurality of testing sub-images derived from a down-sampled testing image. In another example, in a recurrent deep Q-network (RDQN) having a local attention mechanism located between a convolutional neural network (CNN) and a long-short time memory (LSTM), a plurality of feature maps are generated by the CNN from an input image. Hard-attention is applied by the local attention mechanism to the generated plurality of feature maps by selecting a subset of the generated feature maps. Soft attention is applied by the local attention mechanism to the selected subset of generated feature maps by providing weights to the selected subset of generated feature maps in obtaining weighted feature maps.

Abstract: Disclosed are a gallium 68 labeled affibody protein PET imaging agent and a use thereof; the imaging agent comprises 68Ga-Z-tri; the 68Ga-Z-tri is obtained by labeling an affibody protein with gallium 68; the affibody protein comprises a PDGFR-? targeting trimer affibody protein Z-tri; and the amino acid sequence listing of the affibody protein Z-tri is as shown in SEQ ID NO. 1. According to the present invention, the utilized PDGFR-? targeting trimer affibody having a unique amino acid sequence has the characteristics of high affinity and high stability compared with a monomer affibody and a dimer affibody, can greatly increase a nuclide labeling rate, and achieves the effectiveness thereof as a PET imaging probe.

Abstract: The present invention relates to a method for moderately increasing the content of dimethyl disulfide in casein-containing processed cheese. The method includes the following steps: taking a cheese powder, adding chymosin for enzymolysis, and subjecting a material obtained after the enzymolysis to puffing and drying to obtain a modified cheese powder; preparing materials; taking the modified cheese powder, heating the modified cheese powder under stirring until the cheese powder is melt, adding sodium bicarbonate to adjust the pH to 6-7, and adding papain for enzymolysis; taking a material obtained after the enzymolysis, adding butter, a skimmed milk powder, fructo-oligosaccharide and water for mixing by stirring, and then adding an emulsifying salt, glutamine transaminase and salt for uniform heating and stirring to obtain a mixture; and subjecting the mixture to heat treatment, hot filling and cooling in sequence to obtain processed cheese.

Abstract: A photo detector including a photo sensor part and a power source module is provided. The power source module is fixed on the photo sensor part and electrically connected to the photo sensor part. The power source module is detachable and includes a handle.

Abstract: The invention uses the control circuit formed on the silicon wafer to detect the leakage current of transistor formed on the depletion mode GaN wafer and then adjust the gate voltage of the depletion mode GaN transistor according to the detected leakage current. Essentially, the gate voltage is reduced or viewed as made more negative when the detected leakage current is larger a specific value. Thus, the gate voltage can be gradually adjusted to approach a specific threshold voltage that right block the leakage current. In other words, by making the gate voltage more negative when non-zero leakage current is detected and even by making the gate voltage more positive when zero leakage current is detected, the depletion mode GaN transistor can be adjusted to have an acceptable or even zero leakage current, a high reaction rate and an optimized efficiency.

Abstract: A method for automatic discovery of a communication network including a hub, a plurality of termination devices, and a plurality of network elements. The method includes (a) associating respective geographic information with each termination device, (b) determining a respective distance of each termination device from the hub, (c) grouping, at least partially based on diagnostic information from the communication network, two or more of the plurality of termination devices sharing a common characteristic, (d) determining a topology of the communication network, and (e) determining a respective characteristic of at least one network element of the plurality of network elements.

Abstract: An isolated power chip based on wafer level packaging, including: an RDL-based micro-transformer, where a primary coil of the RDL-based micro-transformer is connected to a direct-current power supply and configured to output a direct-current voltage input by the direct-current power supply; a transmitting chip connected to the primary coil of the RDL-based micro-transformer, and configured to receive the direct-current voltage, convert the direct-current voltage into an alternating current signal, and transmit the alternating current signal to a secondary coil of the RDL-based micro-transformer; and a receiving chip connected to the secondary coil of the RDL-based micro-transformer, and configured to convert the alternating current signal into a direct-current signal, generate a control signal for stabilizing the output voltage according to a change of a load, and encode the control signal for digital isolation.

Abstract: A method of modulating a series of input digital symbols of a first modulation scheme is provided. The method is implemented by a transmitter and includes receiving a sequential series of samples of the digital symbols in a first domain of the first modulation scheme. The first domain is one of the time domain and the frequency domain. The method further includes determining a dual of the first modulation scheme. The dual has a second modulation scheme in a second domain that is different from the first domain the second domain is the other of the time domain and the frequency domain. The method further includes applying a 90 degree rotational operation to the second modulation scheme to generate a rotational modulation format, modulating the series of digital symbols with the generated rotational modulation format, and outputting the modulated series of digital symbols to a receiver.

Abstract: A profile optimizing method is provided for a transmission of active subcarriers over a channel to user devices. The method includes steps of (i) obtaining a symbol mapping architecture for the set of profiles, (ii) calculating, from the symbol mapping architecture, a plurality of mapping orders for the set of profiles different from the logical order, (iii) determining, from the calculated plurality of mapping orders, a particular mapping order having a higher spectral efficiency than the logical order, (iv) reordering the respective codewords of the set of profiles to correspond to the particular mapping order, (v) re-mapping the symbol mapping architecture to a number of symbols corresponding to the reordered codewords, and (vi) transmitting the symbols to the population of user devices. The symbol mapping architecture includes a codeword for each profile of the set of profiles, and maps the codewords to a different number by logical order.

Abstract: A method for fabricating an image sensor array having a first group of photodiodes for detecting light at visible wavelengths a second group of photodiodes for detecting light at infrared or near-infrared wavelengths, the method including growing a germanium-silicon layer on a semiconductor donor wafer; defining pixels of the image sensor array on the germanium-silicon layer; defining a first interconnect layer on the germanium-silicon layer, wherein the interconnect layer includes a plurality of interconnects coupled to the first group of photodiodes and the second group of photodiodes; defining integrated circuitry for controlling the pixels of the image sensor array on a semiconductor carrier wafer; defining a second interconnect layer on the semiconductor carrier wafer, wherein the second interconnect layer includes a plurality of interconnects coupled to the integrated circuitry; and bonding the first interconnect layer with the second interconnect layer.

Abstract: A circuit that includes: a photodiode configured to absorb photons and to generate photo-carriers from the absorbed photons; a first MOSFET transistor that includes: a first channel terminal coupled to a first terminal of the photodiode and configured to collect a portion of the photo-carriers generated by the photodiode; a second channel terminal; and a gate terminal coupled to a first control voltage source; a first readout circuit configured to output a first readout voltage; a second readout circuit configured to output a second readout voltage; and a current-steering circuit configured to steer the photo-carriers generated by the photodiode to one or both of the first readout circuit and the second readout circuit.

Abstract: Durable, anti-fouling, crosslinked zwitterionic coatings that are grafted to the surface of a substrate through covalent bonding are disclosed. When exposed to a light source, zwitterionic monomers react with a crosslinker and with activated radicals at the surface of the substrate, simultaneously forming the crosslinked zwitterionic coating and anchoring it to the surface of the substrate. Photomasking techniques can be used to micropattern the zwitterionic coatings. The zwitterionic coatings can be applied to a variety of substrates, including medical devices and systems.

Abstract: The disclosure provides a display equipment, a brightness compensation device, and a brightness compensation method. The brightness compensation device includes a variable refresh rate (VRR) detection circuit and a control circuit. The VRR detection circuit and the control circuit receive a video stream from a video source device, and the video stream includes a VRR video frame. The VRR detection circuit detects a blanking period of the VRR video frame and generates a detection result. The control circuit outputs the frame data of the VRR video frame to the display device during the valid data period of the VRR video frame. The control circuit repeatedly outputs the frame data of the VRR video frame to the display device during the blanking period of the VRR video frame according to the detection result until the blanking period ends.

Abstract: Multiphase series capacitor DC-DC converters are provided, including: a power stage circuit configured to convert an input DC voltage into a stable DC voltage required by a load, where the power stage circuit includes inductors of two or more phases, and there is a phase difference with a preset interval between inductor currents of phases for alternately charging the load in sequence, and a bidirectional switch is provided between inductors of every two adjacent phases, where when the bidirectional switch is turned on, the inductors of the corresponding two phases charge the load simultaneously; and a load transient response circuit configured to, when a load transient positive step occurs, control one or more bidirectional switches to be turned on to make inductors of two or more corresponding phases charge the load simultaneously. Control methods of such converters are also provided, which can realize fast response to load transient changes.

Abstract: A method for tuning a power characteristic of an optical frequency comb includes controlling a modulating light source according to a plurality of modulation parameters to generate an optical frequency comb including a plurality of optical tones. Additionally, at least one of the plurality of modulation parameters is changed until a total power of the plurality of optical tones is greater than or equal to a minimum threshold value. Furthermore, at least one of the plurality of modulation parameters are changed until respective powers of each of the plurality of optical tones are within a predetermined proximity to respective target powers of each of the plurality of optical tones.

Abstract: Multiphase series capacitor DC-DC converters are provided, including: a power stage circuit configured to convert an input DC voltage into a stable DC voltage required by a load, where the power stage circuit includes inductors of two or more phases, and there is a phase difference with a preset interval between inductor currents of phases for alternately charging the load in sequence, and a bidirectional switch is provided between inductors of every two adjacent phases, where when the bidirectional switch is turned on, the inductors of the corresponding two phases charge the load simultaneously; and a load transient response circuit configured to, when a load transient positive step occurs, control one or more bidirectional switches to be turned on to make inductors of two or more corresponding phases charge the load simultaneously. Control methods of such converters are also provided, which can realize fast response to load transient changes.

Abstract: A bonding apparatus for attaching an adhering pad to a base component includes a feeding and holding frame for feeding and holding the base component in a conveying route, a suspending carrier mounted above the conveying route, and a bonding device disposed on and movable with the suspending carrier. The bonding device has a feeding reel on which the tape assembly is disposed and from which the tape assembly is pulled and fed along a feeding route, and an attaching head which is disposed at said feeding route to divide the pulled section into an input side and an output side. When the attaching head is moved toward the input side, the adhering pad is removed from the carrier tape while attached to the base component.